From 0dd52db44d3647da22f668f475219b358bc60b64 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 26 Jan 2023 16:58:28 +0100 Subject: [PATCH] add card header declarations Signed-off-by: Pascal Henry Bauer --- fpga/include/villas/fpga/card.hpp | 59 ++++++++++++++++++++++++++----- 1 file changed, 51 insertions(+), 8 deletions(-) diff --git a/fpga/include/villas/fpga/card.hpp b/fpga/include/villas/fpga/card.hpp index 8528ace92..e3839aeaf 100644 --- a/fpga/include/villas/fpga/card.hpp +++ b/fpga/include/villas/fpga/card.hpp @@ -4,17 +4,60 @@ * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC - * SPDX-License-Identifier: Apache-2.0 + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power + *Systems, EONERC SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ #pragma once - -namespace villas { -namespace fpga { -class Card { -public: - +#include + +#include +#include + +namespace villas +{ +namespace fpga +{ + +class Card +{ + public: + bool polling; + std::shared_ptr vfioDevice; + + // Slave address space ID to access the PCIe address space from the + // FPGA + MemoryManager::AddressSpaceId addrSpaceIdDeviceToHost; + + // Address space identifier of the master address space of this FPGA + // card. This will be used for address resolution of all IPs on this + // card. + MemoryManager::AddressSpaceId addrSpaceIdHostToDevice; + + std::list > ips; + + virtual ~Card(); + + std::shared_ptr lookupIp(const std::string &name) const; + std::shared_ptr lookupIp(const Vlnv &vlnv) const; + std::shared_ptr lookupIp(const ip::IpIdentifier &id) const; + + bool mapMemoryBlock(const MemoryBlock &block); + bool unmapMemoryBlock(const MemoryBlock &block); + + private: + // Cache a set of already mapped memory blocks + std::set memoryBlocksMapped; + + std::shared_ptr vfioContainer; + + protected: + // Logger getLogger() const + // { + // return villas::logging.get(name); + // } + + Logger logger; }; } /* namespace fpga */