diff --git a/fpga/.dockerignore b/fpga/.dockerignore index 51dfbf115..815976fd5 100644 --- a/fpga/.dockerignore +++ b/fpga/.dockerignore @@ -1,6 +1,6 @@ # Project-wide dockerignore file # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 * diff --git a/fpga/.editorconfig b/fpga/.editorconfig index a3cf0e619..b1a85d021 100644 --- a/fpga/.editorconfig +++ b/fpga/.editorconfig @@ -1,6 +1,6 @@ # EditorConfig is awesome: http://EditorConfig.org # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 # top-most EditorConfig file diff --git a/fpga/.gitignore b/fpga/.gitignore index 08665c36c..97d5b8e04 100644 --- a/fpga/.gitignore +++ b/fpga/.gitignore @@ -1,6 +1,6 @@ # Project-wide gitignore file # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 build/ diff --git a/fpga/.gitlab-ci.yml b/fpga/.gitlab-ci.yml index 021636bb5..fdb4c4a91 100644 --- a/fpga/.gitlab-ci.yml +++ b/fpga/.gitlab-ci.yml @@ -1,6 +1,6 @@ # GitLab CI configuration # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 variables: @@ -10,24 +10,11 @@ variables: DOCKER_IMAGE_DEV: villas/fpga-dev stages: -- lint - prepare - build - test -# Stage: lint -############################################################################## - -reuse: - stage: lint - image: - name: fsfe/reuse:latest - entrypoint: [""] - script: - - reuse lint - # Stage: prepare -############################################################################## # Build docker image which is used to build & test VILLASnode docker-dev: @@ -38,7 +25,6 @@ docker-dev: - docker # Stage: build -############################################################################## build:source: stage: build @@ -54,7 +40,6 @@ build:source: - docker # Stage: test -############################################################################## test:unit: stage: test @@ -102,3 +87,11 @@ test:cppcheck: paths: - cppcheck.log expose_as: cppcheck + +test:reuse: + stage: test + image: + name: fsfe/reuse:latest + entrypoint: [""] + script: + - reuse lint diff --git a/fpga/.gitmodules b/fpga/.gitmodules index fca290fb6..c12e2121a 100644 --- a/fpga/.gitmodules +++ b/fpga/.gitmodules @@ -1,6 +1,6 @@ # Git submodule list # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 [submodule "common"] diff --git a/fpga/.reuse/dep5 b/fpga/.reuse/dep5 index c6be72bc1..3e77ed91f 100644 --- a/fpga/.reuse/dep5 +++ b/fpga/.reuse/dep5 @@ -4,5 +4,5 @@ Upstream-Contact: Steffen Vogel Source: https://fein-aachen.org/en/projects/villas-fpga/ Files: .vscode/* doc/pictures/* etc/**.json -Copyright: 2018-2022, Institute for Automation of Complex Power Systems, EONERC +Copyright: 2018-2023, Institute for Automation of Complex Power Systems, RWTH Aachen University License: Apache-2.0 diff --git a/fpga/CHANGELOG.md b/fpga/CHANGELOG.md index ef30d8bd7..36cb1b17d 100644 --- a/fpga/CHANGELOG.md +++ b/fpga/CHANGELOG.md @@ -1,5 +1,10 @@ # Changelog + + All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/) @@ -23,8 +28,3 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. - Sourcecode import from VILLASnode project: http://git.rwth-aachen.de/VILLASframework/VILLASnode - -## License - -SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC -SPDX-License-Identifier: Apache-2.0 diff --git a/fpga/CMakeLists.txt b/fpga/CMakeLists.txt index b9f15bb6c..0f5dbba0b 100644 --- a/fpga/CMakeLists.txt +++ b/fpga/CMakeLists.txt @@ -1,9 +1,8 @@ ## CMakeLists.txt # # Author: Daniel Krebs -# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -############################################################################## cmake_minimum_required(VERSION 3.5) diff --git a/fpga/Dockerfile b/fpga/Dockerfile index b976221e7..30779dc9f 100644 --- a/fpga/Dockerfile +++ b/fpga/Dockerfile @@ -9,9 +9,8 @@ # make docker # # Author: Steffen Vogel -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################### FROM rockylinux:9 diff --git a/fpga/LICENSES/BSD-3-Clause.txt b/fpga/LICENSES/BSD-3-Clause.txt index 04073d9b3..ab8be2cd4 100644 --- a/fpga/LICENSES/BSD-3-Clause.txt +++ b/fpga/LICENSES/BSD-3-Clause.txt @@ -1,4 +1,4 @@ -Copyright (c) 2017 Institute for Automation of Complex Power Systems, EONERC. +Copyright (c) 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/fpga/LICENSES/WTFPL.txt b/fpga/LICENSES/WTFPL.txt index d284d8554..ecbc30df1 100644 --- a/fpga/LICENSES/WTFPL.txt +++ b/fpga/LICENSES/WTFPL.txt @@ -1,7 +1,7 @@ DO WHAT THE FUCK YOU WANT TO PUBLIC LICENSE Version 2, December 2004 -Copyright (C) 2017 Institute for Automation of Complex Power Systems, EONERC +Copyright (C) 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University Everyone is permitted to copy and distribute verbatim or modified copies of this license document, and changing it is allowed as long as the name is changed. diff --git a/fpga/README.md b/fpga/README.md index 9b774f6d6..0ac2f756b 100644 --- a/fpga/README.md +++ b/fpga/README.md @@ -9,20 +9,14 @@ VILLASfpga supports Xilinx FPGAs connected to a Linux system via PCI-Express or User documentation is available here: -## Copyright - -- 2022 Niklas Eiling -- 2018-2022 Steffen Vogel -- 2018 Daniel Krebs - ## License This project is released under the terms of the [Apache 2.0](LICENSE) license: -SPDX-FileCopyrightText: 2022-2023 Niklas Eiling -SPDX-FileCopyrightText: 2018-2023 Steffen Vogel -SPDX-FileCopyrightText: 2018 Daniel Krebs -SPDX-License-Identifier: Apache-2.0 +- SPDX-FileCopyrightText: 2022-2023 Niklas Eiling +- SPDX-FileCopyrightText: 2018-2023 Steffen Vogel +- SPDX-FileCopyrightText: 2018 Daniel Krebs +- SPDX-License-Identifier: Apache-2.0 We kindly ask all academic publications employing components of VILLASframework to cite one of the following papers: diff --git a/fpga/cmake/FindCriterion.cmake b/fpga/cmake/FindCriterion.cmake index 69f6289c5..34ee4d0a9 100644 --- a/fpga/cmake/FindCriterion.cmake +++ b/fpga/cmake/FindCriterion.cmake @@ -5,9 +5,8 @@ # CRITERION_INCLUDE_DIRS - The Criterion include directories # CRITERION_LIBRARIES - The libraries needed to use Criterion # -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: WTFPL -############################################################################## find_package(PkgConfig) @@ -20,7 +19,8 @@ set(CRITERION_LIBRARIES ${CRITERION_LIBRARY}) set(CRITERION_INCLUDE_DIRS ${CRITERION_INCLUDE_DIR}) include(FindPackageHandleStandardArgs) -# handle the QUIET and REQUIRED arguments and set CRITERION_FOUND to TRUE + +# Handle the QUIET and REQUIRED arguments and set CRITERION_FOUND to TRUE # if all listed variables are TRUE find_package_handle_standard_args(Criterion DEFAULT_MSG CRITERION_LIBRARY CRITERION_INCLUDE_DIR) diff --git a/fpga/gpu/CMakeLists.txt b/fpga/gpu/CMakeLists.txt index 33f7021a4..63276fcb5 100644 --- a/fpga/gpu/CMakeLists.txt +++ b/fpga/gpu/CMakeLists.txt @@ -1,9 +1,8 @@ ## CMakeLists.txt # # Author: Daniel Krebs -# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -############################################################################## cmake_minimum_required(VERSION 3.8) diff --git a/fpga/gpu/include/villas/gpu.hpp b/fpga/gpu/include/villas/gpu.hpp index b6b1f982d..f4e1c170d 100644 --- a/fpga/gpu/include/villas/gpu.hpp +++ b/fpga/gpu/include/villas/gpu.hpp @@ -1,9 +1,9 @@ -/** GPU managment. +/* GPU managment. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -96,5 +96,5 @@ private: Logger logger; }; -} /* namespace villas */ -} /* namespace gpu */ +} // namespace villas +} // namespace gpu diff --git a/fpga/gpu/kernels.hpp b/fpga/gpu/kernels.hpp index 31086c38a..1ee054ea8 100644 --- a/fpga/gpu/kernels.hpp +++ b/fpga/gpu/kernels.hpp @@ -1,9 +1,9 @@ -/** GPU Kernels. +/* GPU Kernels. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -19,5 +19,5 @@ kernel_mailbox(volatile uint32_t *mailbox, volatile uint32_t* counter); __global__ void kernel_memcpy(volatile uint8_t* dst, volatile uint8_t* src, size_t length); -} /* namespace villas */ -} /* namespace gpu */ +} // namespace villas +} // namespace gpu diff --git a/fpga/gpu/src/gpu.cpp b/fpga/gpu/src/gpu.cpp index a98bef104..4bd7787de 100644 --- a/fpga/gpu/src/gpu.cpp +++ b/fpga/gpu/src/gpu.cpp @@ -1,9 +1,9 @@ -/** GPU managment. +/* GPU managment. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/gpu/src/kernels.cu b/fpga/gpu/src/kernels.cu index 8806bcaa4..0fe60b941 100644 --- a/fpga/gpu/src/kernels.cu +++ b/fpga/gpu/src/kernels.cu @@ -1,7 +1,7 @@ /** GPU Kernels. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ diff --git a/fpga/include/villas/fpga/card.hpp b/fpga/include/villas/fpga/card.hpp index 63cced5d4..dea210b86 100644 --- a/fpga/include/villas/fpga/card.hpp +++ b/fpga/include/villas/fpga/card.hpp @@ -1,12 +1,13 @@ -/** FPGA card +/* FPGA card * * This class represents a FPGA device. * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ + #pragma once #include @@ -52,5 +53,5 @@ protected: Logger logger; }; -} /* namespace fpga */ -} /* namespace villas */ +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/config.h b/fpga/include/villas/fpga/config.h index 75b2bb725..5ee811e85 100644 --- a/fpga/include/villas/fpga/config.h +++ b/fpga/include/villas/fpga/config.h @@ -1,12 +1,12 @@ -/** Compile time configuration +/* Compile time configuration * * This file contains some compiled-in settings. * This settings are not part of the configuration file. * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -15,6 +15,6 @@ #define FPGA_PCI_VID_XILINX 0x10ee #define FPGA_PCI_PID_VFPGA 0x7022 -/** AXI Bus frequency for all components +/* AXI Bus frequency for all components * except RTDS AXI Stream bridge which runs at RTDS_HZ (100 Mhz) */ #define FPGA_AXI_HZ 125000000 // 125 MHz diff --git a/fpga/include/villas/fpga/core.hpp b/fpga/include/villas/fpga/core.hpp index 7d193c38f..7efb1e789 100644 --- a/fpga/include/villas/fpga/core.hpp +++ b/fpga/include/villas/fpga/core.hpp @@ -1,12 +1,12 @@ -/** Interlectual Property component. +/* Interlectual Property component. * * This class represents a module within the FPGA. * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -342,6 +342,6 @@ private: }; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/dma.h b/fpga/include/villas/fpga/dma.h index dec2f5992..608a98b70 100644 --- a/fpga/include/villas/fpga/dma.h +++ b/fpga/include/villas/fpga/dma.h @@ -1,9 +1,9 @@ -/** C bindings for VILLASfpga +/* C bindings for VILLASfpga * * Author: Niklas Eiling * SPDX-FileCopyrightText: 2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - ******************************************************************************/ + */ #ifndef _VILLASFPGA_DMA_H #define _VILLASFPGA_DMA_H @@ -36,4 +36,4 @@ int villasfpga_write_complete(villasfpga_handle handle, size_t *size); } // extern "C" #endif -#endif /* _VILLASFPGA_DMA_H */ +#endif // _VILLASFPGA_DMA_H diff --git a/fpga/include/villas/fpga/ips/aurora.hpp b/fpga/include/villas/fpga/ips/aurora.hpp index 42512682d..be0c1da96 100644 --- a/fpga/include/villas/fpga/ips/aurora.hpp +++ b/fpga/include/villas/fpga/ips/aurora.hpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora) +/* Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora) * * Author: Hatim Kanchwala - * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -50,6 +50,6 @@ private: static constexpr const char registerMemory[] = "reg0"; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/aurora_xilinx.hpp b/fpga/include/villas/fpga/ips/aurora_xilinx.hpp index e2c52d218..f89f86be9 100644 --- a/fpga/include/villas/fpga/ips/aurora_xilinx.hpp +++ b/fpga/include/villas/fpga/ips/aurora_xilinx.hpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) +/* Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -31,6 +31,6 @@ public: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/bram.hpp b/fpga/include/villas/fpga/ips/bram.hpp index ce4042183..ee856632b 100644 --- a/fpga/include/villas/fpga/ips/bram.hpp +++ b/fpga/include/villas/fpga/ips/bram.hpp @@ -1,9 +1,9 @@ -/** Block-Raam related helper functions +/* Block-Raam related helper functions * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2018 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -77,6 +77,6 @@ protected: void parse(Core &, json_t *) override; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/dino.hpp b/fpga/include/villas/fpga/ips/dino.hpp index 9c814c185..152dd2d65 100644 --- a/fpga/include/villas/fpga/ips/dino.hpp +++ b/fpga/include/villas/fpga/ips/dino.hpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around Dino +/* Driver for wrapper around Dino * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -29,6 +29,6 @@ public: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/dma.hpp b/fpga/include/villas/fpga/ips/dma.hpp index 7f15ede92..333a9a372 100644 --- a/fpga/include/villas/fpga/ips/dma.hpp +++ b/fpga/include/villas/fpga/ips/dma.hpp @@ -1,11 +1,11 @@ -/** DMA driver +/* DMA driver * * Author: Daniel Krebs * Author: Steffen Vogel * Author: Niklas Eiling - * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - ******************************************************************************/ + */ #pragma once @@ -183,6 +183,6 @@ protected: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/emc.hpp b/fpga/include/villas/fpga/ips/emc.hpp index e44b1d2c6..3c3172a10 100644 --- a/fpga/include/villas/fpga/ips/emc.hpp +++ b/fpga/include/villas/fpga/ips/emc.hpp @@ -1,9 +1,9 @@ -/** AXI External Memory Controller (EMC) +/* AXI External Memory Controller (EMC) * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -40,6 +40,6 @@ private: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/fifo.hpp b/fpga/include/villas/fpga/ips/fifo.hpp index 3050da5fa..4f4e22736 100644 --- a/fpga/include/villas/fpga/ips/fifo.hpp +++ b/fpga/include/villas/fpga/ips/fifo.hpp @@ -1,4 +1,4 @@ -/** Timer related helper functions +/* Timer related helper functions * * These functions present a simpler interface to Xilinx' Timer Counter driver (XTmrCtr_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -52,6 +52,6 @@ class FifoData : public Node { friend class FifoDataFactory; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/gpio.hpp b/fpga/include/villas/fpga/ips/gpio.hpp index e1d4f8c67..f2f607fd9 100644 --- a/fpga/include/villas/fpga/ips/gpio.hpp +++ b/fpga/include/villas/fpga/ips/gpio.hpp @@ -1,10 +1,10 @@ -/** AXI General Purpose IO (GPIO) +/* AXI General Purpose IO (GPIO) * * Author: Steffen Vogel * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -32,6 +32,6 @@ private: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/gpu2rtds.hpp b/fpga/include/villas/fpga/ips/gpu2rtds.hpp index e168619f0..20fa63387 100644 --- a/fpga/include/villas/fpga/ips/gpu2rtds.hpp +++ b/fpga/include/villas/fpga/ips/gpu2rtds.hpp @@ -1,9 +1,9 @@ -/** GPU2RTDS IP core +/* GPU2RTDS IP core * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -73,6 +73,6 @@ public: bool started; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/hls.hpp b/fpga/include/villas/fpga/ips/hls.hpp index 63fea706c..4315dff17 100644 --- a/fpga/include/villas/fpga/ips/hls.hpp +++ b/fpga/include/villas/fpga/ips/hls.hpp @@ -1,9 +1,9 @@ -/** HLS IP core +/* HLS IP core * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -157,6 +157,6 @@ protected: bool running; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/intc.hpp b/fpga/include/villas/fpga/ips/intc.hpp index 226165ec3..7bbe31db8 100644 --- a/fpga/include/villas/fpga/ips/intc.hpp +++ b/fpga/include/villas/fpga/ips/intc.hpp @@ -1,10 +1,10 @@ -/** AXI-PCIe Interrupt controller +/* AXI-PCIe Interrupt controller * * Author: Steffen Vogel * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -68,6 +68,6 @@ private: bool polling[maxIrqs]; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/pcie.hpp b/fpga/include/villas/fpga/ips/pcie.hpp index 930acd0f2..c40acec88 100644 --- a/fpga/include/villas/fpga/ips/pcie.hpp +++ b/fpga/include/villas/fpga/ips/pcie.hpp @@ -1,4 +1,4 @@ -/** AXI Stream interconnect related helper functions +/* AXI Stream interconnect related helper functions * * These functions present a simpler interface to Xilinx' AXI Stream switch driver (XAxis_Switch_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -76,6 +76,6 @@ protected: void parse(Core &, json_t *) override; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/rtds.hpp b/fpga/include/villas/fpga/ips/rtds.hpp index 446d0670a..e46f4a1c6 100644 --- a/fpga/include/villas/fpga/ips/rtds.hpp +++ b/fpga/include/villas/fpga/ips/rtds.hpp @@ -1,9 +1,9 @@ -/** Driver for AXI Stream wrapper around RTDS_InterfaceModule (rtds_axis ) +/* Driver for AXI Stream wrapper around RTDS_InterfaceModule (rtds_axis ) * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -49,6 +49,6 @@ private: static constexpr const char* irqCase = "irq_case"; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/rtds2gpu.hpp b/fpga/include/villas/fpga/ips/rtds2gpu.hpp index 403b58098..71c5497b5 100644 --- a/fpga/include/villas/fpga/ips/rtds2gpu.hpp +++ b/fpga/include/villas/fpga/ips/rtds2gpu.hpp @@ -1,9 +1,9 @@ -/** GPU2RTDS IP core +/* GPU2RTDS IP core * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -91,6 +91,6 @@ private: bool started; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/rtds2gpu/register_types.hpp b/fpga/include/villas/fpga/ips/rtds2gpu/register_types.hpp index 72208aa98..600b59287 100644 --- a/fpga/include/villas/fpga/ips/rtds2gpu/register_types.hpp +++ b/fpga/include/villas/fpga/ips/rtds2gpu/register_types.hpp @@ -1,9 +1,9 @@ -/** GPU2RTDS register types +/* GPU2RTDS register types * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once diff --git a/fpga/include/villas/fpga/ips/switch.hpp b/fpga/include/villas/fpga/ips/switch.hpp index 5f007c0d2..974691f59 100644 --- a/fpga/include/villas/fpga/ips/switch.hpp +++ b/fpga/include/villas/fpga/ips/switch.hpp @@ -1,4 +1,4 @@ -/** AXI Stream interconnect related helper functions +/* AXI Stream interconnect related helper functions * * These functions present a simpler interface to Xilinx' AXI Stream switch driver (XAxis_Switch_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -86,6 +86,6 @@ protected: void parse(Core &, json_t *) override; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/ips/timer.hpp b/fpga/include/villas/fpga/ips/timer.hpp index 939636666..00cb5ccc2 100644 --- a/fpga/include/villas/fpga/ips/timer.hpp +++ b/fpga/include/villas/fpga/ips/timer.hpp @@ -1,4 +1,4 @@ -/** Timer related helper functions +/* Timer related helper functions * * These functions present a simpler interface to Xilinx' Timer Counter driver (XTmrCtr_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -64,6 +64,6 @@ private: XTmrCtr xTmr; }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/node.hpp b/fpga/include/villas/fpga/node.hpp index e9bf2299f..5b53cb24a 100644 --- a/fpga/include/villas/fpga/node.hpp +++ b/fpga/include/villas/fpga/node.hpp @@ -1,12 +1,12 @@ -/** Interlectual Property component. +/* Interlectual Property component. * * This class represents a module within the FPGA. * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -182,6 +182,6 @@ private: } }; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/pcie_card.hpp b/fpga/include/villas/fpga/pcie_card.hpp index 6e7153d56..24567c2e5 100644 --- a/fpga/include/villas/fpga/pcie_card.hpp +++ b/fpga/include/villas/fpga/pcie_card.hpp @@ -1,12 +1,12 @@ -/** FPGA pciecard +/* FPGA pciecard * * This class represents a FPGA device. * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -115,5 +115,5 @@ public: } }; -} /* namespace fpga */ -} /* namespace villas */ +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/utils.hpp b/fpga/include/villas/fpga/utils.hpp index fd9e7fbcd..71d651c31 100644 --- a/fpga/include/villas/fpga/utils.hpp +++ b/fpga/include/villas/fpga/utils.hpp @@ -1,8 +1,8 @@ -/** Helper function for directly using VILLASfpga outside of VILLASnode +/* Helper function for directly using VILLASfpga outside of VILLASnode * Author: Niklas Eiling - * SPDX-FileCopyrightText: 2022 Niklas Eiling + * SPDX-FileCopyrightText: 2022-2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -122,5 +122,5 @@ protected: std::unique_ptr getBufferedSampleFormatter(const std::string &format, size_t bufSizeInSamples); -} /* namespace fpga */ -} /* namespace villas */ +} // namespace fpga +} // namespace villas diff --git a/fpga/include/villas/fpga/vlnv.hpp b/fpga/include/villas/fpga/vlnv.hpp index d13d05083..65b812cd6 100644 --- a/fpga/include/villas/fpga/vlnv.hpp +++ b/fpga/include/villas/fpga/vlnv.hpp @@ -1,9 +1,9 @@ -/** Vendor, Library, Name, Version (VLNV) tag. +/* Vendor, Library, Name, Version (VLNV) tag. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once @@ -68,5 +68,5 @@ private: std::string version; }; -} /* namespace fpga */ -} /* namespace villas */ +} // namespace fpga +} // namespace villas diff --git a/fpga/lib/CMakeLists.txt b/fpga/lib/CMakeLists.txt index f32da84a7..4ae2f2547 100644 --- a/fpga/lib/CMakeLists.txt +++ b/fpga/lib/CMakeLists.txt @@ -1,9 +1,8 @@ ## CMakeLists.txt # # Author: Daniel Krebs -# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -############################################################################## set(SOURCES vlnv.cpp diff --git a/fpga/lib/card.cpp b/fpga/lib/card.cpp index ac97e1f07..7bd8dc38c 100644 --- a/fpga/lib/card.cpp +++ b/fpga/lib/card.cpp @@ -1,12 +1,12 @@ -/** FPGA card +/* FPGA card * * This class represents a FPGA device. * * Author: Steffen Vogel * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power - * Systems, EONERC SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University + * SPDX-License-Identifier: Apache-2.0 + */ #include diff --git a/fpga/lib/core.cpp b/fpga/lib/core.cpp index 11e71aa3e..e852e605d 100644 --- a/fpga/lib/core.cpp +++ b/fpga/lib/core.cpp @@ -1,9 +1,9 @@ -/** FPGA IP component. +/* FPGA IP component. * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/dma.cpp b/fpga/lib/dma.cpp index 67014d67c..6e175be61 100644 --- a/fpga/lib/dma.cpp +++ b/fpga/lib/dma.cpp @@ -1,9 +1,9 @@ -/** API for interacting with the FPGA DMA Controller. +/* API for interacting with the FPGA DMA Controller. * * Author: Niklas Eiling * SPDX-FileCopyrightText: 2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/aurora.cpp b/fpga/lib/ips/aurora.cpp index c71489b5d..fc540af2b 100644 --- a/fpga/lib/ips/aurora.cpp +++ b/fpga/lib/ips/aurora.cpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora) +/* Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora) * * Author: Hatim Kanchwala - * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include @@ -37,12 +37,12 @@ // Sequence number must be handled in software then. #define AURORA_AXIS_CR_SEQ_MODE (1 << 2) -/** 1-bit, assert to strip the received frame of the trailing sequence +/* 1-bit, assert to strip the received frame of the trailing sequence * number. Sequence number mode must be set to handled by Aurora IP, * otherwise this bit is ignored. */ #define AURORA_AXIS_CR_SEQ_STRIP (1 << 3) -/** 1-bit, assert to use the same sequence number in the outgoing +/* 1-bit, assert to use the same sequence number in the outgoing * NovaCor-bound frames as the sequence number received from the * incoming frames from NovaCor. Sequence number mode must be set to * handled by Aurora IP, otherwise this bit is ignored.*/ diff --git a/fpga/lib/ips/aurora_xilinx.cpp b/fpga/lib/ips/aurora_xilinx.cpp index 93edb00d8..e516512cd 100644 --- a/fpga/lib/ips/aurora_xilinx.cpp +++ b/fpga/lib/ips/aurora_xilinx.cpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) +/* Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/bram.cpp b/fpga/lib/ips/bram.cpp index d663a8773..0c711dcf9 100644 --- a/fpga/lib/ips/bram.cpp +++ b/fpga/lib/ips/bram.cpp @@ -1,9 +1,9 @@ -/** Block RAM IP. +/* Block RAM IP. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/dino.cpp b/fpga/lib/ips/dino.cpp index 133c9436f..22f331e76 100644 --- a/fpga/lib/ips/dino.cpp +++ b/fpga/lib/ips/dino.cpp @@ -1,9 +1,9 @@ -/** Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) +/* Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b) * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/dma.cpp b/fpga/lib/ips/dma.cpp index b2a6600ed..b744fd98b 100644 --- a/fpga/lib/ips/dma.cpp +++ b/fpga/lib/ips/dma.cpp @@ -1,10 +1,10 @@ -/** DMA driver +/* DMA driver * * Author: Daniel Krebs * Author: Niklas Eiling - * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - ******************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/emc.cpp b/fpga/lib/ips/emc.cpp index a26ac853d..e91dc311e 100644 --- a/fpga/lib/ips/emc.cpp +++ b/fpga/lib/ips/emc.cpp @@ -1,9 +1,9 @@ -/** AXI External Memory Controller (EMC) +/* AXI External Memory Controller (EMC) * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include @@ -42,7 +42,7 @@ bool EMC::read(uint32_t offset, uint32_t length, uint8_t *data) { int ret; - /** Reset the Flash Device. This clears the ret registers and puts + /* Reset the Flash Device. This clears the ret registers and puts * the device in Read mode. */ ret = XFlash_Reset(&xflash); diff --git a/fpga/lib/ips/fifo.cpp b/fpga/lib/ips/fifo.cpp index b7f16a7bf..e845da60d 100644 --- a/fpga/lib/ips/fifo.cpp +++ b/fpga/lib/ips/fifo.cpp @@ -1,4 +1,4 @@ -/** FIFO related helper functions +/* FIFO related helper functions * * These functions present a simpler interface to Xilinx' FIFO driver (XLlFifo_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/gpio.cpp b/fpga/lib/ips/gpio.cpp index ced7fcee5..3b4fa581a 100644 --- a/fpga/lib/ips/gpio.cpp +++ b/fpga/lib/ips/gpio.cpp @@ -1,9 +1,9 @@ -/** AXI General Purpose IO (GPIO) +/* AXI General Purpose IO (GPIO) * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/intc.cpp b/fpga/lib/ips/intc.cpp index 22bb56267..f1cefc94a 100644 --- a/fpga/lib/ips/intc.cpp +++ b/fpga/lib/ips/intc.cpp @@ -1,9 +1,9 @@ -/** AXI-PCIe Interrupt controller +/* AXI-PCIe Interrupt controller * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/pcie.cpp b/fpga/lib/ips/pcie.cpp index 2fbe1e9d2..c7861db53 100644 --- a/fpga/lib/ips/pcie.cpp +++ b/fpga/lib/ips/pcie.cpp @@ -1,9 +1,9 @@ -/** AXI PCIe bridge +/* AXI PCIe bridge * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/rtds.cpp b/fpga/lib/ips/rtds.cpp index 59e0aecab..944d9d79c 100644 --- a/fpga/lib/ips/rtds.cpp +++ b/fpga/lib/ips/rtds.cpp @@ -1,9 +1,9 @@ -/** Driver for AXI Stream wrapper around RTDS_InterfaceModule (rtds_axis ) +/* Driver for AXI Stream wrapper around RTDS_InterfaceModule (rtds_axis ) * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp b/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp index 2f3cb77de..ad6a42a6c 100644 --- a/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp +++ b/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp @@ -1,9 +1,9 @@ -/** GPU2RTDS IP core +/* GPU2RTDS IP core * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp b/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp index 1cf1217ea..4c6acab20 100644 --- a/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp +++ b/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp @@ -1,9 +1,9 @@ -/** GPU2RTDS IP core +/* GPU2RTDS IP core * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/ips/switch.cpp b/fpga/lib/ips/switch.cpp index bf0932e93..a55949eb6 100644 --- a/fpga/lib/ips/switch.cpp +++ b/fpga/lib/ips/switch.cpp @@ -1,4 +1,4 @@ -/** AXI Stream interconnect related helper functions +/* AXI Stream interconnect related helper functions * * These functions present a simpler interface to Xilinx' AXI Stream switch driver (XAxis_Switch_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include @@ -135,6 +135,6 @@ void AxiStreamSwitchFactory::parse(Core &ip, json_t *cfg) static AxiStreamSwitchFactory f; -} /* namespace ip */ -} /* namespace fpga */ -} /* namespace villas */ +} // namespace ip +} // namespace fpga +} // namespace villas diff --git a/fpga/lib/ips/timer.cpp b/fpga/lib/ips/timer.cpp index eb0303e11..bbccc92d7 100644 --- a/fpga/lib/ips/timer.cpp +++ b/fpga/lib/ips/timer.cpp @@ -1,4 +1,4 @@ -/** Timer related helper functions +/* Timer related helper functions * * These functions present a simpler interface to Xilinx' Timer Counter driver (XTmrCtr_*) * @@ -6,7 +6,7 @@ * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/lib/memory.cpp b/fpga/lib/memory.cpp index ef7959227..1970e113f 100644 --- a/fpga/lib/memory.cpp +++ b/fpga/lib/memory.cpp @@ -1,9 +1,9 @@ -/** Memory managment. +/* Memory managment. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/node.cpp b/fpga/lib/node.cpp index cb090345c..ebcc8738c 100644 --- a/fpga/lib/node.cpp +++ b/fpga/lib/node.cpp @@ -1,9 +1,9 @@ -/** An IP node. +/* An IP node. * * Author: Daniel Krebs - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/pcie_card.cpp b/fpga/lib/pcie_card.cpp index 84cedbac1..46fb7ac74 100644 --- a/fpga/lib/pcie_card.cpp +++ b/fpga/lib/pcie_card.cpp @@ -1,9 +1,9 @@ -/** FPGA pciecard. +/* FPGA pciecard. * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/utils.cpp b/fpga/lib/utils.cpp index c8b45eb75..556c79853 100644 --- a/fpga/lib/utils.cpp +++ b/fpga/lib/utils.cpp @@ -1,10 +1,10 @@ -/** Helper function for directly using VILLASfpga outside of VILLASnode +/* Helper function for directly using VILLASfpga outside of VILLASnode * * Author: Niklas Eiling - * SPDX-FileCopyrightText: 2022 Steffen Vogel - * SPDX-FileCopyrightText: 2022 Niklas Eiling + * SPDX-FileCopyrightText: 2022-2023 Steffen Vogel + * SPDX-FileCopyrightText: 2022-2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/lib/vlnv.cpp b/fpga/lib/vlnv.cpp index 1ad7be654..a656e7fd3 100644 --- a/fpga/lib/vlnv.cpp +++ b/fpga/lib/vlnv.cpp @@ -1,9 +1,9 @@ -/** Vendor, Library, Name, Version (VLNV) tag +/* Vendor, Library, Name, Version (VLNV) tag * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/libvillas-fpga.pc.in b/fpga/libvillas-fpga.pc.in index 8cdb66758..a837c35cd 100644 --- a/fpga/libvillas-fpga.pc.in +++ b/fpga/libvillas-fpga.pc.in @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 prefix=@CMAKE_INSTALL_PREFIX@ diff --git a/fpga/past-commits.txt b/fpga/past-commits.txt index cfa27b00a..234cbf163 100644 --- a/fpga/past-commits.txt +++ b/fpga/past-commits.txt @@ -1,4 +1,4 @@ -SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University SPDX-License-Identifier: Apache-2.0 I, Niklas Eiling hereby sign-off-by all of my past commits to this repo subject to the Developer Certificate of Origin (DCO), Version 1.1. In the past I have used emails: niklas.eiling@eonerc.rwth-aachen.de diff --git a/fpga/scripts/gdb_sudo.sh b/fpga/scripts/gdb_sudo.sh index a5caf3f35..a10c8a301 100755 --- a/fpga/scripts/gdb_sudo.sh +++ b/fpga/scripts/gdb_sudo.sh @@ -4,8 +4,7 @@ # See: .vscode directory # # Author: Steffen Vogel -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## sudo pkexec /usr/bin/gdb "$@" diff --git a/fpga/scripts/non_root.sh b/fpga/scripts/non_root.sh index a769db392..3b70f3e44 100755 --- a/fpga/scripts/non_root.sh +++ b/fpga/scripts/non_root.sh @@ -3,9 +3,8 @@ # Setup VFIO for non-root users # # Author: Steffen Vogel -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## # PCI-e parameters of FPGA card PCI_BDF="0000:03:00.0" diff --git a/fpga/scripts/rebind_device.sh b/fpga/scripts/rebind_device.sh index ede55b5d0..7382fff8f 100755 --- a/fpga/scripts/rebind_device.sh +++ b/fpga/scripts/rebind_device.sh @@ -3,9 +3,8 @@ # Detach and rebind a PCI device to a PCI kernel driver # # Author: Steffen Vogel -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## if [ "$#" -ne 2 ]; then echo "usage: $0 BUS:DEV:FNC DRIVER" diff --git a/fpga/scripts/reset_pci_device.sh b/fpga/scripts/reset_pci_device.sh index 31916f651..4cf877597 100755 --- a/fpga/scripts/reset_pci_device.sh +++ b/fpga/scripts/reset_pci_device.sh @@ -3,9 +3,8 @@ # Reset PCI devices like FPGAs after a reflash # # Author: Steffen Vogel -# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## if [ "$#" -ne 1 ]; then echo "usage: $0 BUS:DEV.FNC" diff --git a/fpga/scripts/villas-fpga-cat.sh b/fpga/scripts/villas-fpga-cat.sh index 7046caf47..0fd1a73a8 100755 --- a/fpga/scripts/villas-fpga-cat.sh +++ b/fpga/scripts/villas-fpga-cat.sh @@ -1,9 +1,8 @@ #!/bin/bash # # Author: Niklas Eiling -# SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## CWD=$(dirname -- "$0") diff --git a/fpga/scripts/villas-fpga-xbar-select.sh b/fpga/scripts/villas-fpga-xbar-select.sh index 7b10362a2..1db53ea61 100644 --- a/fpga/scripts/villas-fpga-xbar-select.sh +++ b/fpga/scripts/villas-fpga-xbar-select.sh @@ -1,9 +1,8 @@ #!/bin/bash # # Author: Niklas Eiling -# SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -################################################################################## CWD=$(dirname -- "$0") diff --git a/fpga/src/CMakeLists.txt b/fpga/src/CMakeLists.txt index c9b3ebee8..2d158b2f3 100644 --- a/fpga/src/CMakeLists.txt +++ b/fpga/src/CMakeLists.txt @@ -1,9 +1,8 @@ ## CMakeLists.txt # # Author: Daniel Krebs -# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -############################################################################## add_executable(villas-fpga-ctrl villas-fpga-ctrl.cpp) diff --git a/fpga/src/README.pcimem.md b/fpga/src/README.pcimem.md index f3162cf76..7352b0341 100644 --- a/fpga/src/README.pcimem.md +++ b/fpga/src/README.pcimem.md @@ -1,9 +1,11 @@ # pcimem tool -SPDX-FileCopyrightText: 2010 Bill Farrow -SPDX-FileCopyrightText: 2022 Institute for Automation of Complex Power Systems, EONERC -SPDX-FileCopyrightText: 2000 Jan-Derk Bakker -SPDX-License-Identifier: GPL-2.0-or-later +## License + +- SPDX-FileCopyrightText: 2010 Bill Farrow +- SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, RWTH Aachen University +- SPDX-FileCopyrightText: 2000 Jan-Derk Bakker +- SPDX-License-Identifier: GPL-2.0-or-later ## Overview diff --git a/fpga/src/pcimem.c b/fpga/src/pcimem.c index 23859b432..56199acc8 100644 --- a/fpga/src/pcimem.c +++ b/fpga/src/pcimem.c @@ -1,12 +1,13 @@ -/** Simple program to read/write from/to a pci device from userspace. +/* Simple program to read/write from/to a pci device from userspace. * * SPDX-FileCopyrightText: 2010 Bill Farrow - * SPDX-FileCopyrightText: 2022 Institute for Automation of Complex Power Systems, EONERC + * SPDX-FileCopyrightText: 2023 Institute for Automation of Complex Power Systems, RWTH Aachen University * * Based on the devmem2.c code + * * SPDX-FileCopyrightText: 2000 Jan-Derk Bakker * SPDX-License-Identifier: GPL-2.0-or-later - *********************************************************************************/ + */ #include #include diff --git a/fpga/src/villas-fpga-ctrl.cpp b/fpga/src/villas-fpga-ctrl.cpp index d0ec002c6..dbfb0a979 100644 --- a/fpga/src/villas-fpga-ctrl.cpp +++ b/fpga/src/villas-fpga-ctrl.cpp @@ -1,11 +1,11 @@ -/** Streaming data from STDIN/OUT to FPGA. +/* Streaming data from STDIN/OUT to FPGA. * * Author: Daniel Krebs * Author: Niklas Eiling * SPDX-FileCopyrightText: 2017 Steffen Vogel - * SPDX-FileCopyrightText: 2022 Niklas Eiling + * SPDX-FileCopyrightText: 2022-2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/src/villas-fpga-pipe.cpp b/fpga/src/villas-fpga-pipe.cpp index 2aba4abab..4245dc5da 100644 --- a/fpga/src/villas-fpga-pipe.cpp +++ b/fpga/src/villas-fpga-pipe.cpp @@ -1,9 +1,9 @@ -/** Streaming data from STDIN/OUT to FPGA. +/* Streaming data from STDIN/OUT to FPGA. * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/tests/unit/CMakeLists.txt b/fpga/tests/unit/CMakeLists.txt index 6185b2e6d..5dd25100a 100644 --- a/fpga/tests/unit/CMakeLists.txt +++ b/fpga/tests/unit/CMakeLists.txt @@ -1,9 +1,8 @@ ## CMakeLists.txt # # Author: Daniel Krebs -# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC +# SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, RWTH Aachen University # SPDX-License-Identifier: Apache-2.0 -############################################################################## set(SOURCES dma.cpp diff --git a/fpga/tests/unit/dma.c b/fpga/tests/unit/dma.c index 5aede35c8..7b9ac2949 100644 --- a/fpga/tests/unit/dma.c +++ b/fpga/tests/unit/dma.c @@ -1,9 +1,9 @@ -/** Testing the C bindings for the VILLASfpga DMA interface. +/* Testing the C bindings for the VILLASfpga DMA interface. * * Author: Niklas Eiling * SPDX-FileCopyrightText: 2023 Niklas Eiling * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/tests/unit/dma.cpp b/fpga/tests/unit/dma.cpp index d396b1885..9667355fd 100644 --- a/fpga/tests/unit/dma.cpp +++ b/fpga/tests/unit/dma.cpp @@ -1,9 +1,9 @@ -/** DMA unit test. +/* DMA unit test. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/fifo.cpp b/fpga/tests/unit/fifo.cpp index 6d223be23..6389a7196 100644 --- a/fpga/tests/unit/fifo.cpp +++ b/fpga/tests/unit/fifo.cpp @@ -1,9 +1,9 @@ -/** FIFO unit test. +/* FIFO unit test. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/fpga.cpp b/fpga/tests/unit/fpga.cpp index e41dc3623..909e69ab8 100644 --- a/fpga/tests/unit/fpga.cpp +++ b/fpga/tests/unit/fpga.cpp @@ -1,9 +1,9 @@ -/** FPGA related code for bootstrapping the unit-tests +/* FPGA related code for bootstrapping the unit-tests * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2018 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/global.hpp b/fpga/tests/unit/global.hpp index 2ba503c95..202f49fe2 100644 --- a/fpga/tests/unit/global.hpp +++ b/fpga/tests/unit/global.hpp @@ -1,9 +1,9 @@ -/** Global include for tests. +/* Global include for tests. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #pragma once diff --git a/fpga/tests/unit/gpu.cpp b/fpga/tests/unit/gpu.cpp index 4b2b8f145..00eb4694d 100644 --- a/fpga/tests/unit/gpu.cpp +++ b/fpga/tests/unit/gpu.cpp @@ -1,9 +1,9 @@ -/** GPU unit tests. +/* GPU unit tests. * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/logging.cpp b/fpga/tests/unit/logging.cpp index dc05e7f62..168712094 100644 --- a/fpga/tests/unit/logging.cpp +++ b/fpga/tests/unit/logging.cpp @@ -1,9 +1,9 @@ -/** Logging utilities for unit test. +/* Logging utilities for unit test. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/tests/unit/main.cpp b/fpga/tests/unit/main.cpp index 15585854e..fb92de8c9 100644 --- a/fpga/tests/unit/main.cpp +++ b/fpga/tests/unit/main.cpp @@ -1,9 +1,9 @@ -/** Main Unit Test entry point. +/* Main Unit Test entry point. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include diff --git a/fpga/tests/unit/rtds.cpp b/fpga/tests/unit/rtds.cpp index ca16d91d2..134d1bd1b 100644 --- a/fpga/tests/unit/rtds.cpp +++ b/fpga/tests/unit/rtds.cpp @@ -1,11 +1,11 @@ -/** RTDS AXI-Stream RTT unit test. +/* RTDS AXI-Stream RTT unit test. * * Author: Steffen Vogel * Author: Daniel Krebs * SPDX-FileCopyrightText: 2018 Steffen Vogel * SPDX-FileCopyrightText: 2018 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/rtds2gpu.cpp b/fpga/tests/unit/rtds2gpu.cpp index 366be0313..27d999eb3 100644 --- a/fpga/tests/unit/rtds2gpu.cpp +++ b/fpga/tests/unit/rtds2gpu.cpp @@ -1,9 +1,9 @@ -/** FIFO unit test. +/* FIFO unit test. * * Author: Daniel Krebs * SPDX-FileCopyrightText: 2017 Daniel Krebs * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/rtds_rtt.cpp b/fpga/tests/unit/rtds_rtt.cpp index bc6a63803..0d35de117 100644 --- a/fpga/tests/unit/rtds_rtt.cpp +++ b/fpga/tests/unit/rtds_rtt.cpp @@ -1,9 +1,9 @@ -/** RTDS AXI-Stream RTT unit test. +/* RTDS AXI-Stream RTT unit test. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include diff --git a/fpga/tests/unit/timer.cpp b/fpga/tests/unit/timer.cpp index 1aca8845d..8b8d748d8 100644 --- a/fpga/tests/unit/timer.cpp +++ b/fpga/tests/unit/timer.cpp @@ -1,9 +1,9 @@ -/** Timer/Counter unit test. +/* Timer/Counter unit test. * * Author: Steffen Vogel * SPDX-FileCopyrightText: 2017 Steffen Vogel * SPDX-License-Identifier: Apache-2.0 - *********************************************************************************/ + */ #include #include