diff --git a/include/villas/fpga/ip.h b/include/villas/fpga/ip.h index 90f434331..5d0948bd1 100644 --- a/include/villas/fpga/ip.h +++ b/include/villas/fpga/ip.h @@ -30,22 +30,30 @@ #include "fpga/ips/dft.h" #include "fpga/ips/intc.h" +enum fpga_ip_types { + FPGA_IP_TYPE_DM_DMA, /**< A datamover IP exchanges streaming data between the FPGA and the CPU. */ + FPGA_IP_TYPE_DM_FIFO, /**< A datamover IP exchanges streaming data between the FPGA and the CPU. */ + FPGA_IP_TYPE_MODEL, /**< A model IP simulates a system on the FPGA. */ + FPGA_IP_TYPE_MATH, /**< A math IP performs some kind of mathematical operation on the streaming data */ + FPGA_IP_TYPE_MISC, /**< Other IP components like timer, counters, interrupt conctrollers or routing. */ + FPGA_IP_TYPE_INTERFACE /**< A interface IP connects the FPGA to another system or controller. */ +} type; + struct fpga_ip_type { struct fpga_vlnv vlnv; - enum { - FPGA_IP_TYPE_DATAMOVER, /**< A datamover IP exchanges streaming data between the FPGA and the CPU. */ - FPGA_IP_TYPE_MODEL, /**< A model IP simulates a system on the FPGA. */ - FPGA_IP_TYPE_MATH, /**< A math IP performs some kind of mathematical operation on the streaming data */ - FPGA_IP_TYPE_MISC, /**< Other IP components like timer, counters, interrupt conctrollers or routing. */ - FPGA_IP_TYPE_INTERFACE /**< A interface IP connects the FPGA to another system or controller. */ - } type; + enum fpga_ip_types type; - int (*parse)(struct fpga_ip *c); int (*init)(struct fpga_ip *c); + int (*parse)(struct fpga_ip *c); + int (*check)(struct fpga_ip *c); + int (*start)(struct fpga_ip *c); + int (*stop)(struct fpga_ip *c); int (*destroy)(struct fpga_ip *c); int (*reset)(struct fpga_ip *c); void (*dump)(struct fpga_ip *c); + + size_t size; /**< Amount of memory which should be reserved for struct fpga_ip::_vd */ }; struct fpga_ip { @@ -55,6 +63,7 @@ struct fpga_ip { enum state state; /**< The current state of the FPGA IP component. */ struct fpga_ip_type *_vt; /**< Vtable containing FPGA IP type function pointers. */ + void *_vd; /**< Virtual data (used by struct fpga_ip::_vt functions) */ uintptr_t baseaddr; /**< The baseadress of this FPGA IP component */ uintptr_t baseaddr_axi4; /**< Used by AXI4 FIFO DM */ @@ -62,34 +71,37 @@ struct fpga_ip { int port; /**< The port of the AXI4-Stream switch to which this FPGA IP component is connected. */ int irq; /**< The interrupt number of the FPGA IP component. */ - union { - struct model model; - struct timer timer; - struct fifo fifo; - struct dma dma; - struct sw sw; - struct dft dft; - struct intc intc; - }; /**< Specific private date per FPGA IP type. Depends on fpga_ip::_vt */ - struct fpga_card *card; /**< The FPGA to which this IP instance belongs to. */ config_setting_t *cfg; }; -/** Initialize IP instance. */ -int fpga_ip_init(struct fpga_ip *c); +/** Initialize IP core. */ +int fpga_ip_init(struct fpga_ip *c, struct fpga_ip_type *vt); -/** Release dynamic memory allocated by this IP instance. */ +/** Parse IP core configuration from configuration file */ +int fpga_ip_parse(struct fpga_ip *c, config_setting_t *cfg); + +/** Check configuration of IP core. */ +int fpga_ip_check(struct fpga_ip *c); + +/** Start IP core. */ +int fpga_ip_start(struct fpga_ip *c); + +/** Stop IP core. */ +int fpga_ip_stop(struct fpga_ip *c); + +/** Release dynamic memory allocated by this IP core. */ int fpga_ip_destroy(struct fpga_ip *c); -/** Dump details about this IP instance to stdout. */ +/** Dump details about this IP core to stdout. */ void fpga_ip_dump(struct fpga_ip *c); /** Reset IP component to its initial state. */ int fpga_ip_reset(struct fpga_ip *c); -/** Parse IP configuration from configuration file */ -int fpga_ip_parse(struct fpga_ip *c, config_setting_t *cfg); +/** Find a registered FPGA IP core type with the given VLNV identifier. */ +struct fpga_ip_type * fpga_ip_type_lookup(const char *vstr); + /** @} */ \ No newline at end of file diff --git a/lib/fpga/ip.c b/lib/fpga/ip.c index 95db9336d..cde0080d3 100644 --- a/lib/fpga/ip.c +++ b/lib/fpga/ip.c @@ -9,54 +9,32 @@ #include "log.h" #include "plugin.h" -int fpga_ip_init(struct fpga_ip *c) +int fpga_ip_init(struct fpga_ip *c, struct fpga_ip_type *vt) { int ret; + + assert(c->state == STATE_DESTROYED); + + c->_vt = vt; + c->_vd = alloc(vt->size); - ret = c->_vt && c->_vt->init ? c->_vt->init(c) : 0; + ret = c->_vt->init ? c->_vt->init(c) : 0; if (ret) - error("Failed to intialize IP core: %s", c->name); + return ret; - if (ret == 0) - c->state = STATE_INITIALIZED; + c->state = STATE_INITIALIZED; debug(8, "IP Core %s initalized (%u)", c->name, ret); return ret; } -int fpga_ip_reset(struct fpga_ip *c) -{ - debug(3, "Reset IP core: %s", c->name); - - return c->_vt && c->_vt->reset ? c->_vt->reset(c) : 0; -} - -int fpga_ip_destroy(struct fpga_ip *c) -{ - if (c->_vt && c->_vt->destroy) - c->_vt->destroy(c); - - fpga_vlnv_destroy(&c->vlnv); - - return 0; -} - -void fpga_ip_dump(struct fpga_ip *c) -{ - info("IP %s: vlnv=%s:%s:%s:%s baseaddr=%#jx, irq=%d, port=%d", - c->name, c->vlnv.vendor, c->vlnv.library, c->vlnv.name, c->vlnv.version, - c->baseaddr, c->irq, c->port); - - if (c->_vt && c->_vt->dump) - c->_vt->dump(c); -} - int fpga_ip_parse(struct fpga_ip *c, config_setting_t *cfg) { int ret; - const char *vlnv; long long baseaddr; + + assert(c->state != STATE_STARTED && c->state != STATE_DESTROYED); c->cfg = cfg; @@ -64,22 +42,6 @@ int fpga_ip_parse(struct fpga_ip *c, config_setting_t *cfg) if (!c->name) cerror(cfg, "IP is missing a name"); - if (!config_setting_lookup_string(cfg, "vlnv", &vlnv)) - cerror(cfg, "IP %s is missing the VLNV identifier", c->name); - - ret = fpga_vlnv_parse(&c->vlnv, vlnv); - if (ret) - cerror(cfg, "Failed to parse VLNV identifier"); - - /* Try to find matching IP type */ - list_foreach(struct plugin *l, &plugins) { - if (l->type == PLUGIN_TYPE_FPGA_IP && - !fpga_vlnv_cmp(&c->vlnv, &l->ip.vlnv)) { - c->_vt = &l->ip; - break; - } - } - /* Common settings */ if (config_setting_lookup_int64(cfg, "baseaddr", &baseaddr)) c->baseaddr = baseaddr; @@ -95,6 +57,97 @@ int fpga_ip_parse(struct fpga_ip *c, config_setting_t *cfg) ret = c->_vt && c->_vt->parse ? c->_vt->parse(c) : 0; if (ret) error("Failed to parse settings for IP core '%s'", c->name); + + c->state = STATE_PARSED; return 0; } + +int fpga_ip_start(struct fpga_ip *c) +{ + int ret; + + assert(c->state == STATE_CHECKED); + + ret = c->_vt->start ? c->_vt->start(c) : 0; + if (ret) + return ret; + + c->state = STATE_STARTED; + + return 0; +} + +int fpga_ip_stop(struct fpga_ip *c) +{ + int ret; + + assert(c->state == STATE_STARTED); + + ret = c->_vt->stop ? c->_vt->stop(c) : 0; + if (ret) + return ret; + + c->state = STATE_STOPPED; + + return 0; +} + +int fpga_ip_destroy(struct fpga_ip *c) +{ + int ret; + + assert(c->state != STATE_DESTROYED); + + fpga_vlnv_destroy(&c->vlnv); + + ret = c->_vt->destroy ? c->_vt->destroy(c) : 0; + if (ret) + return ret; + + c->state = STATE_DESTROYED; + + free(c->_vd); + + return 0; +} + +int fpga_ip_reset(struct fpga_ip *c) +{ + debug(3, "Reset IP core: %s", c->name); + + return c->_vt->reset ? c->_vt->reset(c) : 0; +} + +void fpga_ip_dump(struct fpga_ip *c) +{ + assert(c->state != STATE_DESTROYED); + + info("IP %s: vlnv=%s:%s:%s:%s baseaddr=%#jx, irq=%d, port=%d", + c->name, c->vlnv.vendor, c->vlnv.library, c->vlnv.name, c->vlnv.version, + c->baseaddr, c->irq, c->port); + + if (c->_vt->dump) + c->_vt->dump(c); +} + +struct fpga_ip_type * fpga_ip_type_lookup(const char *vstr) +{ + int ret; + + struct fpga_vlnv vlnv; + + ret = fpga_vlnv_parse(&vlnv, vstr); + if (ret) + return NULL; + + /* Try to find matching IP type */ + for (size_t i = 0; i < list_length(&plugins); i++) { + struct plugin *p = list_at(&plugins, i); + + if (p->type == PLUGIN_TYPE_FPGA_IP && !fpga_vlnv_cmp(&vlnv, &p->ip.vlnv)) + return &p->ip; + } + + return NULL; +} \ No newline at end of file diff --git a/lib/fpga/ips/dft.c b/lib/fpga/ips/dft.c index 2ce6c8c6b..693c43637 100644 --- a/lib/fpga/ips/dft.c +++ b/lib/fpga/ips/dft.c @@ -14,7 +14,7 @@ int dft_parse(struct fpga_ip *c) { - struct dft *dft = &c->dft; + struct dft *dft = (struct dft *) &c->_vd; config_setting_t *cfg_harms; @@ -48,7 +48,7 @@ int dft_init(struct fpga_ip *c) int ret; struct fpga_card *f = c->card; - struct dft *dft = &c->dft; + struct dft *dft = (struct dft *) &c->_vd; XHls_dft *xdft = &dft->inst; XHls_dft_Config xdft_cfg = { @@ -78,7 +78,8 @@ int dft_init(struct fpga_ip *c) int dft_destroy(struct fpga_ip *c) { - struct dft *dft = &c->dft; + struct dft *dft = (struct dft *) &c->_vd; + XHls_dft *xdft = &dft->inst; XHls_dft_DisableAutoRestart(xdft); @@ -100,7 +101,8 @@ static struct plugin p = { .type = FPGA_IP_TYPE_MATH, .init = dft_init, .destroy = dft_destroy, - .parse = dft_parse + .parse = dft_parse, + .size = sizeof(struct dft) } }; diff --git a/lib/fpga/ips/dma.c b/lib/fpga/ips/dma.c index b01ba4e10..d597ff252 100644 --- a/lib/fpga/ips/dma.c +++ b/lib/fpga/ips/dma.c @@ -53,7 +53,7 @@ int dma_alloc(struct fpga_ip *c, struct dma_mem *mem, size_t len, int flags) if (mem->base_virt == MAP_FAILED) return -1; - ret = vfio_map_dma(f->vd.group->container, (uint64_t) mem->base_virt, (uint64_t) mem->base_phys, mem->len); + ret = vfio_map_dma(f->vfio_device.group->container, (uint64_t) mem->base_virt, (uint64_t) mem->base_phys, mem->len); if (ret) return -2; @@ -64,7 +64,7 @@ int dma_free(struct fpga_ip *c, struct dma_mem *mem) { int ret; - ret = vfio_unmap_dma(c->card->vd.group->container, (uint64_t) mem->base_virt, (uint64_t) mem->base_phys, mem->len); + ret = vfio_unmap_dma(c->card->vfio_device.group->container, (uint64_t) mem->base_virt, (uint64_t) mem->base_phys, mem->len); if (ret) return ret; @@ -100,7 +100,9 @@ int dma_ping_pong(struct fpga_ip *c, char *src, char *dst, size_t len) int dma_write(struct fpga_ip *c, char *buf, size_t len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; debug(25, "DMA write: dmac=%s buf=%p len=%#zx", c->name, buf, len); @@ -111,7 +113,9 @@ int dma_write(struct fpga_ip *c, char *buf, size_t len) int dma_read(struct fpga_ip *c, char *buf, size_t len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; debug(25, "DMA read: dmac=%s buf=%p len=%#zx", c->name, buf, len); @@ -122,8 +126,10 @@ int dma_read(struct fpga_ip *c, char *buf, size_t len) int dma_read_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; - + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; + debug(25, "DMA read complete: dmac=%s", c->name); return xdma->HasSg @@ -133,8 +139,10 @@ int dma_read_complete(struct fpga_ip *c, char **buf, size_t *len) int dma_write_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; - + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; + debug(25, "DMA write complete: dmac=%s", c->name); return xdma->HasSg @@ -146,7 +154,9 @@ int dma_sg_write(struct fpga_ip *c, char *buf, size_t len) { int ret, bdcnt; - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetTxRing(xdma); XAxiDma_Bd *bds, *bd; @@ -221,7 +231,9 @@ int dma_sg_read(struct fpga_ip *c, char *buf, size_t len) { int ret, bdcnt; - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetRxRing(xdma); XAxiDma_Bd *bds, *bd; @@ -287,7 +299,9 @@ out: int dma_sg_write_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetTxRing(xdma); XAxiDma_Bd *bds; @@ -316,7 +330,9 @@ int dma_sg_write_complete(struct fpga_ip *c, char **buf, size_t *len) int dma_sg_read_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetRxRing(xdma); XAxiDma_Bd *bds, *bd; @@ -368,7 +384,9 @@ int dma_sg_read_complete(struct fpga_ip *c, char **buf, size_t *len) int dma_simple_read(struct fpga_ip *c, char *buf, size_t len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetRxRing(xdma); /* Checks */ @@ -404,7 +422,9 @@ int dma_simple_read(struct fpga_ip *c, char *buf, size_t len) int dma_simple_write(struct fpga_ip *c, char *buf, size_t len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetTxRing(xdma); /* Checks */ @@ -441,7 +461,9 @@ int dma_simple_write(struct fpga_ip *c, char *buf, size_t len) int dma_simple_read_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetRxRing(xdma); while (!(XAxiDma_IntrGetIrq(xdma, XAXIDMA_DEVICE_TO_DMA) & XAXIDMA_IRQ_IOC_MASK)) @@ -462,7 +484,9 @@ int dma_simple_read_complete(struct fpga_ip *c, char **buf, size_t *len) int dma_simple_write_complete(struct fpga_ip *c, char **buf, size_t *len) { - XAxiDma *xdma = &c->dma.inst; + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma *xdma = &dma->inst; XAxiDma_BdRing *ring = XAxiDma_GetTxRing(xdma); while (!(XAxiDma_IntrGetIrq(xdma, XAXIDMA_DMA_TO_DEVICE) & XAXIDMA_IRQ_IOC_MASK)) @@ -539,7 +563,8 @@ static int dma_init_rings(XAxiDma *xdma, struct dma_mem *bd) int dma_init(struct fpga_ip *c) { int ret, sg; - struct dma *dma = &c->dma; + struct dma *dma = (struct dma *) &c->_vd; + XAxiDma *xdma = &dma->inst; /* Guess DMA type */ @@ -593,7 +618,9 @@ int dma_init(struct fpga_ip *c) int dma_reset(struct fpga_ip *c) { - XAxiDma_Reset(&c->dma.inst); + struct dma *dma = (struct dma *) &c->_vd; + + XAxiDma_Reset(&dma->inst); return 0; } @@ -606,7 +633,8 @@ static struct plugin p = { .vlnv = { "xilinx.com", "ip", "axi_dma", NULL }, .type = FPGA_IP_TYPE_DATAMOVER, .init = dma_init, - .reset = dma_reset + .reset = dma_reset, + .size = sizeof(struct dma) } }; diff --git a/lib/fpga/ips/fifo.c b/lib/fpga/ips/fifo.c index 5d2dc137d..87c6f9817 100644 --- a/lib/fpga/ips/fifo.c +++ b/lib/fpga/ips/fifo.c @@ -19,9 +19,9 @@ int fifo_init(struct fpga_ip *c) { int ret; - + struct fpga_card *f = c->card; - struct fifo *fifo = &c->fifo; + struct fifo *fifo = (struct fifo *) &c->_vd; XLlFifo *xfifo = &fifo->inst; XLlFifo_Config fifo_cfg = { @@ -41,43 +41,48 @@ int fifo_init(struct fpga_ip *c) ssize_t fifo_write(struct fpga_ip *c, char *buf, size_t len) { - XLlFifo *fifo = &c->fifo.inst; + struct fifo *fifo = (struct fifo *) &c->_vd; + + XLlFifo *xllfifo = &fifo->inst; + uint32_t tdfv; - tdfv = XLlFifo_TxVacancy(fifo); + tdfv = XLlFifo_TxVacancy(xllfifo); if (tdfv < len) return -1; - XLlFifo_Write(fifo, buf, len); - XLlFifo_TxSetLen(fifo, len); + XLlFifo_Write(xllfifo, buf, len); + XLlFifo_TxSetLen(xllfifo, len); return len; } ssize_t fifo_read(struct fpga_ip *c, char *buf, size_t len) { - XLlFifo *fifo = &c->fifo.inst; + struct fifo *fifo = (struct fifo *) &c->_vd; + + XLlFifo *xllfifo = &fifo->inst; size_t nextlen = 0; uint32_t rxlen; - while (!XLlFifo_IsRxDone(fifo)) + while (!XLlFifo_IsRxDone(xllfifo)) intc_wait(c->card->intc, c->irq); - XLlFifo_IntClear(fifo, XLLF_INT_RC_MASK); + XLlFifo_IntClear(xllfifo, XLLF_INT_RC_MASK); /* Get length of next frame */ - rxlen = XLlFifo_RxGetLen(fifo); + rxlen = XLlFifo_RxGetLen(xllfifo); nextlen = MIN(rxlen, len); /* Read from FIFO */ - XLlFifo_Read(fifo, buf, nextlen); + XLlFifo_Read(xllfifo, buf, nextlen); return nextlen; } int fifo_parse(struct fpga_ip *c) { - struct fifo *fifo = &c->fifo; + struct fifo *fifo = (struct fifo *) &c->_vd; int baseaddr_axi4; @@ -91,7 +96,9 @@ int fifo_parse(struct fpga_ip *c) int fifo_reset(struct fpga_ip *c) { - XLlFifo_Reset(&c->fifo.inst); + struct fifo *fifo = (struct fifo *) &c->_vd; + + XLlFifo_Reset(&fifo->inst); return 0; } @@ -105,7 +112,8 @@ static struct plugin p = { .type = FPGA_IP_TYPE_DATAMOVER, .init = fifo_init, .parse = fifo_parse, - .reset = fifo_reset + .reset = fifo_reset, + .size = sizeof(struct fifo) } }; diff --git a/lib/fpga/ips/intc.c b/lib/fpga/ips/intc.c index 22c596fc3..9a3084040 100644 --- a/lib/fpga/ips/intc.c +++ b/lib/fpga/ips/intc.c @@ -24,18 +24,18 @@ int intc_init(struct fpga_ip *c) int ret; struct fpga_card *f = c->card; - struct intc *intc = &c->intc; + struct intc *intc = (struct intc *) &c->_vd; uintptr_t base = (uintptr_t) f->map + c->baseaddr; if (c != f->intc) error("There can be only one interrupt controller per FPGA"); - intc->num_irqs = vfio_pci_msi_init(&f->vd, intc->efds); + intc->num_irqs = vfio_pci_msi_init(&f->vfio_device, intc->efds); if (intc->num_irqs < 0) return -1; - ret = vfio_pci_msi_find(&f->vd, intc->nos); + ret = vfio_pci_msi_find(&f->vfio_device, intc->nos); if (ret) return -2; @@ -64,9 +64,9 @@ int intc_init(struct fpga_ip *c) int intc_destroy(struct fpga_ip *c) { struct fpga_card *f = c->card; - struct intc *intc = &c->intc; + struct intc *intc = (struct intc *) &c->_vd; - vfio_pci_msi_deinit(&f->vd, intc->efds); + vfio_pci_msi_deinit(&f->vfio_device, intc->efds); return 0; } @@ -74,7 +74,7 @@ int intc_destroy(struct fpga_ip *c) int intc_enable(struct fpga_ip *c, uint32_t mask, int flags) { struct fpga_card *f = c->card; - struct intc *intc = &c->intc; + struct intc *intc = (struct intc *) &c->_vd; uint32_t ier, imr; uintptr_t base = (uintptr_t) f->map + c->baseaddr; @@ -124,7 +124,7 @@ int intc_disable(struct fpga_ip *c, uint32_t mask) uint64_t intc_wait(struct fpga_ip *c, int irq) { struct fpga_card *f = c->card; - struct intc *intc = &c->intc; + struct intc *intc = (struct intc *) &c->_vd; uintptr_t base = (uintptr_t) f->map + c->baseaddr; @@ -158,7 +158,8 @@ static struct plugin p = { .vlnv = { "acs.eonerc.rwth-aachen.de", "user", "axi_pcie_intc", NULL }, .type = FPGA_IP_TYPE_MISC, .init = intc_init, - .destroy = intc_destroy + .destroy = intc_destroy, + .size = sizeof(struct intc) } }; diff --git a/lib/fpga/ips/model.c b/lib/fpga/ips/model.c index 6d91293bb..d97528ae0 100644 --- a/lib/fpga/ips/model.c +++ b/lib/fpga/ips/model.c @@ -135,15 +135,15 @@ static int model_xsg_map_read(uint32_t *map, size_t len, void *baseaddr) int model_parse(struct fpga_ip *c) { - struct model *m = &c->model; + struct model *m = (struct model *) &c->_vd; struct model_param p; config_setting_t *cfg_params, *cfg_param; if (strcmp(c->vlnv.library, "hls") == 0) - c->model.type = MODEL_TYPE_HLS; + m->type = MODEL_TYPE_HLS; else if (strcmp(c->vlnv.library, "sysgen") == 0) - c->model.type = MODEL_TYPE_XSG; + m->type = MODEL_TYPE_XSG; else cerror(c->cfg, "Invalid model type: %s", c->vlnv.library); @@ -194,7 +194,8 @@ static int model_init_from_xsg_map(struct model *m, void *baseaddr) int model_init(struct fpga_ip *c) { int ret; - struct model *m = &c->model; + + struct model *m = (struct model *) &c->_vd; list_init(&m->parameters); list_init(&m->infos); @@ -222,7 +223,7 @@ int model_init(struct fpga_ip *c) int model_destroy(struct fpga_ip *c) { - struct model *m = &c->model; + struct model *m = (struct model *) &c->_vd; list_destroy(&m->parameters, (dtor_cb_t) model_param_destroy, true); list_destroy(&m->infos, (dtor_cb_t) model_info_destroy, true); @@ -235,7 +236,7 @@ int model_destroy(struct fpga_ip *c) void model_dump(struct fpga_ip *c) { - struct model *m = &c->model; + struct model *m = (struct model *) &c->_vd; const char *param_type[] = { "UFix", "Fix", "Float", "Boolean" }; const char *parameter_dirs[] = { "In", "Out", "In/Out" }; @@ -322,7 +323,7 @@ int model_param_write(struct model_param *p, double v) void model_param_add(struct fpga_ip *c, const char *name, enum model_param_direction dir, enum model_param_type type) { - struct model *m = &c->model; + struct model *m = (struct model *) &c->_vd; struct model_param *p = alloc(sizeof(struct model_param)); p->name = strdup(name); @@ -334,7 +335,7 @@ void model_param_add(struct fpga_ip *c, const char *name, enum model_param_direc int model_param_remove(struct fpga_ip *c, const char *name) { - struct model *m = &c->model; + struct model *m = (struct model *) &c->_vd; struct model_param *p; p = list_lookup(&m->parameters, name); @@ -385,7 +386,8 @@ static struct plugin p_sysgen = { .init = model_init, .destroy = model_destroy, .dump = model_dump, - .parse= model_parse + .parse = model_parse, + .size = sizeof(struct model) } }; diff --git a/lib/fpga/ips/rtds_axis.c b/lib/fpga/ips/rtds_axis.c index db1a6a0e5..76f11f6e6 100644 --- a/lib/fpga/ips/rtds_axis.c +++ b/lib/fpga/ips/rtds_axis.c @@ -56,7 +56,8 @@ static struct plugin p = { .ip = { .vlnv = { "acs.eonerc.rwth-aachen.de", "user", "rtds_axis", NULL }, .type = FPGA_IP_TYPE_INTERFACE, - .dump = rtds_axis_dump + .dump = rtds_axis_dump, + .size = 0 } }; diff --git a/lib/fpga/ips/switch.c b/lib/fpga/ips/switch.c index 2ba9fcd5c..5606388ae 100644 --- a/lib/fpga/ips/switch.c +++ b/lib/fpga/ips/switch.c @@ -19,7 +19,7 @@ int switch_init(struct fpga_ip *c) int ret; struct fpga_card *f = c->card; - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; XAxis_Switch *xsw = &sw->inst; @@ -51,7 +51,7 @@ int switch_init(struct fpga_ip *c) int switch_init_paths(struct fpga_ip *c) { int ret; - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; XAxis_Switch *xsw = &sw->inst; @@ -79,7 +79,7 @@ int switch_init_paths(struct fpga_ip *c) int switch_destroy(struct fpga_ip *c) { - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; list_destroy(&sw->paths, NULL, true); @@ -89,7 +89,7 @@ int switch_destroy(struct fpga_ip *c) int switch_parse(struct fpga_ip *c) { struct fpga_card *f = c->card; - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; list_init(&sw->paths); @@ -140,7 +140,7 @@ int switch_parse(struct fpga_ip *c) int switch_connect(struct fpga_ip *c, struct fpga_ip *mi, struct fpga_ip *si) { - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; XAxis_Switch *xsw = &sw->inst; uint32_t mux, port; @@ -176,7 +176,7 @@ int switch_connect(struct fpga_ip *c, struct fpga_ip *mi, struct fpga_ip *si) int switch_disconnect(struct fpga_ip *c, struct fpga_ip *mi, struct fpga_ip *si) { - struct sw *sw = &c->sw; + struct sw *sw = (struct sw *) &c->_vd; XAxis_Switch *xsw = &sw->inst; if (!XAxisScr_IsMiPortEnabled(xsw, mi->port, si->port)) @@ -196,7 +196,8 @@ static struct plugin p = { .type = FPGA_IP_TYPE_MISC, .init = switch_init, .destroy = switch_destroy, - .parse = switch_parse + .parse = switch_parse, + .size = sizeof(struct sw) } }; diff --git a/lib/fpga/ips/timer.c b/lib/fpga/ips/timer.c index 530d2b32c..f4df11da3 100644 --- a/lib/fpga/ips/timer.c +++ b/lib/fpga/ips/timer.c @@ -17,7 +17,7 @@ int timer_init(struct fpga_ip *c) { struct fpga_card *f = c->card; - struct timer *tmr = &c->timer; + struct timer *tmr = (struct timer *) &c->_vd; XTmrCtr *xtmr = &tmr->inst; XTmrCtr_Config xtmr_cfg = { @@ -39,6 +39,7 @@ static struct plugin p = { .vlnv = { "xilinx.com", "ip", "axi_timer", NULL }, .type = FPGA_IP_TYPE_MISC, .init = timer_init + .size = sizeof(struct timer) } };