From 21333379a9a672a61ba7b8dcac2ae3a28ab06770 Mon Sep 17 00:00:00 2001 From: Daniel Krebs Date: Tue, 13 Feb 2018 14:58:58 +0100 Subject: [PATCH] lib/ips/fifo: fix decision if AXI4 data interface is present --- fpga/lib/ips/fifo.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/fpga/lib/ips/fifo.cpp b/fpga/lib/ips/fifo.cpp index 23766a7d0..d608b9958 100644 --- a/fpga/lib/ips/fifo.cpp +++ b/fpga/lib/ips/fifo.cpp @@ -60,10 +60,13 @@ bool Fifo::init() XLlFifo_Config fifo_cfg; - fifo_cfg.Axi4BaseAddress = getBaseAddr(axi4Memory); - - // use AXI4 for Data, AXI4-Lite for control - fifo_cfg.Datainterface = (fifo_cfg.Axi4BaseAddress != -1) ? 1 : 0; + try { + // if this throws an exception, then there's no AXI4 data interface + fifo_cfg.Axi4BaseAddress = getBaseAddr(axi4Memory); + fifo_cfg.Datainterface = 1; + } catch(const std::out_of_range&) { + fifo_cfg.Datainterface = 0; + } if (XLlFifo_CfgInitialize(&xFifo, &fifo_cfg, getBaseAddr(registerMemory)) != XST_SUCCESS) return false;