diff --git a/fpga/include/villas/fpga/ips/aurora_xilinx.hpp b/fpga/include/villas/fpga/ips/aurora_xilinx.hpp
index d25384620..5f7275411 100644
--- a/fpga/include/villas/fpga/ips/aurora_xilinx.hpp
+++ b/fpga/include/villas/fpga/ips/aurora_xilinx.hpp
@@ -30,8 +30,8 @@ namespace ip {
 
 class AuroraXilinx : public Node {
 public:
-	static constexpr const char* masterPort = "m_axis";
-	static constexpr const char* slavePort = "s_axis";
+	static constexpr const char* masterPort = "USER_DATA_M_AXI_RX";
+	static constexpr const char* slavePort = "USER_DATA_S_AXI_TX";
 
 	const StreamVertex&
 	getDefaultSlavePort() const