From 3e64e5d2384ec7d1c82852ccb3a9011083e79408 Mon Sep 17 00:00:00 2001 From: Niklas Eiling Date: Tue, 19 Dec 2023 11:06:19 +0100 Subject: [PATCH] hwdef-parse.py: add interrupt controller added as module_ref to whitelist Signed-off-by: Niklas Eiling --- fpga/scripts/hwdef-parse.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/fpga/scripts/hwdef-parse.py b/fpga/scripts/hwdef-parse.py index 8ad404dca..7633f9ee5 100755 --- a/fpga/scripts/hwdef-parse.py +++ b/fpga/scripts/hwdef-parse.py @@ -46,6 +46,7 @@ whitelist = [ [ 'xilinx.com', 'ip', 'axi_iic' ], [ 'xilinx.com', 'module_ref', 'dinoif_fast' ], [ 'xilinx.com', 'module_ref', 'dinoif_dac' ], + [ 'xilinx.com', 'module_ref', 'axi_pcie_intc' ], [ 'xilinx.com', 'hls', 'rtds2gpu' ], [ 'xilinx.com', 'hls', 'mem' ], [ 'acs.eonerc.rwth-aachen.de', 'user', 'axi_pcie_intc' ], @@ -149,7 +150,7 @@ for module in modules: params = module.find('.//PARAMETERS') if params is not None and instance != "zynq_ultra_ps_e_0": #! Parameters of "zynq" ignored p = ips[instance].setdefault('parameters', {}) - + for param in params: name = param.get('NAME').lower() value = param.get('VALUE') @@ -288,9 +289,9 @@ for bram in brams: width = bram.find('.//PARAMETER[@NAME="DATA_WIDTH"]').get('VALUE') depth = bram.find('.//PARAMETER[@NAME="MEM_DEPTH"]').get('VALUE') - + size = int(width) * int(depth) / 8 - + if instance in ips: ips[instance]['size'] = int(size)