From 4fb804ac4421ef3b711596ee8831436b79f430a5 Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Fri, 11 Nov 2022 07:18:16 -0500 Subject: [PATCH] ips: fix declarations of virtual member functions Signed-off-by: Steffen Vogel --- fpga/include/villas/fpga/ips/aurora.hpp | 3 ++- fpga/include/villas/fpga/ips/bram.hpp | 10 +++++---- fpga/include/villas/fpga/ips/dma.hpp | 10 ++++++--- fpga/include/villas/fpga/ips/emc.hpp | 3 ++- fpga/include/villas/fpga/ips/fifo.hpp | 7 ++++-- fpga/include/villas/fpga/ips/gpio.hpp | 3 ++- fpga/include/villas/fpga/ips/gpu2rtds.hpp | 3 ++- fpga/include/villas/fpga/ips/hls.hpp | 3 ++- fpga/include/villas/fpga/ips/intc.hpp | 4 +++- fpga/include/villas/fpga/ips/pcie.hpp | 3 ++- fpga/include/villas/fpga/ips/rtds.hpp | 4 +++- fpga/include/villas/fpga/ips/rtds2gpu.hpp | 9 +++++++- fpga/include/villas/fpga/ips/switch.hpp | 15 ++++++------- fpga/include/villas/fpga/ips/timer.hpp | 26 +++++++++++++---------- 14 files changed, 66 insertions(+), 37 deletions(-) diff --git a/fpga/include/villas/fpga/ips/aurora.hpp b/fpga/include/villas/fpga/ips/aurora.hpp index 90d3ec65e..3fcdcd0e0 100644 --- a/fpga/include/villas/fpga/ips/aurora.hpp +++ b/fpga/include/villas/fpga/ips/aurora.hpp @@ -34,7 +34,8 @@ public: static constexpr const char* masterPort = "m_axis"; static constexpr const char* slavePort = "s_axis"; - void dump(); + virtual + void dump() override; std::list getMemoryBlocks() const { diff --git a/fpga/include/villas/fpga/ips/bram.hpp b/fpga/include/villas/fpga/ips/bram.hpp index d9e1d79d3..19932fec9 100644 --- a/fpga/include/villas/fpga/ips/bram.hpp +++ b/fpga/include/villas/fpga/ips/bram.hpp @@ -33,16 +33,18 @@ class Bram : public Core { friend class BramFactory; public: - bool init(); + virtual + bool init() override; - LinearAllocator& - getAllocator() + LinearAllocator& getAllocator() { return *allocator; } private: - static constexpr const char* memoryBlock = "Mem0"; + static constexpr + const char* memoryBlock = "Mem0"; + std::list getMemoryBlocks() const { return { diff --git a/fpga/include/villas/fpga/ips/dma.hpp b/fpga/include/villas/fpga/ips/dma.hpp index cb18ff4e1..75716b4d8 100644 --- a/fpga/include/villas/fpga/ips/dma.hpp +++ b/fpga/include/villas/fpga/ips/dma.hpp @@ -40,8 +40,11 @@ public: friend class DmaFactory; ~Dma(); - bool init(); - bool reset(); + virtual + bool init() override; + + virtual + bool reset() override; // Memory-mapped to stream (MM2S) bool write(const MemoryBlock &mem, size_t len); @@ -101,7 +104,8 @@ public: bool isMemoryBlockAccesible(const MemoryBlock &mem, const std::string &interface); - virtual void dump(); + virtual + void dump() override; private: static constexpr char registerMemory[] = "Reg"; diff --git a/fpga/include/villas/fpga/ips/emc.hpp b/fpga/include/villas/fpga/ips/emc.hpp index 2ede06ed8..f66852b6b 100644 --- a/fpga/include/villas/fpga/ips/emc.hpp +++ b/fpga/include/villas/fpga/ips/emc.hpp @@ -34,7 +34,8 @@ namespace ip { class EMC : public Core { public: - bool init(); + virtual + bool init() override; bool flash(uint32_t offset, const std::string &filename); bool flash(uint32_t offset, uint32_t length, uint8_t *data); diff --git a/fpga/include/villas/fpga/ips/fifo.hpp b/fpga/include/villas/fpga/ips/fifo.hpp index b54713048..5c33b97a8 100644 --- a/fpga/include/villas/fpga/ips/fifo.hpp +++ b/fpga/include/villas/fpga/ips/fifo.hpp @@ -38,8 +38,11 @@ class Fifo : public Node { public: friend class FifoFactory; - bool init(); - bool stop(); + virtual + bool init() override; + + virtual + bool stop() override; size_t write(const void* buf, size_t len); size_t read(void* buf, size_t len); diff --git a/fpga/include/villas/fpga/ips/gpio.hpp b/fpga/include/villas/fpga/ips/gpio.hpp index 098bf50ff..2c73fc4ff 100644 --- a/fpga/include/villas/fpga/ips/gpio.hpp +++ b/fpga/include/villas/fpga/ips/gpio.hpp @@ -33,7 +33,8 @@ namespace ip { class GeneralPurposeIO : public Core { public: - bool init(); + virtual + bool init() override; private: diff --git a/fpga/include/villas/fpga/ips/gpu2rtds.hpp b/fpga/include/villas/fpga/ips/gpu2rtds.hpp index 2c37f54eb..03444ebcd 100644 --- a/fpga/include/villas/fpga/ips/gpu2rtds.hpp +++ b/fpga/include/villas/fpga/ips/gpu2rtds.hpp @@ -16,7 +16,8 @@ class Gpu2Rtds : public Node, public Hls public: friend class Gpu2RtdsFactory; - bool init(); + virtual + bool init() override; void dump(spdlog::level::level_enum logLevel = spdlog::level::info); bool startOnce(size_t frameSize); diff --git a/fpga/include/villas/fpga/ips/hls.hpp b/fpga/include/villas/fpga/ips/hls.hpp index dab8110c6..23e9127e7 100644 --- a/fpga/include/villas/fpga/ips/hls.hpp +++ b/fpga/include/villas/fpga/ips/hls.hpp @@ -10,7 +10,8 @@ namespace ip { class Hls : public virtual Core { public: - virtual bool init() + virtual + bool init() override { auto ®isters = addressTranslations.at(registerMemory); diff --git a/fpga/include/villas/fpga/ips/intc.hpp b/fpga/include/villas/fpga/ips/intc.hpp index 8083e8eeb..d707b5140 100644 --- a/fpga/include/villas/fpga/ips/intc.hpp +++ b/fpga/include/villas/fpga/ips/intc.hpp @@ -37,9 +37,11 @@ public: using IrqMaskType = uint32_t; static constexpr int maxIrqs = 32; + virtual ~InterruptController(); - bool init(); + virtual + bool init() override; bool enableInterrupt(IrqMaskType mask, bool polling); bool enableInterrupt(IrqPort irq, bool polling) diff --git a/fpga/include/villas/fpga/ips/pcie.hpp b/fpga/include/villas/fpga/ips/pcie.hpp index b41455ab3..2c2316538 100644 --- a/fpga/include/villas/fpga/ips/pcie.hpp +++ b/fpga/include/villas/fpga/ips/pcie.hpp @@ -38,7 +38,8 @@ class AxiPciExpressBridge : public Core { public: friend class AxiPciExpressBridgeFactory; - bool init(); + virtual + bool init() override; private: static constexpr char axiInterface[] = "M_AXI"; diff --git a/fpga/include/villas/fpga/ips/rtds.hpp b/fpga/include/villas/fpga/ips/rtds.hpp index 73ce33f0b..5fc84898b 100644 --- a/fpga/include/villas/fpga/ips/rtds.hpp +++ b/fpga/include/villas/fpga/ips/rtds.hpp @@ -34,7 +34,9 @@ public: static constexpr const char* masterPort = "m_axis"; static constexpr const char* slavePort = "s_axis"; - void dump(); + virtual + void dump() override; + double getDt(); std::list getMemoryBlocks() const diff --git a/fpga/include/villas/fpga/ips/rtds2gpu.hpp b/fpga/include/villas/fpga/ips/rtds2gpu.hpp index 836a25050..7dfd8a120 100644 --- a/fpga/include/villas/fpga/ips/rtds2gpu.hpp +++ b/fpga/include/villas/fpga/ips/rtds2gpu.hpp @@ -29,10 +29,17 @@ class Rtds2Gpu : public Node, public Hls public: friend class Rtds2GpuFactory; - bool init(); + virtual + bool init() override; void dump(spdlog::level::level_enum logLevel = spdlog::level::info); + virtual + void dump() override + { + dump(spdlog::level::info); + } + bool startOnce(const MemoryBlock &mem, size_t frameSize, size_t dataOffset, size_t doorbellOffset); size_t getMaxFrameSize(); diff --git a/fpga/include/villas/fpga/ips/switch.hpp b/fpga/include/villas/fpga/ips/switch.hpp index 031f81dc7..46562d067 100644 --- a/fpga/include/villas/fpga/ips/switch.hpp +++ b/fpga/include/villas/fpga/ips/switch.hpp @@ -40,7 +40,8 @@ class AxiStreamSwitch : public Node { public: friend class AxiStreamSwitchFactory; - bool init(); + virtual + bool init() override; bool connectInternal(const std::string &slavePort, const std::string &masterPort); @@ -49,8 +50,11 @@ private: int portNameToNum(const std::string &portName); private: - static constexpr const char* PORT_DISABLED = "DISABLED"; - static constexpr char registerMemory[] = "Reg"; + static constexpr + const char* PORT_DISABLED = "DISABLED"; + + static constexpr + char registerMemory[] = "Reg"; std::list getMemoryBlocks() const { @@ -59,11 +63,6 @@ private: }; } - struct Path { - Core* masterOut; - Core* slaveIn; - }; - XAxis_Switch xSwitch; XAxis_Switch_Config xConfig; diff --git a/fpga/include/villas/fpga/ips/timer.hpp b/fpga/include/villas/fpga/ips/timer.hpp index c9b828bf8..8f57968f9 100644 --- a/fpga/include/villas/fpga/ips/timer.hpp +++ b/fpga/include/villas/fpga/ips/timer.hpp @@ -38,24 +38,28 @@ namespace ip { class Timer : public Core { friend class TimerFactory; public: - bool init(); + + virtual + bool init() override; bool start(uint32_t ticks); bool wait(); uint32_t remaining(); - inline bool isRunning() + inline + bool isRunning() { return remaining() != 0; } - inline bool isFinished() + inline + bool isFinished() { return remaining() == 0; } - static constexpr uint32_t - getFrequency() + static constexpr + uint32_t getFrequency() { return FPGA_AXI_HZ; } @@ -83,20 +87,20 @@ public: return new Timer; } - virtual std::string - getName() const + virtual + std::string getName() const { return "Timer"; } - virtual std::string - getDescription() const + virtual + std::string getDescription() const { return "Xilinx's programmable timer / counter"; } - virtual Vlnv - getCompatibleVlnv() const + virtual + Vlnv getCompatibleVlnv() const { return Vlnv("xilinx.com:ip:axi_timer:"); }