diff --git a/etc/fpga-simple.conf b/etc/fpga-simple.conf index 7143d9c56..b2e22ed9f 100644 --- a/etc/fpga-simple.conf +++ b/etc/fpga-simple.conf @@ -44,6 +44,11 @@ fpgas = { vlnv = "xilinx.com:ip:axis_interconnect:2.1" baseaddr = 0x0000; numports = 3; + + paths = ( + { in = "dma_0", out = "rtds_0" }, + { in = "rtds_0", out = "dma_0" } + ) }, rtds_0 = { vlnv = "acs.eonerc.rwth-aachen.de:user:rtds_axis:1.0" @@ -57,12 +62,6 @@ fpgas = { irq = 0 } } - - /* Configure switch_0 */ - paths = ( - { in = "dma_0", out = "rtds_0" }, - { in = "rtds_0", out = "dma_0" } - ) } } diff --git a/etc/fpga.conf b/etc/fpga.conf index df9745ac2..a0f54f06b 100644 --- a/etc/fpga.conf +++ b/etc/fpga.conf @@ -56,6 +56,18 @@ fpgas = { vlnv = "xilinx.com:ip:axis_interconnect:2.1" baseaddr = 0x5000; num_ports = 10; + + paths = ( + // { in = "fifo_mm_s_0", out = "fifo_mm_s_0" }, # Loopback fifo_mm_s_0 + // { in = "dma_0", out = "dma_0" }, # Loopback dma_0 + // { in = "dma_1", out = "dma_1" } # Loopback dma_1 + // { in = "rtds_axis_0", out = "fifo_mm_s_0", reverse = true } # Linux <-> RTDS + // { in = "rtds_axis_0", out = "dma_0", reverse = true } # Linux (dma_0) <-> RTDS + { in = "rtds_axis_0", out = "dma_1", reverse = true } # Linux (dma_1) <-> RTDS + // { in = "rtds_axis_0", out = "fifo_mm_s_0", reverse = true } # Linux (fifo_mm_s_0) <-> RTDS + // { in = "dma_0", out = "hls_dft_0", reverse = true } # DFT <-> Linux + // { in = "rtds_axis_0", out = "hls_dft_0", reverse = true }, # DFT <-> RTDS + ) }, axi_reset_0 = { vlnv = "xilinx.com:ip:axi_gpio:2.0"; @@ -117,21 +129,6 @@ fpgas = { port = 6; }, } - - ############ Switch config ############ - # Requires a single IP core with VLNV: - # xilinx.com:ip:axis_interconnect - paths = ( - // { in = "fifo_mm_s_0", out = "fifo_mm_s_0" }, # Loopback fifo_mm_s_0 - // { in = "dma_0", out = "dma_0" }, # Loopback dma_0 - // { in = "dma_1", out = "dma_1" } # Loopback dma_1 - // { in = "rtds_axis_0", out = "fifo_mm_s_0", reverse = true } # Linux <-> RTDS - // { in = "rtds_axis_0", out = "dma_0", reverse = true } # Linux (dma_0) <-> RTDS - { in = "rtds_axis_0", out = "dma_1", reverse = true } # Linux (dma_1) <-> RTDS - // { in = "rtds_axis_0", out = "fifo_mm_s_0", reverse = true } # Linux (fifo_mm_s_0) <-> RTDS - // { in = "dma_0", out = "hls_dft_0", reverse = true } # DFT <-> Linux - // { in = "rtds_axis_0", out = "hls_dft_0", reverse = true }, # DFT <-> RTDS - ) } }