From 6b58624e5752d331e2e8cfe6ba5a2301df66ea2e Mon Sep 17 00:00:00 2001
From: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
Date: Wed, 15 Mar 2023 16:02:53 +0100
Subject: [PATCH] fix villas-fpga-pipe

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
---
 fpga/.vscode/launch.json             |  2 +-
 fpga/include/villas/fpga/ips/dma.hpp |  2 +-
 fpga/lib/utils.cpp                   |  2 ++
 fpga/src/CMakeLists.txt              |  7 +++++++
 fpga/src/villas-fpga-ctrl.cpp        |  2 +-
 fpga/src/villas-fpga-pipe.cpp        | 18 +++++++++---------
 6 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/fpga/.vscode/launch.json b/fpga/.vscode/launch.json
index 1bce5a80d..2e3dcbd26 100644
--- a/fpga/.vscode/launch.json
+++ b/fpga/.vscode/launch.json
@@ -10,7 +10,7 @@
             "request": "launch",
             "program": "${workspaceFolder}/build/src/villas-fpga-ctrl",
             "args": [
-                "-c", "${workspaceFolder}/etc/fpgas.json", "--connect", "\"2<->stdout\""
+                "-c", "${workspaceFolder}/etc/fpgas.json", "--connect", "\"4<->stdout\""
             ],
             "stopAtEntry": false,
             "cwd": "${workspaceFolder}",
diff --git a/fpga/include/villas/fpga/ips/dma.hpp b/fpga/include/villas/fpga/ips/dma.hpp
index 6e788e1d3..7f15ede92 100644
--- a/fpga/include/villas/fpga/ips/dma.hpp
+++ b/fpga/include/villas/fpga/ips/dma.hpp
@@ -129,7 +129,7 @@ private:
 	int delay = 0;
 	// Coalesce is the number of messages/BDs to wait for before issuing an interrupt
 	uint32_t writeCoalesce = 1;
-	uint32_t readCoalesce = 16;
+	uint32_t readCoalesce = 1;
 
 	// (maximum) size of a single message on the read channel in bytes.
 	// The message buffer/BD should have enough room for this many bytes.
diff --git a/fpga/lib/utils.cpp b/fpga/lib/utils.cpp
index c2a1425a1..b8979afe8 100644
--- a/fpga/lib/utils.cpp
+++ b/fpga/lib/utils.cpp
@@ -84,9 +84,11 @@ void fpga::ConnectString::parseString(std::string& connectString)
 	dstAsInt = portStringToInt(dstStr);
 	if (srcAsInt == -1) {
 		srcIsStdin = true;
+		dstIsStdout = bidirectional;
 	}
 	if (dstAsInt == -1) {
 		dstIsStdout = true;
+		srcIsStdin = bidirectional;
 	}
 }
 
diff --git a/fpga/src/CMakeLists.txt b/fpga/src/CMakeLists.txt
index 4a93677ef..c9b3ebee8 100644
--- a/fpga/src/CMakeLists.txt
+++ b/fpga/src/CMakeLists.txt
@@ -11,4 +11,11 @@ target_link_libraries(villas-fpga-ctrl PUBLIC
 	villas-fpga
 )
 
+add_executable(villas-fpga-pipe villas-fpga-pipe.cpp)
+
+target_link_libraries(villas-fpga-pipe PUBLIC
+	villas-fpga
+)
+
+
 add_executable(pcimem pcimem.c)
diff --git a/fpga/src/villas-fpga-ctrl.cpp b/fpga/src/villas-fpga-ctrl.cpp
index def5b2e9a..7c14b3429 100644
--- a/fpga/src/villas-fpga-ctrl.cpp
+++ b/fpga/src/villas-fpga-ctrl.cpp
@@ -51,7 +51,7 @@ void writeToDmaFromStdIn(std::shared_ptr<villas::fpga::ip::Dma> dma)
 	}
 
 	size_t cur = 0, next = 1;
-	std::ios::sync_with_stdio(false);
+er	//std::ios::sync_with_stdio(false);
 	std::string line;
 	bool firstXfer = true;
 
diff --git a/fpga/src/villas-fpga-pipe.cpp b/fpga/src/villas-fpga-pipe.cpp
index b60e67fc4..081ddc0a8 100644
--- a/fpga/src/villas-fpga-pipe.cpp
+++ b/fpga/src/villas-fpga-pipe.cpp
@@ -89,8 +89,8 @@ int main(int argc, char* argv[])
 		dma->connectLoopback();
 #endif
 		auto &alloc = villas::HostRam::getAllocator();
-		auto mem = alloc.allocate<int32_t>(0x100);
-		auto block = mem.getMemoryBlock();
+		std::shared_ptr<villas::MemoryBlock> block = alloc.allocateBlock(0x100 * sizeof(int32_t));
+		villas::MemoryAccessor<int32_t> mem = *block;
 
 		dma->makeAccesibleFromVA(block);
 
@@ -99,7 +99,7 @@ int main(int argc, char* argv[])
 
 		while (true) {
 			// Setup read transfer
-			dma->read(block, block.getSize());
+			dma->read(*block, block->getSize());
 
 			// Read values from stdin
 			std::string line;
@@ -115,16 +115,16 @@ int main(int argc, char* argv[])
 			}
 
 			// Initiate write transfer
-			bool state = dma->write(block, i * sizeof(int32_t));
+			bool state = dma->write(*block, i * sizeof(int32_t));
 			if (!state)
 				logger->error("Failed to write to device");
 
-			auto bytesWritten = dma->writeComplete();
-			logger->info("Wrote {} bytes", bytesWritten);
+			auto writeComp = dma->writeComplete();
+			logger->info("Wrote {} bytes", writeComp.bytes);
 
-			auto bytesRead = dma->readComplete();
-			auto valuesRead = bytesRead / sizeof(int32_t);
-			logger->info("Read {} bytes", bytesRead);
+			auto readComp = dma->readComplete();
+			auto valuesRead = readComp.bytes / sizeof(int32_t);
+			logger->info("Read {} bytes, {} bds, {} interrupts", readComp.bytes, readComp.bds, readComp.interrupts);
 
 			for (size_t i = 0; i < valuesRead; i++)
 				std::cerr << mem[i] << ";";