From 9b79c16fb3dd0389f9a0b2d0c8a1b0e6970b9d45 Mon Sep 17 00:00:00 2001 From: Niklas Eiling Date: Mon, 29 Jul 2024 16:39:13 +0200 Subject: [PATCH] fpga: make FPGA support sending and receiving integers Signed-off-by: Niklas Eiling --- include/villas/nodes/fpga.hpp | 3 +++ lib/nodes/fpga.cpp | 30 +++++++++++++++--------------- 2 files changed, 18 insertions(+), 15 deletions(-) diff --git a/include/villas/nodes/fpga.hpp b/include/villas/nodes/fpga.hpp index c8a3f034a..022bb8874 100644 --- a/include/villas/nodes/fpga.hpp +++ b/include/villas/nodes/fpga.hpp @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -61,7 +62,9 @@ protected: std::shared_ptr card; std::shared_ptr dma; std::shared_ptr blockRx; + std::shared_ptr> accessorRx; std::shared_ptr blockTx; + std::shared_ptr> accessorTx; // Non-public methods virtual int fastRead(Sample *smps[], unsigned cnt); diff --git a/lib/nodes/fpga.cpp b/lib/nodes/fpga.cpp index 4617f32d0..b22030bad 100644 --- a/lib/nodes/fpga.cpp +++ b/lib/nodes/fpga.cpp @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -36,7 +37,8 @@ static std::shared_ptr vfioContainer; FpgaNode::FpgaNode(const uuid_t &id, const std::string &name) : Node(id, name), cardName(""), connectStrings(), lowLatencyMode(false), - timestep(10e-3), card(nullptr), dma(), blockRx(), blockTx() {} + timestep(10e-3), card(nullptr), dma(), blockRx(), accessorRx(nullptr), + blockTx(), accessorTx(nullptr) {} FpgaNode::~FpgaNode() {} @@ -90,8 +92,8 @@ int FpgaNode::prepare() { blockRx = alloc.allocateBlock(0x200 * sizeof(float)); blockTx = alloc.allocateBlock(0x200 * sizeof(float)); - villas::MemoryAccessor memRx = *blockRx; - villas::MemoryAccessor memTx = *blockTx; + accessorRx = std::make_shared>(*blockRx); + accessorTx = std::make_shared>(*blockTx); dma->makeAccesibleFromVA(blockRx); dma->makeAccesibleFromVA(blockTx); @@ -219,16 +221,18 @@ int FpgaNode::fastWrite(Sample *smps[], unsigned cnt) { assert(cnt == 1 && smps != nullptr && smps[0] != nullptr); - auto mem = MemoryAccessor(*blockTx); - for (unsigned i = 0; i < smp->length; i++) { if (smp->signals->getByIndex(i)->type == SignalType::FLOAT) { - mem[i] = static_cast(smp->data[i].f); + float f = static_cast(smp->data[i].f); + (*accessorTx)[i] = *reinterpret_cast(&f); } else { - mem[i] = static_cast(smp->data[i].i); + (*accessorTx)[i] = static_cast(smp->data[i].i); } } + // logger->info("Writing sample: {}, {}, {:#x}", smp->data[0].f, + // signalTypeToString(smp->signals->getByIndex(0)->type), + // smp->data[0].i); dma->writeScatterGatherFast(); auto written = dma->writeScatterGatherPoll() / sizeof(float); // The number of samples written @@ -253,7 +257,7 @@ int FpgaNode::fastRead(Sample *smps[], unsigned cnt) { size_t to_read = in.signals->size() * sizeof(uint32_t); size_t read; do { - dma->readScatterGatherFast(); + dma->readScatterGatherFast(); read = dma->readScatterGatherPoll(true); if (read < to_read) { logger->warn("Read only {} bytes, but {} were expected", read, to_read); @@ -267,14 +271,10 @@ int FpgaNode::fastRead(Sample *smps[], unsigned cnt) { smp->length = 0; for (unsigned i = 0; i < MIN(read / sizeof(uint32_t), smp->capacity); i++) { if (in.signals->getByIndex(i)->type == SignalType::INTEGER) { - auto mem = MemoryAccessor(*blockRx); - smp->data[i].i = static_cast(mem[i]); - logger->info("Reading sample: {}, {}, {:#x}, i: {}", smp->data[i].i, - signalTypeToString(smp->signals->getByIndex(i)->type), - smp->data[i].i, i); + smp->data[i].i = static_cast((*accessorRx)[i]); } else { - auto mem = MemoryAccessor(*blockRx); - smp->data[i].f = static_cast(mem[i]); + smp->data[i].f = + static_cast(*reinterpret_cast(&(*accessorRx)[i])); } smp->length++; }