From acf273e4066b0751685553b6a08154b751b9839a Mon Sep 17 00:00:00 2001
From: Daniel Krebs <github@daniel-krebs.net>
Date: Tue, 13 Feb 2018 14:12:28 +0100
Subject: [PATCH] tests: let them fail if no Fifo or Timer is found

---
 fpga/tests/fifo.cpp  | 11 ++++++++---
 fpga/tests/graph.cpp |  4 ++++
 fpga/tests/timer.cpp |  6 +++++-
 3 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/fpga/tests/fifo.cpp b/fpga/tests/fifo.cpp
index 6b01c6758..e3f7a250b 100644
--- a/fpga/tests/fifo.cpp
+++ b/fpga/tests/fifo.cpp
@@ -34,6 +34,7 @@ Test(fpga, fifo, .description = "FIFO")
 {
 	ssize_t len;
 	char src[255], dst[255];
+	size_t count = 0;
 
 	auto logger = loggerGetOrCreate("unittest:fifo");
 
@@ -46,12 +47,14 @@ Test(fpga, fifo, .description = "FIFO")
 
 		auto fifo = reinterpret_cast<villas::fpga::ip::Fifo&>(*ip);
 
-		if(not fifo.loopbackPossible()) {
-			logger->info("Loopback test not possible for {}", *ip);
+		if(not fifo.connectLoopback()) {
 			continue;
 		}
 
-		if(not fifo.connectLoopback()) {
+		count++;
+
+		if(not fifo.loopbackPossible()) {
+			logger->info("Loopback test not possible for {}", *ip);
 			continue;
 		}
 
@@ -80,4 +83,6 @@ Test(fpga, fifo, .description = "FIFO")
 
 		logger->info(TXT_GREEN("Passed"));
 	}
+
+	cr_assert(count > 0, "No fifo found");
 }
diff --git a/fpga/tests/graph.cpp b/fpga/tests/graph.cpp
index 4be542a5c..ed14ee33e 100644
--- a/fpga/tests/graph.cpp
+++ b/fpga/tests/graph.cpp
@@ -44,6 +44,8 @@ Test(graph, basic, .description = "DirectedGraph")
 	g.dump();
 	cr_assert(g.getVertexCount() == 2);
 	cr_assert(g.vertexGetEdges(v2id).size() == 0);
+
+	logger->info(TXT_GREEN("Passed"));
 }
 
 Test(graph, path, .description = "Find path")
@@ -108,6 +110,8 @@ Test(graph, path, .description = "Find path")
 	for(auto& edge : path4) {
 		logger->info("  -> edge {}", edge);
 	}
+
+	logger->info(TXT_GREEN("Passed"));
 }
 
 Test(graph, memory_manager, .description = "Global Memory Manager")
diff --git a/fpga/tests/timer.cpp b/fpga/tests/timer.cpp
index 278f8f418..4317e51b6 100644
--- a/fpga/tests/timer.cpp
+++ b/fpga/tests/timer.cpp
@@ -34,6 +34,8 @@ Test(fpga, timer, .description = "Timer Counter")
 {
 	auto logger = loggerGetOrCreate("unittest:timer");
 
+	size_t count = 0;
+
 	for(auto& ip : state.cards.front()->ips) {
 		// skip non-timer IPs
 		if(*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_timer:")) {
@@ -42,6 +44,8 @@ Test(fpga, timer, .description = "Timer Counter")
 
 		logger->info("Testing {}", *ip);
 
+		count++;
+
 		auto timer = reinterpret_cast<villas::fpga::ip::Timer&>(*ip);
 
 		logger->info("Test simple waiting");
@@ -68,5 +72,5 @@ Test(fpga, timer, .description = "Timer Counter")
 		logger->info(TXT_GREEN("Passed"));
 	}
 
-	return;
+	cr_assert(count > 0, "No timer found");
 }