diff --git a/fpga/common b/fpga/common index 1ddb51d71..e58a611a7 160000 --- a/fpga/common +++ b/fpga/common @@ -1 +1 @@ -Subproject commit 1ddb51d71d13295a76b06a10593102659227f972 +Subproject commit e58a611a755b759925b78c6ee2c73ae282cef444 diff --git a/fpga/gpu/src/gpu.cpp b/fpga/gpu/src/gpu.cpp index 637ef0b5d..e6ab8eb6d 100644 --- a/fpga/gpu/src/gpu.cpp +++ b/fpga/gpu/src/gpu.cpp @@ -50,7 +50,7 @@ GpuAllocator::GpuAllocator(Gpu& gpu) : { free = [&](MemoryBlock* mem) { cudaSetDevice(gpu.gpuId); - if(cudaFree(reinterpret_cast(mem->getOffset())) != cudaSuccess) { + if (cudaFree(reinterpret_cast(mem->getOffset())) != cudaSuccess) { logger->warn("cudaFree() failed for {:#x} of size {:#x}", mem->getOffset(), mem->getSize()); } @@ -92,7 +92,7 @@ public: std::string Gpu::getName() const { cudaDeviceProp deviceProp; - if(cudaGetDeviceProperties(&deviceProp, gpuId) != cudaSuccess) { + if (cudaGetDeviceProperties(&deviceProp, gpuId) != cudaSuccess) { // logger not yet availabe villas::logging.get("Gpu")->error("Cannot retrieve properties for GPU {}", gpuId); throw std::exception(); @@ -115,7 +115,7 @@ bool Gpu::registerIoMemory(const MemoryBlock& mem) // overlapping window, so this will fail badly! auto translation = mm.getTranslation(masterPciEAddrSpaceId, mem.getAddrSpaceId()); - if(translation.getSize() >= mem.getSize()) { + if (translation.getSize() >= mem.getSize()) { // there is already a sufficient path logger->debug("Already mapped through another mapping"); return true; @@ -159,7 +159,7 @@ bool Gpu::registerIoMemory(const MemoryBlock& mem) return false; } - if(sizeOnPci < mem.getSize()) { + if (sizeOnPci < mem.getSize()) { logger->warn("VA mapping of IO memory is too small: {:#x} instead of {:#x} bytes", sizeOnPci, mem.getSize()); logger->warn("If something later on fails or behaves strangely, this might be the cause!"); @@ -169,13 +169,13 @@ bool Gpu::registerIoMemory(const MemoryBlock& mem) cudaSetDevice(gpuId); auto baseAddrVA = reinterpret_cast(baseAddrForProcess); - if(cudaHostRegister(baseAddrVA, sizeOnPci, cudaHostRegisterIoMemory) != cudaSuccess) { + if (cudaHostRegister(baseAddrVA, sizeOnPci, cudaHostRegisterIoMemory) != cudaSuccess) { logger->error("Cannot register IO memory for block {}", mem.getAddrSpaceId()); return false; } void* devicePointer = nullptr; - if(cudaHostGetDevicePointer(&devicePointer, baseAddrVA, 0) != cudaSuccess) { + if (cudaHostGetDevicePointer(&devicePointer, baseAddrVA, 0) != cudaSuccess) { logger->error("Cannot retrieve device pointer for IO memory"); return false; } @@ -195,7 +195,7 @@ Gpu::registerHostMemory(const MemoryBlock& mem) auto localBase = reinterpret_cast(translation.getLocalAddr(0)); int ret = cudaHostRegister(localBase, mem.getSize(), 0); - if(ret != cudaSuccess) { + if (ret != cudaSuccess) { logger->error("Cannot register memory block {} addr={:p} size={:#x} to CUDA: ret={}", mem.getAddrSpaceId(), localBase, mem.getSize(), ret); return false; @@ -203,7 +203,7 @@ Gpu::registerHostMemory(const MemoryBlock& mem) void* devicePointer = nullptr; ret = cudaHostGetDevicePointer(&devicePointer, localBase, 0); - if(ret != cudaSuccess) { + if (ret != cudaSuccess) { logger->error("Cannot retrieve device pointer for IO memory: ret={}", ret); return false; } @@ -216,7 +216,7 @@ Gpu::registerHostMemory(const MemoryBlock& mem) bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) { - if(pImpl->gdr == nullptr) { + if (pImpl->gdr == nullptr) { logger->warn("GDRcopy not available"); return false; } @@ -226,7 +226,7 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) try { auto path = mm.findPath(masterPciEAddrSpaceId, mem.getAddrSpaceId()); // if first hop is the PCIe bus, we know that memory is off-GPU - if(path.front() == mm.getPciAddressSpace()) { + if (path.front() == mm.getPciAddressSpace()) { throw std::out_of_range("Memory block is outside of this GPU"); } @@ -246,7 +246,7 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) // required to set this flag before mapping unsigned int enable = 1; ret = cuPointerSetAttribute(&enable, CU_POINTER_ATTRIBUTE_SYNC_MEMOPS, devptr); - if(ret != CUDA_SUCCESS) { + if (ret != CUDA_SUCCESS) { logger->error("Cannot set pointer attributes on memory block {}: {}", mem.getAddrSpaceId(), ret); return false; @@ -254,7 +254,7 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) gdr_mh_t mh; ret = gdr_pin_buffer(pImpl->gdr, devptr, mem.getSize(), 0, 0, &mh); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot pin memory block {} via gdrcopy: {}", mem.getAddrSpaceId(), ret); return false; @@ -262,7 +262,7 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) void* bar = nullptr; ret = gdr_map(pImpl->gdr, mh, &bar, mem.getSize()); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot map memory block {} via gdrcopy: {}", mem.getAddrSpaceId(), ret); return false; @@ -270,7 +270,7 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) gdr_info_t info; ret = gdr_get_info(pImpl->gdr, mh, &info); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot get info for mapping of memory block {}: {}", mem.getAddrSpaceId(), ret); return false; @@ -294,11 +294,11 @@ bool Gpu::makeAccessibleToPCIeAndVA(const MemoryBlock& mem) uint64_t addr[8]; ret = gdr_map_dma(pImpl->gdr, mh, 3, 0, 0, addr, 8); - for(int i = 0; i < ret; i++) { + for (int i = 0; i < ret; i++) { logger->debug("DMA addr[{}]: {:#x}", i, addr[i]); } - if(ret != 1) { + if (ret != 1) { logger->error("Only one DMA address per block supported at the moment"); return false; } @@ -328,7 +328,7 @@ Gpu::makeAccessibleFromPCIeOrHostRam(const MemoryBlock& mem) // not reachable via PCI -> not IO memory } - if(isIoMemory) { + if (isIoMemory) { logger->debug("Memory block {} is assumed to be IO memory", mem.getAddrSpaceId()); @@ -396,7 +396,7 @@ GpuAllocator::allocateBlock(size_t size) }); - if(chunk != chunks.end()) { + if (chunk != chunks.end()) { logger->debug("Found existing chunk that can host the requested block"); return (*chunk)->allocateBlock(size); @@ -408,7 +408,7 @@ GpuAllocator::allocateBlock(size_t size) const size_t chunkSize = size - (size & (GpuPageSize - 1)) + GpuPageSize; logger->debug("Allocate new chunk of {:#x} bytes", chunkSize); - if(cudaSuccess != cudaMalloc(&addr, chunkSize)) { + if (cudaSuccess != cudaMalloc(&addr, chunkSize)) { logger->error("cudaMalloc(..., size={}) failed", chunkSize); throw std::bad_alloc(); } @@ -445,7 +445,7 @@ Gpu::Gpu(int gpuId) : logger = villas::logging.get(getName()); pImpl->gdr = gdr_open(); - if(pImpl->gdr == nullptr) { + if (pImpl->gdr == nullptr) { logger->warn("No GDRcopy support enabled, cannot open /dev/gdrdrv"); } } @@ -470,7 +470,7 @@ bool Gpu::init() struct pci_region* pci_regions = nullptr; const size_t pci_num_regions = pci_get_regions(&pImpl->pdev, &pci_regions); - for(size_t i = 0; i < pci_num_regions; i++) { + for (size_t i = 0; i < pci_num_regions; i++) { const size_t region_size = pci_regions[i].end - pci_regions[i].start + 1; logger->info("BAR{}: bus addr={:#x} size={:#x}", pci_regions[i].num, pci_regions[i].start, region_size); @@ -500,15 +500,15 @@ GpuFactory::make() std::list> gpuList; - for(int gpuId = 0; gpuId < deviceCount; gpuId++) { - if(cudaSetDevice(gpuId) != cudaSuccess) { + for (int gpuId = 0; gpuId < deviceCount; gpuId++) { + if (cudaSetDevice(gpuId) != cudaSuccess) { logger->warn("Cannot activate GPU {}", gpuId); continue; } auto gpu = std::make_unique(gpuId); - if(not gpu->init()) { + if (not gpu->init()) { logger->warn("Cannot initialize GPU {}", gpuId); continue; } @@ -517,7 +517,7 @@ GpuFactory::make() } logger->info("Initialized {} GPUs", gpuList.size()); - for(auto& gpu : gpuList) { + for (auto& gpu : gpuList) { logger->debug(" - {}", gpu->getName()); } diff --git a/fpga/gpu/src/kernels.cu b/fpga/gpu/src/kernels.cu index 1bc759d07..c03ed7e0c 100644 --- a/fpga/gpu/src/kernels.cu +++ b/fpga/gpu/src/kernels.cu @@ -42,7 +42,7 @@ kernel_mailbox(volatile uint32_t *mailbox, volatile uint32_t* counter) printf("[kernel] started\n"); - while(1) { + while (1) { if (*mailbox == 1) { *mailbox = 0; printf("[gpu] counter = %d\n", *counter); @@ -56,7 +56,7 @@ kernel_mailbox(volatile uint32_t *mailbox, volatile uint32_t* counter) __global__ void kernel_memcpy(volatile uint8_t* dst, volatile uint8_t* src, size_t length) { - while(length > 0) { + while (length > 0) { *dst++ = *src++; length--; } diff --git a/fpga/include/villas/fpga/ip_node.hpp b/fpga/include/villas/fpga/ip_node.hpp index 854864127..f8d8dc818 100644 --- a/fpga/include/villas/fpga/ip_node.hpp +++ b/fpga/include/villas/fpga/ip_node.hpp @@ -70,9 +70,9 @@ public: const std::string& port, bool isMaster) { - for(auto& vertexEntry : vertices) { + for (auto& vertexEntry : vertices) { auto& vertex = vertexEntry.second; - if(vertex->nodeName == node and vertex->portName == port and vertex->isMaster == isMaster) + if (vertex->nodeName == node and vertex->portName == port and vertex->isMaster == isMaster) return vertex; } diff --git a/fpga/include/villas/fpga/ips/hls.hpp b/fpga/include/villas/fpga/ips/hls.hpp index 24e44a3e7..e453a7713 100644 --- a/fpga/include/villas/fpga/ips/hls.hpp +++ b/fpga/include/villas/fpga/ips/hls.hpp @@ -79,7 +79,7 @@ public: private: void updateRunningStatus() { - if(running and isIdleBit()) + if (running and isIdleBit()) running = false; } diff --git a/fpga/lib/card.cpp b/fpga/lib/card.cpp index fa12b6cd1..b1077e4a8 100644 --- a/fpga/lib/card.cpp +++ b/fpga/lib/card.cpp @@ -62,7 +62,7 @@ PCIeCardFactory::make(json_t *json, struct pci* pci, std::shared_ptrwarn("Cannot parse JSON config"); continue; } @@ -87,18 +87,18 @@ PCIeCardFactory::make(json_t *json, struct pci* pci, std::shared_ptrinit()) { + if (not card->init()) { logger->warn("Cannot start FPGA card {}", card_name); continue; } card->ips = ip::IpCoreFactory::make(card.get(), json_ips); - if(card->ips.empty()) { + if (card->ips.empty()) { logger->error("Cannot initialize IPs of FPGA card {}", card_name); continue; } - if(not card->check()) { + if (not card->check()) { logger->warn("Checking of FPGA card {} failed", card_name); continue; } @@ -122,7 +122,7 @@ PCIeCard::~PCIeCard() auto& mm = MemoryManager::get(); // unmap all memory blocks - for(auto& mappedMemoryBlock : memoryBlocksMapped) { + for (auto& mappedMemoryBlock : memoryBlocksMapped) { auto translation = mm.getTranslation(addrSpaceIdDeviceToHost, mappedMemoryBlock); @@ -139,8 +139,8 @@ PCIeCard::~PCIeCard() ip::IpCore* PCIeCard::lookupIp(const std::string& name) const { - for(auto& ip : ips) { - if(*ip == name) { + for (auto& ip : ips) { + if (*ip == name) { return ip.get(); } } @@ -152,8 +152,8 @@ PCIeCard::lookupIp(const std::string& name) const ip::IpCore* PCIeCard::lookupIp(const Vlnv& vlnv) const { - for(auto& ip : ips) { - if(*ip == vlnv) { + for (auto& ip : ips) { + if (*ip == vlnv) { return ip.get(); } } @@ -163,8 +163,8 @@ PCIeCard::lookupIp(const Vlnv& vlnv) const ip::IpCore*PCIeCard::lookupIp(const ip::IpIdentifier& id) const { - for(auto& ip : ips) { - if(*ip == id) { + for (auto& ip : ips) { + if (*ip == id) { return ip.get(); } } @@ -176,7 +176,7 @@ ip::IpCore*PCIeCard::lookupIp(const ip::IpIdentifier& id) const bool PCIeCard::mapMemoryBlock(const MemoryBlock& block) { - if(not vfioContainer->isIommuEnabled()) { + if (not vfioContainer->isIommuEnabled()) { logger->warn("VFIO mapping not supported without IOMMU"); return false; } @@ -184,7 +184,7 @@ PCIeCard::mapMemoryBlock(const MemoryBlock& block) auto& mm = MemoryManager::get(); const auto& addrSpaceId = block.getAddrSpaceId(); - if(memoryBlocksMapped.find(addrSpaceId) != memoryBlocksMapped.end()) { + if (memoryBlocksMapped.find(addrSpaceId) != memoryBlocksMapped.end()) { // block already mapped return true; } else { @@ -197,7 +197,7 @@ PCIeCard::mapMemoryBlock(const MemoryBlock& block) UINTPTR_MAX, block.getSize()); - if(iovaAddr == UINTPTR_MAX) { + if (iovaAddr == UINTPTR_MAX) { logger->error("Cannot map memory at {:#x} of size {:#x}", processBaseAddr, block.getSize()); return false; @@ -242,12 +242,12 @@ PCIeCard::init() /* Reset system? */ if (do_reset) { /* Reset / detect PCI device */ - if(not vfioDevice->pciHotReset()) { + if (not vfioDevice->pciHotReset()) { logger->error("Failed to reset PCI device"); return false; } - if(not reset()) { + if (not reset()) { logger->error("Failed to reset FGPA card"); return false; } diff --git a/fpga/lib/ip.cpp b/fpga/lib/ip.cpp index 9a31bdc17..f538131d3 100644 --- a/fpga/lib/ip.cpp +++ b/fpga/lib/ip.cpp @@ -70,7 +70,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) json_t* json_ip; json_object_foreach(json_ips, ipName, json_ip) { const char* vlnv; - if(json_unpack(json_ip, "{ s: s }", "vlnv", &vlnv) != 0) { + if (json_unpack(json_ip, "{ s: s }", "vlnv", &vlnv) != 0) { loggerStatic->warn("IP {} has no VLNV", ipName); continue; } @@ -85,10 +85,10 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) // first to be initialized. vlnvInitializationOrder.reverse(); - for(auto& vlnvInitFirst : vlnvInitializationOrder) { + for (auto& vlnvInitFirst : vlnvInitializationOrder) { // iterate over IPs, if VLNV matches, push to front and remove from list - for(auto it = allIps.begin(); it != allIps.end(); ++it) { - if(vlnvInitFirst == it->getVlnv()) { + for (auto it = allIps.begin(); it != allIps.end(); ++it) { + if (vlnvInitFirst == it->getVlnv()) { orderedIps.push_front(*it); it = allIps.erase(it); } @@ -99,12 +99,12 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) orderedIps.splice(orderedIps.end(), allIps); loggerStatic->debug("IP initialization order:"); - for(auto& id : orderedIps) { + for (auto& id : orderedIps) { loggerStatic->debug(" " CLR_BLD("{}"), id.getName()); } // configure all IPs - for(auto& id : orderedIps) { + for (auto& id : orderedIps) { loggerStatic->info("Configuring {}", id); // find the appropriate factory that can create the specified VLNV @@ -114,7 +114,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) // candidates, the first suitable factory will be used. IpCoreFactory* ipCoreFactory = lookup(id.getVlnv()); - if(ipCoreFactory == nullptr) { + if (ipCoreFactory == nullptr) { loggerStatic->warn("No plugin found to handle {}", id.getVlnv()); continue; } else { @@ -132,7 +132,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) // the list and will run out of scope. auto ip = std::unique_ptr(ipCoreFactory->create()); - if(ip == nullptr) { + if (ip == nullptr) { logger->warn("Cannot create an instance of {}", ipCoreFactory->getName()); continue; @@ -146,7 +146,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) json_t* json_ip = json_object_get(json_ips, id.getName().c_str()); json_t* json_irqs = json_object_get(json_ip, "irqs"); - if(json_is_object(json_irqs)) { + if (json_is_object(json_irqs)) { logger->debug("Parse IRQs of {}", *ip); const char* irqName; @@ -156,7 +156,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) auto tokens = utils::tokenize(irqEntry, ":"); - if(tokens.size() != 2) { + if (tokens.size() != 2) { logger->warn("Cannot parse IRQ '{}' of " CLR_BLD("{}"), irqEntry, id.getName()); continue; @@ -165,14 +165,14 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) const std::string& irqControllerName = tokens[0]; InterruptController* intc = nullptr; - for(auto& configuredIp : configuredIps) { - if(*configuredIp == irqControllerName) { + for (auto& configuredIp : configuredIps) { + if (*configuredIp == irqControllerName) { intc = dynamic_cast(configuredIp.get()); break; } } - if(intc == nullptr) { + if (intc == nullptr) { logger->error("Interrupt Controller {} for IRQ {} not found", irqControllerName, irqName); continue; @@ -192,7 +192,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) json_t* json_memory_view = json_object_get(json_ip, "memory-view"); - if(json_is_object(json_memory_view)) { + if (json_is_object(json_memory_view)) { logger->debug("Parse memory view of {}", *ip); @@ -227,7 +227,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) "baseaddr", &base, "highaddr", &high, "size", &size); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot parse address block {}/{}/{}/{}", ip->getInstanceName(), bus_name, instance_name, block_name); @@ -255,7 +255,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) } // IP-specific setup via JSON config - if(not ipCoreFactory->configureJson(*ip, json_ip)) { + if (not ipCoreFactory->configureJson(*ip, json_ip)) { logger->warn("Cannot configure IP from JSON"); continue; } @@ -265,12 +265,12 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) } // Start and check IPs now - for(auto& ip : configuredIps) { + for (auto& ip : configuredIps) { // Translate all memory blocks that the IP needs to be accessible from // the process and cache in the instance, so this has not to be done at // runtime. - for(auto& memoryBlock : ip->getMemoryBlocks()) { + for (auto& memoryBlock : ip->getMemoryBlocks()) { // construct the global name of this address block const auto addrSpaceName = MemoryManager::getSlaveAddrSpaceName(ip->getInstanceName(), @@ -293,12 +293,12 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) loggerStatic->info("Initializing {}", *ip); - if(not ip->init()) { + if (not ip->init()) { loggerStatic->error("Cannot start IP {}", *ip); continue; } - if(not ip->check()) { + if (not ip->check()) { loggerStatic->error("Checking failed for IP {}", *ip); continue; } @@ -309,7 +309,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips) loggerStatic->debug("Initialized IPs:"); - for(auto& ip : initializedIps) { + for (auto& ip : initializedIps) { loggerStatic->debug(" {}", *ip); } @@ -321,12 +321,12 @@ void IpCore::dump() { logger->info("IP: {}", *this); - for(auto& [num, irq] : irqs) { + for (auto& [num, irq] : irqs) { logger->info(" IRQ {}: {}:{}", num, irq.irqController->getInstanceName(), irq.num); } - for(auto& [block, translation] : addressTranslations) { + for (auto& [block, translation] : addressTranslations) { logger->info(" Memory {}: {}", block, translation); } } @@ -335,8 +335,8 @@ IpCore::dump() IpCoreFactory* IpCoreFactory::lookup(const Vlnv &vlnv) { - for(auto& ip : plugin::Registry::lookup()) { - if(ip->getCompatibleVlnv() == vlnv) + for (auto& ip : plugin::Registry::lookup()) { + if (ip->getCompatibleVlnv() == vlnv) return ip; } diff --git a/fpga/lib/ip_node.cpp b/fpga/lib/ip_node.cpp index 1a9ce5a48..84413c482 100644 --- a/fpga/lib/ip_node.cpp +++ b/fpga/lib/ip_node.cpp @@ -45,7 +45,7 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip) auto logger = getLogger(); json_t* json_ports = json_object_get(json_ip, "ports"); - if(not json_is_array(json_ports)) { + if (not json_is_array(json_ports)) { logger->debug("IP has no ports"); return true; } @@ -53,7 +53,7 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip) size_t index; json_t* json_port; json_array_foreach(json_ports, index, json_port) { - if(not json_is_object(json_port)) { + if (not json_is_object(json_port)) { logger->error("Port {} is not an object", index); return false; } @@ -63,13 +63,13 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip) "role", &role_raw, "target", &target_raw, "name", &name_raw); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot parse port {}", index); return false; } const auto tokens = utils::tokenize(target_raw, ":"); - if(tokens.size() != 2) { + if (tokens.size() != 2) { logger->error("Cannot parse 'target' of port {}", index); return false; } @@ -89,7 +89,7 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip) not isMaster); - if(isMaster) { + if (isMaster) { IpNode::streamGraph.addDefaultEdge(thisVertex->getIdentifier(), connectedVertex->getIdentifier()); ipNode.portsMaster[name_raw] = thisVertex; @@ -104,10 +104,10 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip) std::pair IpNode::getLoopbackPorts() const { - for(auto& [masterName, masterTo] : portsMaster) { - for(auto& [slaveName, slaveTo] : portsSlave) { + for (auto& [masterName, masterTo] : portsMaster) { + for (auto& [slaveName, slaveTo] : portsSlave) { // TODO: should we also check which IP both ports are connected to? - if(masterTo->nodeName == slaveTo->nodeName) { + if (masterTo->nodeName == slaveTo->nodeName) { return { masterName, slaveName }; } } @@ -118,18 +118,18 @@ IpNode::getLoopbackPorts() const bool IpNode::connect(const StreamVertex& from, const StreamVertex& to) { - if(from.nodeName != getInstanceName()) { + if (from.nodeName != getInstanceName()) { logger->error("Cannot connect from a foreign StreamVertex: {}", from); return false; } StreamGraph::Path path; - if(not streamGraph.getPath(from.getIdentifier(), to.getIdentifier(), path)) { + if (not streamGraph.getPath(from.getIdentifier(), to.getIdentifier(), path)) { logger->error("No path from {} to {}", from, to); return false; } - if(path.size() == 0) { + if (path.size() == 0) { return true; } @@ -140,16 +140,16 @@ bool IpNode::connect(const StreamVertex& from, const StreamVertex& to) auto nextHopNode = firstHopNode; // check if next hop is an internal connection - if(firstHopNode->nodeName == getInstanceName()) { + if (firstHopNode->nodeName == getInstanceName()) { - if(not connectInternal(from.portName, firstHopNode->portName)) { + if (not connectInternal(from.portName, firstHopNode->portName)) { logger->error("Making internal connection from {} to {} failed", from, *firstHopNode); return false; } // we have to advance to next hop - if(++currentEdge == path.end()) { + if (++currentEdge == path.end()) { // arrived at the end of path return true; } @@ -162,7 +162,7 @@ bool IpNode::connect(const StreamVertex& from, const StreamVertex& to) auto nextHopNodeIp = dynamic_cast (card->lookupIp(nextHopNode->nodeName)); - if(nextHopNodeIp == nullptr) { + if (nextHopNodeIp == nullptr) { logger->error("Cannot find IP {}, this shouldn't happen!", nextHopNode->nodeName); return false; @@ -219,7 +219,7 @@ IpNode::connectLoopback() auto axiStreamSwitch = dynamic_cast( card->lookupIp(portMaster->nodeName)); - if(axiStreamSwitch == nullptr) { + if (axiStreamSwitch == nullptr) { logger->error("Cannot find switch"); return false; } diff --git a/fpga/lib/ips/bram.cpp b/fpga/lib/ips/bram.cpp index fc881ff00..89c73bc82 100644 --- a/fpga/lib/ips/bram.cpp +++ b/fpga/lib/ips/bram.cpp @@ -33,7 +33,7 @@ BramFactory::configureJson(IpCore& ip, json_t* json_ip) { auto& bram = dynamic_cast(ip); - if(json_unpack(json_ip, "{ s: i }", "size", &bram.size) != 0) { + if (json_unpack(json_ip, "{ s: i }", "size", &bram.size) != 0) { getLogger()->error("Cannot parse 'size'"); return false; } diff --git a/fpga/lib/ips/dma.cpp b/fpga/lib/ips/dma.cpp index 9fbc8cf9d..c548765b5 100644 --- a/fpga/lib/ips/dma.cpp +++ b/fpga/lib/ips/dma.cpp @@ -114,8 +114,8 @@ Dma::reset() // value taken from libxil implementation int timeout = 500; - while(timeout > 0) { - if(XAxiDma_ResetIsDone(&xDma)) + while (timeout > 0) { + if (XAxiDma_ResetIsDone(&xDma)) return true; timeout--; @@ -128,22 +128,22 @@ Dma::reset() bool Dma::memcpy(const MemoryBlock& src, const MemoryBlock& dst, size_t len) { - if(len == 0) + if (len == 0) return true; - if(not connectLoopback()) + if (not connectLoopback()) return false; - if(this->read(dst, len) == 0) + if (this->read(dst, len) == 0) return false; - if(this->write(src, len) == 0) + if (this->write(src, len) == 0) return false; - if(not this->writeComplete()) + if (not this->writeComplete()) return false; - if(not this->readComplete()) + if (not this->readComplete()) return false; return true; @@ -354,19 +354,19 @@ bool Dma::makeAccesibleFromVA(const MemoryBlock& mem) { // only symmetric mapping supported currently - if(isMemoryBlockAccesible(mem, s2mmInterface) and + if (isMemoryBlockAccesible(mem, s2mmInterface) and isMemoryBlockAccesible(mem, mm2sInterface)) { return true; } // try mapping via FPGA-card (VFIO) - if(not card->mapMemoryBlock(mem)) { + if (not card->mapMemoryBlock(mem)) { logger->error("Memory not accessible by DMA"); return false; } // sanity-check if mapping worked, this shouldn't be neccessary - if(not isMemoryBlockAccesible(mem, s2mmInterface) or + if (not isMemoryBlockAccesible(mem, s2mmInterface) or not isMemoryBlockAccesible(mem, mm2sInterface)) { logger->error("Mapping memory via card didn't work, but reported success?!"); return false; diff --git a/fpga/lib/ips/fifo.cpp b/fpga/lib/ips/fifo.cpp index d280e4562..7d481a727 100644 --- a/fpga/lib/ips/fifo.cpp +++ b/fpga/lib/ips/fifo.cpp @@ -56,7 +56,7 @@ bool Fifo::init() if (XLlFifo_CfgInitialize(&xFifo, &fifo_cfg, getBaseAddr(registerMemory)) != XST_SUCCESS) return false; - if(irqs.find(irqName) == irqs.end()) { + if (irqs.find(irqName) == irqs.end()) { logger->error("IRQ '{}' not found but required", irqName); return false; } diff --git a/fpga/lib/ips/intc.cpp b/fpga/lib/ips/intc.cpp index 5958faf16..7080fade8 100644 --- a/fpga/lib/ips/intc.cpp +++ b/fpga/lib/ips/intc.cpp @@ -53,7 +53,7 @@ InterruptController::init() if (num_irqs < 0) return false; - if(not card->vfioDevice->pciMsiFind(nos)) { + if (not card->vfioDevice->pciMsiFind(nos)) { return false; } diff --git a/fpga/lib/ips/pcie.cpp b/fpga/lib/ips/pcie.cpp index ea5675b7d..18a9f56fa 100644 --- a/fpga/lib/ips/pcie.cpp +++ b/fpga/lib/ips/pcie.cpp @@ -77,7 +77,7 @@ AxiPciExpressBridge::init() struct pci_region* pci_regions = nullptr; size_t num_regions = pci_get_regions(card->pdev, &pci_regions); - for(size_t i = 0; i < num_regions; i++) { + for (size_t i = 0; i < num_regions; i++) { const size_t region_size = pci_regions[i].end - pci_regions[i].start + 1; char barName[] = "BARx"; @@ -96,13 +96,13 @@ AxiPciExpressBridge::init() } - if(pci_regions != nullptr) { + if (pci_regions != nullptr) { logger->debug("freeing pci regions"); free(pci_regions); } - for(auto& [barName, axiBar] : axiToPcieTranslations) { + for (auto& [barName, axiBar] : axiToPcieTranslations) { logger->info("AXI-{}: bus addr={:#x} size={:#x}", barName, axiBar.base, axiBar.size); logger->info("AXI-{}: PCI translation offset: {:#x}", @@ -127,9 +127,9 @@ AxiPciExpressBridgeFactory::configureJson(IpCore& ip, json_t* json_ip) auto logger = getLogger(); auto& pcie = dynamic_cast(ip); - for(auto barType : std::list{"axi_bars", "pcie_bars"}) { + for (auto barType : std::list{"axi_bars", "pcie_bars"}) { json_t* json_bars = json_object_get(json_ip, barType.c_str()); - if(not json_is_object(json_bars)) { + if (not json_is_object(json_bars)) { return false; } @@ -138,18 +138,18 @@ AxiPciExpressBridgeFactory::configureJson(IpCore& ip, json_t* json_ip) json_object_foreach(json_bars, bar_name, json_bar) { unsigned int translation; int ret = json_unpack(json_bar, "{ s: i }", "translation", &translation); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot parse {}/{}", barType, bar_name); return false; } - if(barType == "axi_bars") { + if (barType == "axi_bars") { json_int_t base, high, size; int ret = json_unpack(json_bar, "{ s: I, s: I, s: I }", "baseaddr", &base, "highaddr", &high, "size", &size); - if(ret != 0) { + if (ret != 0) { logger->error("Cannot parse {}/{}", barType, bar_name); return false; } diff --git a/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp b/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp index 7239cef71..6dbc78269 100644 --- a/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp +++ b/fpga/lib/ips/rtds2gpu/gpu2rtds.cpp @@ -59,7 +59,7 @@ void Gpu2Rtds::dump(spdlog::level::level_enum logLevel) //{ // auto& mm = MemoryManager::get(); -// if(frameSize > maxFrameSize) { +// if (frameSize > maxFrameSize) { // logger->error("Requested frame size of {} exceeds max. frame size of {}", // frameSize, maxFrameSize); // return false; @@ -92,7 +92,7 @@ void Gpu2Rtds::dump(spdlog::level::level_enum logLevel) //bool //Gpu2Rtds::updateStatus() //{ -// if(not XGpu2Rtds_Get_status_vld(&xInstance)) +// if (not XGpu2Rtds_Get_status_vld(&xInstance)) // return false; // status.value = XGpu2Rtds_Get_status(&xInstance); @@ -106,9 +106,9 @@ Gpu2Rtds::getMaxFrameSize() *registerFrameSize = 0; start(); - while(not isFinished()); + while (not isFinished()); - while(not registerStatusCtrl->status_ap_vld); + while (not registerStatusCtrl->status_ap_vld); axilite_reg_status_t status = *registerStatus; diff --git a/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp b/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp index 19eb94dcb..84b202b18 100644 --- a/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp +++ b/fpga/lib/ips/rtds2gpu/rtds2gpu.cpp @@ -56,7 +56,7 @@ bool Rtds2Gpu::startOnce(const MemoryBlock& mem, size_t frameSize, size_t dataOf { auto& mm = MemoryManager::get(); - if(frameSize > maxFrameSize) { + if (frameSize > maxFrameSize) { logger->error("Requested frame size of {} exceeds max. frame size of {}", frameSize, maxFrameSize); return false; @@ -85,7 +85,7 @@ bool Rtds2Gpu::startOnce(const MemoryBlock& mem, size_t frameSize, size_t dataOf bool Rtds2Gpu::updateStatus() { - if(not XRtds2gpu_Get_status_vld(&xInstance)) + if (not XRtds2gpu_Get_status_vld(&xInstance)) return false; status.value = XRtds2gpu_Get_status(&xInstance); @@ -99,7 +99,7 @@ Rtds2Gpu::getMaxFrameSize() XRtds2gpu_Set_frame_size(&xInstance, 0); start(); - while(not isFinished()); + while (not isFinished()); updateStatus(); return status.max_frame_size; diff --git a/fpga/lib/ips/switch.cpp b/fpga/lib/ips/switch.cpp index 2d4fa0a15..e731f31b5 100644 --- a/fpga/lib/ips/switch.cpp +++ b/fpga/lib/ips/switch.cpp @@ -42,7 +42,7 @@ AxiStreamSwitch::init() sw_cfg.MaxNumMI = num_ports; sw_cfg.MaxNumSI = num_ports; - if(XAxisScr_CfgInitialize(&xSwitch, &sw_cfg, getBaseAddr(registerMemory)) != XST_SUCCESS) { + if (XAxisScr_CfgInitialize(&xSwitch, &sw_cfg, getBaseAddr(registerMemory)) != XST_SUCCESS) { logger->error("Cannot initialize switch"); return false; } @@ -52,13 +52,13 @@ AxiStreamSwitch::init() XAxisScr_MiPortDisableAll(&xSwitch); XAxisScr_RegUpdateEnable(&xSwitch); - for(auto& [masterName, masterPort] : portsMaster) { + for (auto& [masterName, masterPort] : portsMaster) { // initialize internal mapping portMapping[masterName] = PORT_DISABLED; // each slave port may be internally routed to a master port - for(auto& [slaveName, slavePort] : portsSlave) { + for (auto& [slaveName, slavePort] : portsSlave) { (void) slaveName; streamGraph.addDefaultEdge(slavePort->getIdentifier(), @@ -89,21 +89,21 @@ AxiStreamSwitch::connectInternal(const std::string& portSlave, return false; } - if(portSlave.substr(0, 1) != "S" or + if (portSlave.substr(0, 1) != "S" or portMaster.substr(0, 1) != "M") { logger->error("sanity check failed: master {} slave {}", portMaster, portSlave); return false; } - if(portMapping[portMaster] == portSlave) { + if (portMapping[portMaster] == portSlave) { logger->debug("Ports already connected (slave {} to master {}", portSlave, portMaster); return true; } - for(auto [master, slave] : portMapping) { - if(slave == portSlave) { + for (auto [master, slave] : portMapping) { + if (slave == portSlave) { logger->warn("Slave {} has already been connected to master {}. " "Disabling master {}.", slave, master, master); @@ -138,14 +138,14 @@ AxiStreamSwitch::portNameToNum(const std::string& portName) bool AxiStreamSwitchFactory::configureJson(IpCore& ip, json_t* json_ip) { - if(not IpNodeFactory::configureJson(ip, json_ip)) + if (not IpNodeFactory::configureJson(ip, json_ip)) return false; auto logger = getLogger(); auto& axiSwitch = dynamic_cast(ip); - if(json_unpack(json_ip, "{ s: i }", "num_ports", &axiSwitch.num_ports) != 0) { + if (json_unpack(json_ip, "{ s: i }", "num_ports", &axiSwitch.num_ports) != 0) { logger->error("Cannot parse 'num_ports'"); return false; } diff --git a/fpga/lib/ips/timer.cpp b/fpga/lib/ips/timer.cpp index cb30c3240..2a0ef576f 100644 --- a/fpga/lib/ips/timer.cpp +++ b/fpga/lib/ips/timer.cpp @@ -46,7 +46,7 @@ bool Timer::init() XTmrCtr_CfgInitialize(&xTmr, &xtmr_cfg, getBaseAddr(registerMemory)); XTmrCtr_InitHw(&xTmr); - if(irqs.find(irqName) == irqs.end()) { + if (irqs.find(irqName) == irqs.end()) { logger->error("IRQ '{}' not found but required", irqName); return false; } diff --git a/fpga/lib/vlnv.cpp b/fpga/lib/vlnv.cpp index 53ec7683f..3e430c127 100644 --- a/fpga/lib/vlnv.cpp +++ b/fpga/lib/vlnv.cpp @@ -56,10 +56,10 @@ Vlnv::parseFromString(std::string vlnv) std::getline(sstream, version, delimiter); // represent wildcard internally as empty string - if(vendor == "*") vendor = ""; - if(library == "*") library = ""; - if(name == "*") name = ""; - if(version == "*") version = ""; + if (vendor == "*") vendor = ""; + if (library == "*") library = ""; + if (name == "*") name = ""; + if (version == "*") version = ""; } std::string diff --git a/fpga/src/pcimem.c b/fpga/src/pcimem.c index 1f34c4b68..c03e62242 100644 --- a/fpga/src/pcimem.c +++ b/fpga/src/pcimem.c @@ -37,7 +37,7 @@ do { \ fprintf(stderr, "Error at line %d, file %s (%d) [%s]\n", \ __LINE__, __FILE__, errno, strerror(errno)); exit(1); \ - } while(0) + } while (0) #define MAP_SIZE 4096UL #define MAP_MASK (MAP_SIZE - 1) @@ -65,7 +65,7 @@ int main(int argc, char **argv) { filename = argv[1]; target = strtoul(argv[2], 0, 0); - if(argc > 3) + if (argc > 3) access_type = tolower(argv[3][0]); fd = open(filename, O_RDWR | O_SYNC); @@ -84,7 +84,7 @@ int main(int argc, char **argv) { map_base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, target & ~MAP_MASK); - if(map_base == (void *) -1) + if (map_base == (void *) -1) PRINT_ERROR; printf("PCI Memory mapped to address %p.\n", map_base); @@ -110,7 +110,7 @@ int main(int argc, char **argv) { printf("Value at offset %#lx (%p): %#x\n", target, virt_addr, read_result); fflush(stdout); - if(argc > 4) { + if (argc > 4) { writeval = strtoul(argv[4], 0, 0); switch(access_type) { case 'b': @@ -130,7 +130,7 @@ int main(int argc, char **argv) { fflush(stdout); } - if(munmap(map_base, MAP_SIZE) == -1) + if (munmap(map_base, MAP_SIZE) == -1) PRINT_ERROR; close(fd); diff --git a/fpga/src/villas-fpga-pipe.cpp b/fpga/src/villas-fpga-pipe.cpp index 5f904f6e7..d484f2f70 100644 --- a/fpga/src/villas-fpga-pipe.cpp +++ b/fpga/src/villas-fpga-pipe.cpp @@ -66,7 +66,7 @@ void setupColorHandling() std::shared_ptr setupFpgaCard(const std::string& configFile, const std::string& fpgaName) { - if(pci_init(&pci) != 0) { + if (pci_init(&pci) != 0) { logger->error("Cannot initialize PCI"); exit(1); } @@ -75,12 +75,12 @@ setupFpgaCard(const std::string& configFile, const std::string& fpgaName) /* Parse FPGA configuration */ FILE* f = fopen(configFile.c_str(), "r"); - if(f == nullptr) { + if (f == nullptr) { logger->error("Cannot open config file: {}", configFile); } json_t* json = json_loadf(f, 0, nullptr); - if(json == nullptr) { + if (json == nullptr) { logger->error("Cannot parse JSON config"); fclose(f); exit(1); @@ -89,14 +89,14 @@ setupFpgaCard(const std::string& configFile, const std::string& fpgaName) fclose(f); json_t* fpgas = json_object_get(json, "fpgas"); - if(fpgas == nullptr) { + if (fpgas == nullptr) { logger->error("No section 'fpgas' found in config"); exit(1); } // get the FPGA card plugin auto fpgaCardPlugin = plugin::Registry::lookup("pcie"); - if(fpgaCardPlugin == nullptr) { + if (fpgaCardPlugin == nullptr) { logger->error("No FPGA plugin found"); exit(1); } @@ -104,8 +104,8 @@ setupFpgaCard(const std::string& configFile, const std::string& fpgaName) // create all FPGA card instances using the corresponding plugin auto cards = fpgaCardPlugin->make(fpgas, &pci, vfioContainer); - for(auto& fpgaCard : cards) { - if(fpgaCard->name == fpgaName) { + for (auto& fpgaCard : cards) { + if (fpgaCard->name == fpgaName) { return fpgaCard; } } @@ -150,12 +150,12 @@ int main(int argc, char* argv[]) (card->lookupIp("hier_0_axi_dma_axi_dma_1")); - if(aurora == nullptr) { + if (aurora == nullptr) { logger->error("No Aurora interface found on FPGA"); return 1; } - if(dma == nullptr) { + if (dma == nullptr) { logger->error("No DMA found on FPGA "); return 1; } @@ -177,12 +177,12 @@ int main(int argc, char* argv[]) auto &mm = MemoryManager::get(); mm.getMemoryGraph().dump("graph.dot"); - while(true) { + while (true) { dma->read(block, block.getSize()); const size_t bytesRead = dma->readComplete(); const size_t valuesRead = bytesRead / sizeof(int32_t); - for(size_t i = 0; i < valuesRead; i++) { + for (size_t i = 0; i < valuesRead; i++) { std::cerr << mem[i] << ";"; } std::cerr << std::endl; @@ -193,8 +193,8 @@ int main(int argc, char* argv[]) size_t memIdx = 0; - for(auto& value: values) { - if(value.empty()) continue; + for (auto& value: values) { + if (value.empty()) continue; const int32_t number = std::stoi(value); mem[memIdx++] = number; diff --git a/fpga/tests/fifo.cpp b/fpga/tests/fifo.cpp index 916816377..cbbf447fb 100644 --- a/fpga/tests/fifo.cpp +++ b/fpga/tests/fifo.cpp @@ -38,24 +38,24 @@ Test(fpga, fifo, .description = "FIFO") char src[255], dst[255]; size_t count = 0; - auto logger = logging.get("unittest:fifo"); + auto logger = logging.get("unit-test:fifo"); - for(auto& ip : state.cards.front()->ips) { + for (auto& ip : state.cards.front()->ips) { // skip non-fifo IPs - if(*ip != fpga::Vlnv("xilinx.com:ip:axi_fifo_mm_s:")) + if (*ip != fpga::Vlnv("xilinx.com:ip:axi_fifo_mm_s:")) continue; logger->info("Testing {}", *ip); auto fifo = dynamic_cast(*ip); - if(not fifo.connectLoopback()) { + if (not fifo.connectLoopback()) { continue; } count++; - if(not fifo.loopbackPossible()) { + if (not fifo.loopbackPossible()) { logger->info("Loopback test not possible for {}", *ip); continue; } diff --git a/fpga/tests/gpu.cpp b/fpga/tests/gpu.cpp index 5ee08cecc..a3ac86918 100644 --- a/fpga/tests/gpu.cpp +++ b/fpga/tests/gpu.cpp @@ -40,7 +40,7 @@ Test(fpga, gpu_dma, .description = "GPU DMA tests") { - auto logger = villas::logging.get("unittest:dma"); + auto logger = villas::logging.get("unit-test:dma"); auto& card = state.cards.front(); @@ -54,9 +54,9 @@ Test(fpga, gpu_dma, .description = "GPU DMA tests") auto& gpu = gpus.front(); size_t count = 0; - for(auto& ip : card->ips) { + for (auto& ip : card->ips) { // skip non-dma IPs - if(*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_bram_ctrl:")) + if (*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_bram_ctrl:")) continue; logger->info("Testing {}", *ip); @@ -116,10 +116,10 @@ Test(fpga, gpu_dma, .description = "GPU DMA tests") auto dmaIp = card->lookupIp(villas::fpga::Vlnv("xilinx.com:ip:axi_dma:")); auto dma = dynamic_cast(dmaIp); - if(dma != nullptr and dma->connectLoopback()) { + if (dma != nullptr and dma->connectLoopback()) { memcpyFuncs.push_back({ "DMA memcpy", [&]() { - if(not dma->makeAccesibleFromVA(src.getMemoryBlock()) or + if (not dma->makeAccesibleFromVA(src.getMemoryBlock()) or not dma->makeAccesibleFromVA(dst.getMemoryBlock())) { return; } @@ -127,7 +127,7 @@ Test(fpga, gpu_dma, .description = "GPU DMA tests") }}); } - for(auto& [name, memcpyFunc] : memcpyFuncs) { + for (auto& [name, memcpyFunc] : memcpyFuncs) { logger->info("Testing {}", name); /* Get new random data */ diff --git a/fpga/tests/gpu_kernels.cu b/fpga/tests/gpu_kernels.cu index 3f5b8b0d4..693cf1bdf 100644 --- a/fpga/tests/gpu_kernels.cu +++ b/fpga/tests/gpu_kernels.cu @@ -26,16 +26,16 @@ gpu_rtds_rtt_kernel(volatile uint32_t* dataIn, volatile reg_doorbell_t* doorbell // **run = true; uint32_t last_seq; - while(*run) { + while (*run) { // wait for data // printf("[gpu] wait for data, last_seq=%u\n", last_seq); - while(not (doorbellIn->is_valid and (last_seq != doorbellIn->seq_nr)) and *run); + while (not (doorbellIn->is_valid and (last_seq != doorbellIn->seq_nr)) and *run); // printf("doorbell: 0x%08x\n", doorbellIn->value); last_seq = doorbellIn->seq_nr; // printf("[gpu] copy data\n"); - for(size_t i = 0; i < doorbellIn->count; i++) { + for (size_t i = 0; i < doorbellIn->count; i++) { dataOut[i] = dataIn[i]; } @@ -56,7 +56,7 @@ void gpu_rtds_rtt_start(volatile uint32_t* dataIn, volatile reg_doorbell_t* door volatile uint32_t* dataOut, volatile villas::fpga::ip::ControlRegister* controlRegister) { printf("run: %p\n", run); - if(run == nullptr) { + if (run == nullptr) { run = (int*)malloc(sizeof(uint32_t)); cudaHostRegister(run, sizeof(uint32_t), 0); } diff --git a/fpga/tests/logging.cpp b/fpga/tests/logging.cpp index 3a21a7317..18b017c92 100644 --- a/fpga/tests/logging.cpp +++ b/fpga/tests/logging.cpp @@ -104,7 +104,7 @@ void criterion_plog(enum criterion_logging_level level, const struct criterion_p logger->warn(formatted_msg); else if (strstr(formatted_msg, "Failed")) logger->error(formatted_msg); - else if(!strcmp(prefix->prefix, "----") && !strcmp(prefix->color, "\33[0;34m")) + else if (!strcmp(prefix->prefix, "----") && !strcmp(prefix->color, "\33[0;34m")) logger->info(formatted_msg); else if (!strcmp(prefix->prefix, "----") && !strcmp(prefix->color, "\33[1;30m")) logger->debug(formatted_msg); diff --git a/fpga/tests/rtds.cpp b/fpga/tests/rtds.cpp index 3a105f948..bde8ed8aa 100644 --- a/fpga/tests/rtds.cpp +++ b/fpga/tests/rtds.cpp @@ -39,26 +39,23 @@ #include "global.hpp" -#undef cr_assert -#define cr_assert(cond, ...) (cond); - using namespace villas::fpga::ip; Test(fpga, rtds, .description = "RTDS") { - auto logger = villas::logging.get("unittest:rtds"); + auto logger = villas::logging.get("unit-test:rtds"); std::list rtdsIps; std::list dmaIps; - for(auto& ip : state.cards.front()->ips) { - if(*ip == villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) { + for (auto& ip : state.cards.front()->ips) { + if (*ip == villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) { auto rtds = reinterpret_cast(ip.get()); rtdsIps.push_back(rtds); } - if(*ip == villas::fpga::Vlnv("xilinx.com:ip:axi_dma:")) { + if (*ip == villas::fpga::Vlnv("xilinx.com:ip:axi_dma:")) { auto dma = reinterpret_cast(ip.get()); dmaIps.push_back(dma); } @@ -68,8 +65,8 @@ Test(fpga, rtds, .description = "RTDS") cr_assert(dmaIps.size() > 0, "No DMA IPs available to test RTDS with"); - for(auto rtds : rtdsIps) { - for(auto dma : dmaIps) { + for (auto rtds : rtdsIps) { + for (auto dma : dmaIps) { logger->info("Testing {} with DMA {}", *rtds, *dma); rtds->dump(); @@ -82,7 +79,7 @@ Test(fpga, rtds, .description = "RTDS") // rtds->connect(*rtds); // logger->info("loopback"); -// while(1); +// while (1); // rtds->connect(rtdsMaster, dmaSlave); // dma->connect(dmaMaster, rtdsSlave); @@ -92,7 +89,7 @@ Test(fpga, rtds, .description = "RTDS") // auto start = std::chrono::high_resolution_clock::now(); - for(int i = 1; i < 5; i++) { + for (int i = 1; i < 5; i++) { logger->info("RTT iteration {}", i); // logger->info("Prepare read"); @@ -117,11 +114,11 @@ Test(fpga, rtds, .description = "RTDS") // usleep(5); // sched_yield(); -// for(int i = 0;) +// for (int i = 0;) // rdtsc_sleep(); // static constexpr int loopCount = 10000; -// if(i % loopCount == 0) { +// if (i % loopCount == 0) { // const auto end = std::chrono::high_resolution_clock::now(); // auto durationUs = std::chrono::duration_cast(end - start) / loopCount; diff --git a/fpga/tests/rtds2gpu.cpp b/fpga/tests/rtds2gpu.cpp index a36cf6f18..869ab580a 100644 --- a/fpga/tests/rtds2gpu.cpp +++ b/fpga/tests/rtds2gpu.cpp @@ -54,11 +54,11 @@ static void dumpMem(const uint32_t* addr, size_t len) size_t bytesRead = 0; - for(size_t line = 0; line < lines; line++) { + for (size_t line = 0; line < lines; line++) { const unsigned base = line * bytesPerLine; printf("0x%04x: ", base); - for(size_t i = 0; i < bytesPerLine && bytesRead < len; i++) { + for (size_t i = 0; i < bytesPerLine && bytesRead < len; i++) { printf("0x%02x ", buf[base + i]); bytesRead++; } @@ -68,10 +68,10 @@ static void dumpMem(const uint32_t* addr, size_t len) Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") { - auto logger = villas::logging.get("unittest:rtds2gpu"); + auto logger = villas::logging.get("unit-test:rtds2gpu"); - for(auto& ip : state.cards.front()->ips) { - if(*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:hls:rtds2gpu:")) + for (auto& ip : state.cards.front()->ips) { + if (*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:hls:rtds2gpu:")) continue; logger->info("Testing {}", *ip); @@ -136,7 +136,7 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") cr_assert(dma->writeComplete(), "DMA failed"); - while(not rtds2gpu.isFinished()); + while (not rtds2gpu.isFinished()); const uint32_t* doorbellDst = &dmaMemDst[DOORBELL_OFFSET]; rtds2gpu.dump(spdlog::level::info); @@ -145,7 +145,7 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") cr_assert(memcmp(dataSrc, dataDst, FRAME_SIZE) == 0, "Memory not equal"); - for(size_t i = 0; i < SAMPLE_COUNT; i++) { + for (size_t i = 0; i < SAMPLE_COUNT; i++) { gpu2rtds->registerFrames[i] = dmaMemDst[i]; } @@ -162,7 +162,7 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") cr_assert(dma->readComplete(), "DMA failed"); - while(not gpu2rtds->isFinished()); + while (not gpu2rtds->isFinished()); cr_assert(memcmp(dataSrc, dataDst2, FRAME_SIZE) == 0, "Memory not equal"); @@ -176,7 +176,7 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU") { - auto logger = villas::logging.get("unittest:rtds2gpu"); + auto logger = villas::logging.get("unit-test:rtds2gpu"); /* Collect neccessary IPs */ @@ -189,8 +189,8 @@ Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU") cr_assert_not_null(gpu2rtds, "No Gpu2Rtds IP found"); cr_assert_not_null(rtds2gpu, "No Rtds2Gpu IP not found"); - for(auto& ip : state.cards.front()->ips) { - if(*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) + for (auto& ip : state.cards.front()->ips) { + if (*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) continue; auto& rtds = dynamic_cast(*ip); @@ -203,33 +203,33 @@ Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU") // TEST: rtds loopback via switch, this should always work and have RTT=1 //cr_assert(rtds.connect(rtds)); //logger->info("loopback"); - //while(1); + //while (1); cr_assert(rtds.connect(*rtds2gpu)); cr_assert(gpu2rtds->connect(rtds)); - for(size_t i = 1; i <= 10000; ) { + for (size_t i = 1; i <= 10000; ) { rtds2gpu->doorbellReset(*doorbell); rtds2gpu->startOnce(dmaRam.getMemoryBlock(), SAMPLE_COUNT, DATA_OFFSET * 4, DOORBELL_OFFSET * 4); // Wait by polling rtds2gpu IP or ... - // while(not rtds2gpu->isFinished()); + // while (not rtds2gpu->isFinished()); // Wait by polling (local) doorbell register (= just memory) - while(not rtds2gpu->doorbellIsValid(*doorbell)); + while (not rtds2gpu->doorbellIsValid(*doorbell)); // copy samples to gpu2rtds IP - for(size_t i = 0; i < SAMPLE_COUNT; i++) { + for (size_t i = 0; i < SAMPLE_COUNT; i++) { gpu2rtds->registerFrames[i] = data[i]; } // Waiting for gpu2rtds is not strictly required gpu2rtds->startOnce(SAMPLE_COUNT); - //while(not gpu2rtds->isFinished()); + //while (not gpu2rtds->isFinished()); - if(i % 1000 == 0) { + if (i % 1000 == 0) { logger->info("Successful iterations {}, data {}", i, data[0]); rtds2gpu->dump(); rtds2gpu->dumpDoorbell(data[1]); @@ -247,7 +247,7 @@ void gpu_rtds_rtt_stop(); Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU") { - auto logger = villas::logging.get("unittest:rtds2gpu"); + auto logger = villas::logging.get("unit-test:rtds2gpu"); /* Collect neccessary IPs */ @@ -289,8 +289,8 @@ Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU") // auto doorbellInCpu = reinterpret_cast(&gpuRam[DOORBELL_OFFSET]); - for(auto& ip : state.cards.front()->ips) { - if(*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) + for (auto& ip : state.cards.front()->ips) { + if (*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) continue; auto& rtds = dynamic_cast(*ip); @@ -300,7 +300,7 @@ Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU") // TEST: rtds loopback via switch, this should always work and have RTT=1 //cr_assert(rtds.connect(rtds)); //logger->info("loopback"); - //while(1); + //while (1); cr_assert(rtds.connect(*rtds2gpu)); cr_assert(gpu2rtds->connect(rtds)); @@ -321,19 +321,19 @@ Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU") gpu_rtds_rtt_start(dataIn, doorbellIn, frameRegister, controlRegister); -// while(1) { +// while (1) { // cr_assert(rtds2gpu->startOnce(gpuRam.getMemoryBlock(), SAMPLE_COUNT, DATA_OFFSET * 4, DOORBELL_OFFSET * 4)); // } -// for(int i = 0; i < 10000; i++) { -// while(not doorbellInCpu->is_valid); +// for (int i = 0; i < 10000; i++) { +// while (not doorbellInCpu->is_valid); // logger->debug("received data"); // } // logger->info("Press enter to cancel"); // std::cin >> dummy; - while(1) { + while (1) { sleep(1); // logger->debug("Current sequence number: {}", doorbellInCpu->seq_nr); logger->debug("Still running"); diff --git a/fpga/tests/timer.cpp b/fpga/tests/timer.cpp index 3eb24bd04..8a0ff82f6 100644 --- a/fpga/tests/timer.cpp +++ b/fpga/tests/timer.cpp @@ -31,13 +31,13 @@ Test(fpga, timer, .description = "Timer Counter") { - auto logger = villas::logging.get("unittest:timer"); + auto logger = villas::logging.get("unit-test:timer"); size_t count = 0; - for(auto& ip : state.cards.front()->ips) { + for (auto& ip : state.cards.front()->ips) { // skip non-timer IPs - if(*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_timer:")) { + if (*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_timer:")) { continue; }