diff --git a/fpga/etc/fpga.json b/fpga/etc/fpga.json new file mode 100644 index 000000000..276e8441e --- /dev/null +++ b/fpga/etc/fpga.json @@ -0,0 +1,138 @@ +{ + "affinity": 1, + "stats": 3, + "name": "villas-acs", + "logging": { + "level": 5, + "faciltities": [ + "path", + "socket" + ], + "file": "/var/log/villas-node.log", + "syslog": true + }, + "http": { + "enabled": true, + "htdocs": "/villas/web/socket/", + "port": 80 + }, + "plugins": [ + "simple_circuit.so", + "example_hook.so" + ], + "fpgas": { + "vc707": { + "id": "10ee:7022", + "slot": "01:00.0", + "do_reset": true, + "ips": { + "axi_pcie_intc_0": { + "vlnv": "acs.eonerc.rwth-aachen.de:user:axi_pcie_intc:1.0", + "baseaddr": 45056 + }, + "switch_0": { + "vlnv": "xilinx.com:ip:axis_interconnect:2.1", + "baseaddr": 20480, + "num_ports": 10, + "paths": [ + { + "in": "rtds_axis_0", + "out": "dma_1", + "reverse": true + } + ] + }, + "axi_reset_0": { + "vlnv": "xilinx.com:ip:axi_gpio:2.0", + "baseaddr": 28672 + }, + "timer_0": { + "vlnv": "xilinx.com:ip:axi_timer:2.0", + "baseaddr": 16384, + "irq": 0 + }, + "dma_0": { + "vlnv": "xilinx.com:ip:axi_dma:7.1", + "baseaddr": 12288, + "port": 1, + "irq": 3 + }, + "dma_1": { + "vlnv": "xilinx.com:ip:axi_dma:7.1", + "baseaddr": 8192, + "port": 6, + "irq": 3 + }, + "fifo_mm_s_0": { + "vlnv": "xilinx.com:ip:axi_fifo_mm_s:4.1", + "baseaddr": 24576, + "baseaddr_axi4": 49152, + "port": 2, + "irq": 2 + }, + "rtds_axis_0": { + "vlnv": "acs.eonerc.rwth-aachen.de:user:rtds_axis:1.0", + "baseaddr": 32768, + "port": 0, + "irq": 5 + }, + "hls_dft_0": { + "vlnv": "acs.eonerc.rwth-aachen.de:hls:hls_dft:1.0", + "baseaddr": 36864, + "port": 5, + "irq": 1, + "period": 400, + "harmonics": [ + 0, + 1, + 3, + 5, + 7 + ], + "decimation": 0 + }, + "axis_data_fifo_0": { + "vlnv": "xilinx.com:ip:axis_data_fifo:1.1", + "port": 3 + }, + "axis_data_fifo_1": { + "vlnv": "xilinx.com:ip:axis_data_fifo:1.1", + "port": 6 + } + } + } + }, + "nodes": { + "dma_0": { + "type": "fpga", + "datamover": "dma_0", + "use_irqs": false + }, + "dma_1": { + "type": "fpga", + "datamover": "dma_1", + "use_irqs": false + }, + "fifo_0": { + "type": "fpga", + "datamover": "fifo_mm_s_0", + "use_irqs": false + }, + "simple_circuit": { + "type": "cbuilder", + "model": "simple_circuit", + "timestep": 2.5000000000000001e-5, + "parameters": [ + 1.0, + 0.001 + ] + } + }, + "paths": [ + { + "in": "dma_1", + "out": "simple_circuit", + "reverse": true + } + ] +} \ No newline at end of file diff --git a/fpga/tests/main.c b/fpga/tests/main.c index 866f23131..5c9a62d9e 100644 --- a/fpga/tests/main.c +++ b/fpga/tests/main.c @@ -29,7 +29,8 @@ #include #include -#define TEST_CONFIG "/villas/etc/fpga.conf" +#define FPGA_CARD "vc707" +#define TEST_CONFIG "/villas/etc/fpga.json" #define TEST_LEN 0x1000 #define CPU_HZ 3392389000 @@ -46,7 +47,6 @@ static void init() FILE *f; json_error_t err; - json_t *json; ret = pci_init(&pci); cr_assert_eq(ret, 0, "Failed to initialize PCI sub-system"); @@ -56,22 +56,31 @@ static void init() /* Parse FPGA configuration */ f = fopen(TEST_CONFIG, "r"); - cr_assert_not_null(f); + cr_assert_not_null(f, "Cannot open config file"); - json = json_loadf(f, 0, &err); - cr_assert_not_null(json); + json_t *json = json_loadf(f, 0, &err); + cr_assert_not_null(json, "Cannot load JSON config"); fclose(f); - list_init(&cards); - ret = fpga_card_parse_list(&cards, json); + json_t *fpgas = json_object_get(json, "fpgas"); + cr_assert_not_null(fpgas, "No section 'fpgas' found in config"); + cr_assert(json_object_size(json) > 0, "No FPGAs defined in config"); + + json_t *json_card = json_object_get(fpgas, FPGA_CARD); + cr_assert_not_null(json_card, "FPGA card " FPGA_CARD " not found"); + + card = (struct fpga_card *) alloc(sizeof(struct fpga_card)); + cr_assert_not_null(card, "Cannot allocate memory for FPGA card"); + + ret = fpga_card_init(card, &pci, &vc); + cr_assert_eq(ret, 0, "FPGA card initialization failed"); + + ret = fpga_card_parse(card, json_card, FPGA_CARD); cr_assert_eq(ret, 0, "Failed to parse FPGA config"); json_decref(json); - card = list_lookup(&cards, "vc707"); - cr_assert(card, "FPGA card not found"); - if (criterion_options.logging_threshold < CRITERION_IMPORTANT) fpga_card_dump(card); }