diff --git a/fpga/include/villas/fpga/core.hpp b/fpga/include/villas/fpga/core.hpp index 177e651e2..d88ee46a8 100644 --- a/fpga/include/villas/fpga/core.hpp +++ b/fpga/include/villas/fpga/core.hpp @@ -208,6 +208,7 @@ public: using plugin::Plugin::Plugin; static std::list parseVLNV(json_t *json_ips); + static std::list reorderIps(std::list allIps); // Returns a running and checked FPGA IP static std::list> make(Card *card, json_t *json_ips); diff --git a/fpga/lib/core.cpp b/fpga/lib/core.cpp index b16b09696..5b0361933 100644 --- a/fpga/lib/core.cpp +++ b/fpga/lib/core.cpp @@ -56,8 +56,11 @@ std::list CoreFactory::parseVLNV(json_t *json_ips) { return allIps; } +std::list +CoreFactory::reorderIps(std::list allIps) { // Pick out IPs to be initialized first. - // + std::list orderedIps; + // Reverse walktrough, because we push to the // front of the output list, so that the first element will also be the // first to be initialized. @@ -75,11 +78,14 @@ std::list CoreFactory::parseVLNV(json_t *json_ips) { // Insert all other IPs at the end orderedIps.splice(orderedIps.end(), allIps); + auto loggerStatic = CoreFactory::getStaticLogger(); loggerStatic->debug("IP initialization order:"); for (auto &id : orderedIps) { loggerStatic->debug(" " CLR_BLD("{}"), id.getName()); } + return orderedIps; +} // Configure all IPs for (auto &id : orderedIps) { loggerStatic->info("Configuring {}", id);