From d5b1012b75dbf377a7050c9c0dad2d978feaa980 Mon Sep 17 00:00:00 2001
From: Steffen Vogel <post@steffenvogel.de>
Date: Thu, 11 Jun 2020 15:56:34 +0200
Subject: [PATCH] intc: fix name of register space

---
 fpga/include/villas/fpga/ips/gpio.hpp | 84 +++++++++++++++++++++++++++
 fpga/include/villas/fpga/ips/intc.hpp |  2 +-
 fpga/lib/ips/intc.cpp                 |  2 +-
 3 files changed, 86 insertions(+), 2 deletions(-)
 create mode 100644 fpga/include/villas/fpga/ips/gpio.hpp

diff --git a/fpga/include/villas/fpga/ips/gpio.hpp b/fpga/include/villas/fpga/ips/gpio.hpp
new file mode 100644
index 000000000..745d29248
--- /dev/null
+++ b/fpga/include/villas/fpga/ips/gpio.hpp
@@ -0,0 +1,84 @@
+/** AXI General Purpose IO (GPIO)
+ *
+ * @file
+ * @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
+ * @author Daniel Krebs <github@daniel-krebs.net>
+ * @copyright 2017-2020, Steffen Vogel
+ * @license GNU General Public License (version 3)
+ *
+ * VILLASfpga
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *********************************************************************************/
+
+/** @addtogroup fpga VILLASfpga
+ * @{
+ */
+
+#pragma once
+
+#include <xilinx/xintc.h>
+
+#include <villas/fpga/ip.hpp>
+
+namespace villas {
+namespace fpga {
+namespace ip {
+
+
+class GeneralPurposeIO : public IpCore
+{
+public:
+
+	bool init();
+
+private:
+
+	static constexpr char registerMemory[] = "Reg";
+
+	std::list<MemoryBlockName> getMemoryBlocks() const
+	{ return { registerMemory }; }
+};
+
+class GeneralPurposeIOFactory : public IpCoreFactory {
+public:
+
+	GeneralPurposeIOFactory() :
+	    IpCoreFactory(getName(), getDescription())
+	{}
+
+	static constexpr const char*
+	getCompatibleVlnvString()
+	{ return "xilinx.com:ip:axi_gpio:"; }
+
+	IpCore* create()
+	{ return new GeneralPurposeIO; }
+
+	std::string
+	getName() const
+	{ return "GeneralPurposeIO"; }
+
+	std::string
+	getDescription() const
+	{ return "Xilinx's AXI4 general purpose IO"; }
+
+	Vlnv getCompatibleVlnv() const
+	{ return Vlnv(getCompatibleVlnvString()); }
+};
+
+} /* namespace ip */
+} /* namespace fpga */
+} /* namespace villas */
+
+/** @} */
diff --git a/fpga/include/villas/fpga/ips/intc.hpp b/fpga/include/villas/fpga/ips/intc.hpp
index 05dff9191..56f0cc63d 100644
--- a/fpga/include/villas/fpga/ips/intc.hpp
+++ b/fpga/include/villas/fpga/ips/intc.hpp
@@ -61,7 +61,7 @@ public:
 
 private:
 
-	static constexpr char registerMemory[] = "Reg";
+	static constexpr char registerMemory[] = "reg0";
 
 	std::list<MemoryBlockName> getMemoryBlocks() const
 	{ return { registerMemory }; }
diff --git a/fpga/lib/ips/intc.cpp b/fpga/lib/ips/intc.cpp
index 29f85e855..5958faf16 100644
--- a/fpga/lib/ips/intc.cpp
+++ b/fpga/lib/ips/intc.cpp
@@ -80,7 +80,7 @@ InterruptController::init()
 		XIntc_Out32(base + XIN_IVAR_OFFSET + i * 4, i);
 	}
 
-	XIntc_Out32(base + XIN_IMR_OFFSET, 0);		/* Use manual acknowlegement for all IRQs */
+	XIntc_Out32(base + XIN_IMR_OFFSET, 0x00000000); /* Use manual acknowlegement for all IRQs */
 	XIntc_Out32(base + XIN_IAR_OFFSET, 0xFFFFFFFF); /* Acknowlege all pending IRQs manually */
 	XIntc_Out32(base + XIN_IMR_OFFSET, 0xFFFFFFFF); /* Use fast acknowlegement for all IRQs */
 	XIntc_Out32(base + XIN_IER_OFFSET, 0x00000000); /* Disable all IRQs by default */