From e0959b562f5bf9b7e623df37d9ba70dd73f0d1bf Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Tue, 21 Nov 2017 18:42:27 +0100 Subject: [PATCH] hwdef-parse: parse baseaddr and size of BRAM instances in the design --- tools/hwdef-parse.py | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/tools/hwdef-parse.py b/tools/hwdef-parse.py index 81988c928..f114d3a34 100755 --- a/tools/hwdef-parse.py +++ b/tools/hwdef-parse.py @@ -33,7 +33,8 @@ whitelist = [ [ 'acs.eonerc.rwth-aachen.de', 'user', 'rtds_axis' ], [ 'acs.eonerc.rwth-aachen.de', 'hls' ], [ 'acs.eonerc.rwth-aachen.de', 'sysgen' ], - [ 'xilinx.com', 'ip', 'axi_gpio' ] + [ 'xilinx.com', 'ip', 'axi_gpio' ], + [ 'xilinx.com', 'ip', 'axi_bram_ctrl' ] ] # List of VLNI ids of AXI4-Stream infrastructure IP cores which do not alter data @@ -183,4 +184,17 @@ for port in ports: if instance in ips: ips[instance]['irqs'][irqname] = irq +# Find BRAM storage depths (size) +brams = root.xpath('.//MODULE[@MODTYPE="axi_bram_ctrl"]') +for bram in brams: + instance = bram.get('INSTANCE') + + width = bram.find('.//PARAMETER[@NAME="DATA_WIDTH"]').get('VALUE') + depth = bram.find('.//PARAMETER[@NAME="MEM_DEPTH"]').get('VALUE') + + size = int(width) * int(depth) / 8 + + if instance in ips: + ips[instance]['size'] = int(size) + print(json.dumps(ips, indent=2))