From 8ec16094f2260e4e0d4d60d8bba632c939bb908b Mon Sep 17 00:00:00 2001
From: Steffen Vogel <post@steffenvogel.de>
Date: Mon, 27 Jul 2020 16:42:24 +0200
Subject: [PATCH] fix code-style

---
 fpga/gpu/src/gpu.cpp    | 7 +++----
 fpga/lib/core.cpp       | 4 ++--
 fpga/lib/ips/dma.cpp    | 2 +-
 fpga/lib/ips/fifo.cpp   | 2 +-
 fpga/lib/ips/switch.cpp | 4 ++--
 5 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/fpga/gpu/src/gpu.cpp b/fpga/gpu/src/gpu.cpp
index 910dfd19d..4c9a214f3 100644
--- a/fpga/gpu/src/gpu.cpp
+++ b/fpga/gpu/src/gpu.cpp
@@ -121,8 +121,7 @@ bool Gpu::registerIoMemory(const MemoryBlock &mem)
 			return true;
 		else 
 			logger->warn("There's already a mapping, but too small");
-	}
-	catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		// not yet reachable, that's okay, proceed
 	}
 
@@ -154,7 +153,7 @@ bool Gpu::registerIoMemory(const MemoryBlock &mem)
 		                                        mappedBaseAddrSpaceId);
 		baseAddrOnPci = translationPci.getLocalAddr(0);
 		sizeOnPci = translationPci.getSize();
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		logger->error("Memory is not reachable via PCIe bus");
 		return false;
 	}
@@ -324,7 +323,7 @@ Gpu::makeAccessibleFromPCIeOrHostRam(const MemoryBlock &mem)
 	try {
 		auto path = mm.findPath(mm.getPciAddressSpace(), mem.getAddrSpaceId());
 		isIoMemory = true;
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		// not reachable via PCI -> not IO memory
 	}
 
diff --git a/fpga/lib/core.cpp b/fpga/lib/core.cpp
index 325525183..06837c487 100644
--- a/fpga/lib/core.cpp
+++ b/fpga/lib/core.cpp
@@ -178,7 +178,7 @@ CoreFactory::make(PCIeCard* card, json_t *json_ips)
 				int num;
 				try {
 					num = std::stoi(tokens[1]);
-				} catch(const std::invalid_argument&) {
+				} catch (const std::invalid_argument&) {
 					logger->warn("IRQ number is not an integer: '{}'", irqEntry);
 					continue;
 				}
@@ -357,7 +357,7 @@ Core::getInterruptController(const std::string &interruptName) const
 	try {
 		const IrqPort irq = irqs.at(interruptName);
 		return irq.irqController;
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		return nullptr;
 	}
 }
diff --git a/fpga/lib/ips/dma.cpp b/fpga/lib/ips/dma.cpp
index 7dd6dc8cf..31e72c71f 100644
--- a/fpga/lib/ips/dma.cpp
+++ b/fpga/lib/ips/dma.cpp
@@ -381,7 +381,7 @@ Dma::isMemoryBlockAccesible(const MemoryBlock &mem, const std::string &interface
 
 	try {
 		mm.findPath(getMasterAddrSpaceByInterface(interface), mem.getAddrSpaceId());
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		// not (yet) accessible
 		return false;
 	}
diff --git a/fpga/lib/ips/fifo.cpp b/fpga/lib/ips/fifo.cpp
index 35de585f9..1ded8acad 100644
--- a/fpga/lib/ips/fifo.cpp
+++ b/fpga/lib/ips/fifo.cpp
@@ -47,7 +47,7 @@ bool Fifo::init()
 		// if this throws an exception, then there's no AXI4 data interface
 		fifo_cfg.Axi4BaseAddress = getBaseAddr(axi4Memory);
 		fifo_cfg.Datainterface = 1;
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		fifo_cfg.Datainterface = 0;
 	}
 
diff --git a/fpga/lib/ips/switch.cpp b/fpga/lib/ips/switch.cpp
index d79d7bb40..f0d20aa6e 100644
--- a/fpga/lib/ips/switch.cpp
+++ b/fpga/lib/ips/switch.cpp
@@ -76,7 +76,7 @@ AxiStreamSwitch::connectInternal(const std::string &portSlave,
 	// check if slave port exists
 	try {
 		getSlavePort(portSlave);
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		logger->error("Switch doesn't have a slave port named '{}'", portSlave);
 		return false;
 	}
@@ -84,7 +84,7 @@ AxiStreamSwitch::connectInternal(const std::string &portSlave,
 	// check if master port exists
 	try {
 		getMasterPort(portMaster);
-	} catch(const std::out_of_range&) {
+	} catch (const std::out_of_range&) {
 		logger->error("Switch doesn't have a master port named '{}'", portMaster);
 		return false;
 	}