From f6a78bea6955e4d469431d7401369528cbe23e25 Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Thu, 15 Aug 2019 13:54:58 +0200 Subject: [PATCH] dma: add dump() method --- fpga/include/villas/fpga/ips/dma.hpp | 2 ++ fpga/lib/ips/dma.cpp | 12 ++++++++++++ 2 files changed, 14 insertions(+) diff --git a/fpga/include/villas/fpga/ips/dma.hpp b/fpga/include/villas/fpga/ips/dma.hpp index 12cf0236a..73768cbb8 100644 --- a/fpga/include/villas/fpga/ips/dma.hpp +++ b/fpga/include/villas/fpga/ips/dma.hpp @@ -88,6 +88,8 @@ public: bool isMemoryBlockAccesible(const MemoryBlock& mem, const std::string& interface); + virtual void dump(); + private: static constexpr char registerMemory[] = "Reg"; diff --git a/fpga/lib/ips/dma.cpp b/fpga/lib/ips/dma.cpp index 0cc5297dd..fa4490962 100644 --- a/fpga/lib/ips/dma.cpp +++ b/fpga/lib/ips/dma.cpp @@ -114,6 +114,8 @@ Dma::init() bool Dma::reset() { + logger->info("DMA resetted"); + XAxiDma_Reset(&xDma); // value taken from libxil implementation @@ -396,6 +398,16 @@ Dma::isMemoryBlockAccesible(const MemoryBlock& mem, const std::string& interface return true; } +void +Dma::dump() +{ + IpCore::dump(); + + logger->info("S2MM_DMACR: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_CR_OFFSET)); + logger->info("S2MM_DMASR: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_SR_OFFSET)); + logger->info("S2MM_LENGTH: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_BUFFLEN_OFFSET)); +} + } // namespace ip } // namespace fpga