logging = {
	level = "debug"
}

fpgas = {
	vc707 = {
		# Card identification
		id = "10ee:7022"
		# slot = "88:00.0"
		
		do_reset = true

		ips = "/global/projects/villas/fpga/software/etc/vc707-xbar-pcie/vc707-xbar-pcie.json"
	}
}

nodes = {
	dma_0 = {
		type = "fpga",

		card = "vc707"
		datamover = "dma_0"
		use_irqs = false
	}
}

paths = (
	{
		in = "dma_0"

		hooks = (
			{
				type = "print"
			}
		)
	}
)