2015-10-24 18:51:31 +02:00
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/*
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* Copyright (c) 2010-2015, Stefan Lankes, RWTH Aachen University
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* All rights reserved.
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*
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* * Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2017-05-30 23:05:30 +02:00
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/**
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2015-10-24 18:51:31 +02:00
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* @author Stefan Lankes
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* @file arch/x86/include/asm/pci.h
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* @brief functions related to PCI initialization and information
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*
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* This file contains a procedure to initialize the PCI environment
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* and functions to access information about specific PCI devices.
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*/
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#ifndef __ARCH_PCI_H__
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#define __ARCH_PCI_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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uint32_t base[6];
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uint32_t size[6];
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uint32_t irq;
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} pci_info_t;
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2017-06-05 11:12:36 +02:00
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#define PCI_IGNORE_SUBID (0)
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2015-10-24 18:51:31 +02:00
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/** @brief Initialize the PCI environment
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*/
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int pci_init(void);
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/** @brief Determine the IObase address and the interrupt number of a specific device
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*
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* @param vendor_id The device's vendor ID
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2017-06-05 11:12:36 +02:00
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* @param device_id The device's ID
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* @param subystem_id The subsystem DI
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2015-10-24 18:51:31 +02:00
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* @param info Pointer to the record pci_info_t where among other the IObase address will be stored
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2016-08-21 14:58:31 +02:00
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* @param enable_bus_master If true, the bus mastering will be enabled.
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2015-10-24 18:51:31 +02:00
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*
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2017-05-30 23:05:30 +02:00
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* @return
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2015-10-24 18:51:31 +02:00
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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2017-06-05 11:12:36 +02:00
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int pci_get_device_info(uint32_t vendor_id, uint32_t device_id, uint32_t subsystem_id, pci_info_t* info, int8_t enble_bus_master);
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2015-10-24 18:51:31 +02:00
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/** @brief Print information of existing pci adapters
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*
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* @return 0 in any case
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*/
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int print_pci_adapters(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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