diff --git a/arch/x86/kernel/uart.c b/arch/x86/kernel/uart.c index 7631dc88e..f78f5a6d0 100644 --- a/arch/x86/kernel/uart.c +++ b/arch/x86/kernel/uart.c @@ -154,12 +154,8 @@ int uart_puts(const char *text) static int uart_config(void) { - /* - * enable FIFOs - * clear RX and TX FIFO - * set irq trigger to 8 bytes - */ - write_to_uart(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1); + if (!uartport) + return 0; /* disable interrupts */ write_to_uart(UART_IER, 0); @@ -176,15 +172,21 @@ static int uart_config(void) write_to_uart(UART_LCR, lcr); /* - * set baudrate to 9600 + * set baudrate to 38400 */ - uint32_t divisor = 1843200 / 9600; //115200; - write_to_uart(UART_DLL, divisor & 0xff); - write_to_uart(UART_DLM, (divisor >> 8) & 0xff); + write_to_uart(UART_DLL, 0x03); + write_to_uart(UART_DLM, 0x00); /* set DLAB=0 */ write_to_uart(UART_LCR, lcr & (~UART_LCR_DLAB)); + /* + * enable FIFOs + * clear RX and TX FIFO + * set irq trigger to 8 bytes + */ + write_to_uart(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1); + return 0; } diff --git a/arch/x86/loader/uart.c b/arch/x86/loader/uart.c index 8141a61a6..5d0599843 100644 --- a/arch/x86/loader/uart.c +++ b/arch/x86/loader/uart.c @@ -150,13 +150,6 @@ static int uart_config(void) if (!uartport) return 0; - /* - * enable FIFOs - * clear RX and TX FIFO - * set irq trigger to 8 bytes - */ - write_to_uart(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1); - /* disable interrupts */ write_to_uart(UART_IER, 0); @@ -172,15 +165,21 @@ static int uart_config(void) write_to_uart(UART_LCR, lcr); /* - * set baudrate to 9600 + * set baudrate to 38400 */ - uint32_t divisor = 1843200 / 9600; // 115200; - write_to_uart(UART_DLL, divisor & 0xff); - write_to_uart(UART_DLM, (divisor >> 8) & 0xff); + write_to_uart(UART_DLL, 0x03); + write_to_uart(UART_DLM, 0x00); /* set DLAB=0 */ write_to_uart(UART_LCR, lcr & (~UART_LCR_DLAB)); + /* + * enable FIFOs + * clear RX and TX FIFO + * set irq trigger to 8 bytes + */ + write_to_uart(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1); + return 0; }