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prepare kernel to run on one core (without SMP suppor)
This commit is contained in:
Stefan Lankes
parent
42c1c06632
commit
8aa55a90dc
6 changed files with 24 additions and 6 deletions
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@ -51,6 +51,7 @@ extern const void kernel_start;
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#define IOAPIC_ADDR ((size_t) &kernel_start - 2*PAGE_SIZE)
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#define LAPIC_ADDR ((size_t) &kernel_start - 1*PAGE_SIZE)
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#define MAX_APIC_CORES 256
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// IO APIC MMIO structure: write reg, then read or write data.
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typedef struct {
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@ -59,7 +60,7 @@ typedef struct {
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uint32_t data;
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} ioapic_t;
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static const apic_processor_entry_t* apic_processors[MAX_CORES] = {[0 ... MAX_CORES-1] = NULL};
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static const apic_processor_entry_t* apic_processors[MAX_APIC_CORES] = {[0 ... MAX_APIC_CORES-1] = NULL};
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extern int32_t boot_processor;
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extern uint32_t cpu_freq;
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apic_mp_t* apic_mp __attribute__ ((section (".data"))) = NULL;
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@ -70,7 +71,7 @@ static uint32_t icr = 0;
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static uint32_t ncores = 1;
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static uint8_t irq_redirect[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0xA, 0xB, 0xC, 0xD, 0xE, 0xF};
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static uint8_t initialized = 0;
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static uint8_t online[MAX_CORES] = {[0 ... MAX_CORES-1] = 0};
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static uint8_t online[MAX_APIC_CORES] = {[0 ... MAX_APIC_CORES-1] = 0};
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spinlock_t bootlock = SPINLOCK_INIT;
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@ -469,7 +470,7 @@ found_mp:
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if (*((uint8_t*) addr) == 0) { // cpu entry
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apic_processor_entry_t* cpu = (apic_processor_entry_t*) addr;
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if (j < MAX_CORES) {
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if (j < MAX_APIC_CORES) {
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// is the processor usable?
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if (cpu->cpu_flags & 0x01) {
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apic_processors[j] = cpu;
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@ -564,6 +565,7 @@ extern int smp_main(void);
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extern void gdt_flush(void);
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extern int set_idle_task(void);
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#if MAX_CORES > 1
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int smp_start(void)
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{
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if (lapic && has_x2apic()) // enable x2APIC support
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@ -599,7 +601,6 @@ int smp_start(void)
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return smp_main();
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}
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#if MAX_CORES > 1
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static inline void set_ipi_dest(uint32_t cpu_id) {
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uint32_t tmp;
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@ -624,7 +625,7 @@ int ipi_tlb_flush(void)
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}
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flags = irq_nested_disable();
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for(i=0; i<MAX_CORES; i++)
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for(i=0; i<MAX_APIC_CORES; i++)
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{
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if (i == core_id)
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continue;
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@ -343,9 +343,11 @@ start64:
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xor rdi, rdi
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Lno_unmap:
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%if MAX_CORES > 1
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mov eax, DWORD [cpu_online]
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cmp eax, 0
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jne Lsmp_main
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%endif
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; set default stack pointer
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mov rsp, boot_stack
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@ -364,6 +366,7 @@ L1:
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call main
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jmp $
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%if MAX_CORES > 1
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Lsmp_main:
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; dirty to hack to determine the cpu id
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; with a temporary stack
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@ -385,6 +388,7 @@ Lsmp_main:
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DQ 0, 0, 0, 0
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DQ 0, 0, 0, 0
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tmp_stack:
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%endif
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global gdt_flush
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extern gp
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@ -235,13 +235,19 @@ int cpu_detection(void) {
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wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NXE);
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wrmsr(MSR_FS_BASE, 0);
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#if MAX_CORES > 1
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wrmsr(MSR_GS_BASE, apic_cpu_id() * ((size_t) &percore_end0 - (size_t) &percore_start));
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#else
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wrmsr(MSR_GS_BASE, 0);
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#endif
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wrmsr(MSR_KERNEL_GS_BASE, 0);
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kprintf("Core %d set per_core offset to 0x%x\n", apic_cpu_id(), rdmsr(MSR_GS_BASE));
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#if MAX_CORES > 1
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/* set core id to apic_cpu_id */
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set_per_core(__core_id, apic_cpu_id());
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#endif
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if (first_time && has_sse())
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wmb = sfence;
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@ -58,10 +58,13 @@ DECLARE_PER_CORE(struct task*, current_task);
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/* allows fast access to the kernel stack */
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DECLARE_PER_CORE(char*, kernel_stack);
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#if MAX_CORES > 1
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/* allows fast access to the core id */
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DECLARE_PER_CORE(uint32_t, __core_id);
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#define CORE_ID per_core(__core_id)
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#else
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#define CORE_ID 0
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#endif
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#ifdef __cplusplus
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}
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@ -94,6 +94,7 @@ static int hermit_init(void)
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return 0;
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}
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#if MAX_CORES > 1
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int smp_main(void)
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{
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int32_t cpu = atomic_int32_inc(&cpu_online);
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@ -109,6 +110,7 @@ int smp_main(void)
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return 0;
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}
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#endif
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// init task => creates all other tasks an initialize the LwIP
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static int initd(void* arg)
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@ -56,7 +56,9 @@ static readyqueues_t readyqueues[1] = {[0] = {task_table+0, NULL, 0, 0, 0, {[0 .
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DEFINE_PER_CORE(task_t*, current_task, task_table+0);
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DEFINE_PER_CORE(char*, kernel_stack, NULL);
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#if MAX_CORES > 1
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DEFINE_PER_CORE(uint32_t, __core_id, 0);
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#endif
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extern const void boot_stack;
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/** @brief helper function for the assembly code to determine the current task
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