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move more helper functions to the architecture dependent directory
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3a383b21e3
commit
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3 changed files with 39 additions and 25 deletions
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@ -30,7 +30,7 @@
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* @file arch/x86/include/asm/tasks.h
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* @brief Task related structure definitions
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*
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* This file contains the task_t structure definition
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* This file contains the task_t structure definition
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* and task state define constants
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*/
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@ -55,7 +55,7 @@ void switch_context(size_t** stack);
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* @param task Pointer to the task structure
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* @param ep The entry point for code execution
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* @param arg Arguments list pointer for the task's stack
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* @param core_id Id of the core, which is firstly used by the task
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* @param core_id Id of the core, which is firstly used by the task
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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@ -77,6 +77,13 @@ static inline int jump_to_user_code(size_t ep, size_t stack)
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return 0;
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}
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/** @brief Architecture dependent initialize routine
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*/
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static inline void arch_init_task(task_t* task)
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{
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set_tss((size_t) task->stack + KERNEL_STACK_SIZE - 0x10, (size_t) task->ist_addr + KERNEL_STACK_SIZE - 0x10);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -82,10 +82,11 @@ extern void isr29(void);
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extern void isr30(void);
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extern void isr31(void);
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static void fault_handler(struct state *s);
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extern void fpu_handler(struct state *s);
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static void arch_fault_handler(struct state *s);
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static void arch_fpu_handler(struct state *s);
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extern void fpu_handler(void);
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/*
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/*
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* This is a very repetitive function... it's not hard, it's
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* just annoying. As you can see, we set the first 32 entries
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* in the IDT to the first 32 ISRs. We can't use a for loop
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@ -94,7 +95,7 @@ extern void fpu_handler(struct state *s);
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* flags to 0x8E. This means that the entry is present, is
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* running in ring 0 (kernel level), and has the lower 5 bits
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* set to the required '14', which is represented by 'E' in
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* hex.
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* hex.
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*/
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void isrs_install(void)
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{
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@ -174,11 +175,11 @@ void isrs_install(void)
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// install the default handler
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for(i=0; i<32; i++)
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irq_install_handler(i, fault_handler);
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irq_install_handler(i, arch_fault_handler);
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// set hanlder for fpu exceptions
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irq_uninstall_handler(7);
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irq_install_handler(7, fpu_handler);
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irq_install_handler(7, arch_fpu_handler);
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}
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/** @brief Exception messages
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@ -186,29 +187,39 @@ void isrs_install(void)
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* This is a simple string array. It contains the message that
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* corresponds to each and every exception. We get the correct
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* message by accessing it like this:
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* exception_message[interrupt_number]
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* exception_message[interrupt_number]
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*/
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static const char *exception_messages[] = {
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"Division By Zero", "Debug", "Non Maskable Interrupt",
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static const char *exception_messages[] = {
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"Division By Zero", "Debug", "Non Maskable Interrupt",
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"Breakpoint", "Into Detected Overflow", "Out of Bounds", "Invalid Opcode",
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"No Coprocessor", "Double Fault", "Coprocessor Segment Overrun", "Bad TSS",
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"Segment Not Present", "Stack Fault", "General Protection Fault", "Page Fault",
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"Unknown Interrupt", "Coprocessor Fault", "Alignment Check", "Machine Check",
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"No Coprocessor", "Double Fault", "Coprocessor Segment Overrun", "Bad TSS",
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"Segment Not Present", "Stack Fault", "General Protection Fault", "Page Fault",
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"Unknown Interrupt", "Coprocessor Fault", "Alignment Check", "Machine Check",
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"SIMD Floating-Point", "Virtualization", "Reserved", "Reserved", "Reserved",
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"Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
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"Reserved", "Reserved" };
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/*
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/* interrupt handler to save / restore the FPU context */
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static void arch_fpu_handler(struct state *s)
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{
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(void) s;
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clts(); // clear the TS flag of cr0
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fpu_handler();
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}
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/*
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* All of our Exception handling Interrupt Service Routines will
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* point to this function. This will tell us what exception has
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* occured! Right now, we simply abort the current task.
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* occured! Right now, we simply abort the current task.
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* All ISRs disable interrupts while they are being
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* serviced as a 'locking' mechanism to prevent an IRQ from
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* happening and messing up kernel data structures
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*/
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static void fault_handler(struct state *s)
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static void arch_fault_handler(struct state *s)
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{
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if (s->int_no < 32)
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LOG_INFO("%s", exception_messages[s->int_no]);
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else
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@ -195,15 +195,11 @@ static void readyqueues_remove(uint32_t core_id, task_t* task)
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}
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/* interrupt handler to save / restore the FPU context */
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void fpu_handler(struct state *s)
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void fpu_handler(void)
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{
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(void) s;
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task_t* task = per_core(current_task);
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uint32_t core_id = CORE_ID;
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clts(); // clear the TS flag of cr0
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task->flags |= TASK_FPU_USED;
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if (!(task->flags & TASK_FPU_INIT)) {
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@ -284,7 +280,7 @@ int multitasking_init(void)
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task_table[0].ist_addr = (char*)&boot_ist;
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set_per_core(kernel_stack, task_table[0].stack + KERNEL_STACK_SIZE - 0x10);
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set_per_core(current_task, task_table+0);
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set_tss((size_t) task_table[0].stack + KERNEL_STACK_SIZE - 0x10, (size_t) task_table[0].ist_addr + KERNEL_STACK_SIZE - 0x10);
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arch_init_task(task_table+0);
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readyqueues[core_id].idle = task_table+0;
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@ -312,7 +308,7 @@ int set_idle_task(void)
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task_table[i].heap = NULL;
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readyqueues[core_id].idle = task_table+i;
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set_per_core(current_task, readyqueues[core_id].idle);
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set_tss((size_t) task_table[i].stack + KERNEL_STACK_SIZE - 0x10, (size_t) task_table[i].ist_addr + KERNEL_STACK_SIZE - 0x10);
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arch_init_task(task_table+i);
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ret = 0;
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break;
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