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add detection of clflushopt and clwb support

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This commit is contained in:
Stefan Lankes 2017-03-03 23:09:49 +01:00
parent 8539e1fbf0
commit cc1f19fe28
2 changed files with 21 additions and 1 deletions
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18
arch/x86/include/asm/processor.h
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@ -431,6 +431,14 @@ inline static uint32_t has_rtm(void) {
return (cpu_info.feature4 & CPU_FEATURE_RTM);
}
inline static uint32_t has_clflushopt(void) {
return (cpu_info.feature4 & CPU_FEATURE_CLFLUSHOPT);
}
inline static uint32_t has_clwb(void) {
return (cpu_info.feature4 & CPU_FEATURE_CLWB);
}
inline static uint32_t has_avx512f(void) {
return (cpu_info.feature4 & CPU_FEATURE_AVX512F);
}
@ -722,6 +730,16 @@ static inline void clflush(volatile void *addr)
asm volatile("clflush %0" : "+m" (*(volatile char *)addr));
}
static inline void clwb(volatile void *addr)
{
asm volatile("clwb %0" : "+m" (*(volatile char *)addr));
}
static inline void clflushopt(volatile void *addr)
{
asm volatile("clflushopt %0" : "+m" (*(volatile char *)addr));
}
#if 0
// the old way to serialize the store and load operations
static inline void mb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory", "cc"); }

4
arch/x86/kernel/processor.c
View file

@ -553,7 +553,7 @@ int cpu_detection(void) {
a = b = c = d = 0;
cpuid(1, &a, &b, &cpu_info.feature2, &cpu_info.feature1);
LOG_INFO("CPU features: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
LOG_INFO("CPU features: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
has_sse() ? "SSE " : "",
has_sse2() ? "SSE2 " : "",
has_sse3() ? "SSE3 " : "",
@ -580,6 +580,8 @@ int cpu_detection(void) {
has_rtm() ? "RTM " : "",
has_hle() ? "HLE " : "",
has_cqm() ? "CQM " : "",
has_clflushopt() ? "CLFLUSHOPT " : "",
has_clwb() ? "CLWB " : "",
has_avx512f() ? "AVX512F " : "",
has_avx512cd() ? "AVX512CD " : "",
has_avx512pf() ? "AVX512PF " : "",