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reserve larger heap, add gap for pci devices

This commit is contained in:
Stefan Lankes 2018-05-15 00:54:13 +02:00
parent b85ff4c333
commit f5fa1569d7
3 changed files with 44 additions and 10 deletions

View file

@ -40,6 +40,9 @@
#define GAP_BELOW 0x100000ULL
#define IB_POOL_SIZE 0x400000ULL
#define PCI_GAP_SIZE (768 << 20)
#define PCI_GAP_START ((1ULL << 32) - PCI_GAP_SIZE)
extern uint64_t base;
extern uint64_t limit;
@ -56,7 +59,7 @@ typedef struct free_list {
extern const void kernel_start;
extern void* host_logical_addr;
uint64_t ib_pool_addr = 0;
//uint64_t ib_pool_addr = 0;
static spinlock_irqsave_t list_lock = SPINLOCK_IRQSAVE_INIT;
@ -87,10 +90,14 @@ size_t get_pages(size_t npages)
goto out;
} else if (i == npages) {
ret = curr->start;
if (curr->prev)
curr->prev = curr->next;
else
if (curr->prev) {
if (curr->next)
curr->next->prev = curr->prev;
curr->prev->next = curr->next;
} else {
free_start = curr->next;
free_start->prev = NULL;
}
if (curr != &init_list)
kfree(curr);
goto out;
@ -295,12 +302,19 @@ int memory_init(void)
goto oom;
}
} else {
// determine available memory
atomic_int64_add(&total_pages, (limit-base) >> PAGE_BITS);
atomic_int64_add(&total_available_pages, (limit-base) >> PAGE_BITS);
init_list.start = PAGE_2M_CEIL(base + image_size);
init_list.end = limit;
if (limit < PCI_GAP_START) {
atomic_int64_add(&total_pages, (limit-base) >> PAGE_BITS);
atomic_int64_add(&total_available_pages, (limit-base) >> PAGE_BITS);
init_list.end = limit;
} else {
atomic_int64_add(&total_pages, (limit-base-PCI_GAP_SIZE) >> PAGE_BITS);
atomic_int64_add(&total_available_pages, (limit-base-PCI_GAP_SIZE) >> PAGE_BITS);
init_list.end = PCI_GAP_START;
}
}
// determine allocated memory, we use 2MB pages to map the kernel
@ -363,6 +377,23 @@ int memory_init(void)
}
}
}
} else {
// add region after the pci gap
if (limit > PCI_GAP_START+PCI_GAP_SIZE) {
free_list_t* last = &init_list;
last->next = kmalloc(sizeof(free_list_t));
if (BUILTIN_EXPECT(!last->next, 0))
goto oom;
last->next->prev = last;
last = last->next;
last->next = NULL;
last->start = PCI_GAP_START+PCI_GAP_SIZE;
last->end = limit;
LOG_INFO("Add region 0x%zx - 0x%zx\n", last->start, last->end);
}
}
// Ok, we are now able to use our memory management => update tss
@ -370,6 +401,7 @@ int memory_init(void)
if (host_logical_addr) {
LOG_INFO("Host has its guest logical address at %p\n", host_logical_addr);
#if 0
size_t phyaddr = get_pages(IB_POOL_SIZE >> PAGE_BITS);
LOG_INFO("Allocate %d MB at physical address 0x%zx for the IB pool\n", IB_POOL_SIZE >> 20, phyaddr);
if (BUILTIN_EXPECT(!page_map((size_t)host_logical_addr+phyaddr, phyaddr, IB_POOL_SIZE >> PAGE_BITS, PG_GLOBAL|PG_RW), 1)) {
@ -377,6 +409,7 @@ int memory_init(void)
ib_pool_addr = (size_t)host_logical_addr+phyaddr;
LOG_INFO("Map IB pool at 0x%zx\n", ib_pool_addr);
}
#endif
}
return ret;

View file

@ -49,7 +49,7 @@ extern size_t image_size;
#define CLOCK_TICK_RATE 1193182 /* 8254 chip's internal oscillator frequency */
#define CACHE_LINE 64
#define HEAP_START (PAGE_2M_CEIL(((size_t)&kernel_start + image_size + (16ULL << 10))))
#define HEAP_SIZE (1ULL << 32)
#define HEAP_SIZE (1ULL << 37)
#define KMSG_SIZE 0x1000
#define INT_SYSCALL 0x80
#define MAILBOX_SIZE 128

View file

@ -68,6 +68,7 @@ int vma_init(void)
ret = vma_add(HEAP_START, HEAP_START+HEAP_SIZE, VMA_NO_ACCESS);
if (BUILTIN_EXPECT(ret, 0))
goto out;
LOG_INFO("Reserve space for the heap: 0x%llx - 0x%llx\n", HEAP_START, HEAP_START+HEAP_SIZE-1);
// we might move the architecture specific VMA regions to a
// seperate function vma_arch_init()