mirror of
https://github.com/hermitcore/libhermit.git
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273 lines
8.4 KiB
NASM
273 lines
8.4 KiB
NASM
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; Copyright (c) 2010-2016, Stefan Lankes, RWTH Aachen University
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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; * Neither the name of the University nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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; This is the kernel's entry point. We could either call main here,
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; or we can use this to setup the stack or other nice stuff, like
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; perhaps setting up the GDT and segments. Please note that interrupts
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; are disabled at this point: More on interrupts later!
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[BITS 32]
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%define KERNEL_STACK_SIZE 4096
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%define VIDEO_MEM_ADDR 0xB8000
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extern kernel_start ; defined in linker script
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extern kernel_end
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; We use a special name to map this section at the begin of our kernel
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; => Multiboot expects its magic number at the beginning of the kernel.
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SECTION .mboot
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global start
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start:
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cli ; avoid any interrupt
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jmp stublet
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; This part MUST be 4 byte aligned, so we solve that issue using 'ALIGN 4'.
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ALIGN 4
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mboot:
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; Multiboot macros to make a few lines more readable later
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MULTIBOOT_PAGE_ALIGN equ (1 << 0)
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MULTIBOOT_MEMORY_INFO equ (1 << 1)
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MULTIBOOT_HEADER_MAGIC equ 0x1BADB002
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MULTIBOOT_HEADER_FLAGS equ MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO
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MULTIBOOT_CHECKSUM equ -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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; This is the GRUB Multiboot header. A boot signature
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dd MULTIBOOT_HEADER_MAGIC
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dd MULTIBOOT_HEADER_FLAGS
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dd MULTIBOOT_CHECKSUM
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dd 0, 0, 0, 0, 0 ; address fields
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ALIGN 4
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; we need already a valid GDT to switch in the 64bit modus
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GDT64: ; Global Descriptor Table (64-bit).
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.Null: equ $ - GDT64 ; The null descriptor.
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dw 0 ; Limit (low).
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dw 0 ; Base (low).
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db 0 ; Base (middle)
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db 0 ; Access.
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db 0 ; Granularity.
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db 0 ; Base (high).
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.Code: equ $ - GDT64 ; The code descriptor.
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dw 0 ; Limit (low).
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dw 0 ; Base (low).
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db 0 ; Base (middle)
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db 10011010b ; Access.
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db 00100000b ; Granularity.
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db 0 ; Base (high).
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.Data: equ $ - GDT64 ; The data descriptor.
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dw 0 ; Limit (low).
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dw 0 ; Base (low).
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db 0 ; Base (middle)
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db 10010010b ; Access.
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db 00000000b ; Granularity.
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db 0 ; Base (high).
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.Pointer: ; The GDT-pointer.
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dw $ - GDT64 - 1 ; Limit.
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dq GDT64 ; Base.
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SECTION .text
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ALIGN 4
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stublet:
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; Initialize stack pointer
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mov esp, boot_stack
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add esp, KERNEL_STACK_SIZE - 16
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; Interpret multiboot information
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mov DWORD [mb_info], ebx
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; This will set up the x86 control registers:
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; Caching and the floating point unit are enabled
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; Bootstrap page tables are loaded and page size
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; extensions (huge pages) enabled.
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cpu_init:
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; initialize page tables
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; map vga 1:1
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; push edi
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; mov eax, VIDEO_MEM_ADDR ; map vga
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; and eax, 0xFFFFF000 ; page align lower half
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; mov edi, eax
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; shr edi, 9 ; (edi >> 12) * 8 (index for boot_pgt)
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; add edi, boot_pgt
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; or eax, 0x13 ; set present, writable and cache disable bits
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; mov DWORD [edi], eax
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; pop edi
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; map multiboot info 1:1
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push edi
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mov eax, DWORD [mb_info] ; map multiboot info
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and eax, 0xFFFFF000 ; page align lower half
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mov edi, eax
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shr edi, 9 ; (edi >> 12) * 8 (index for boot_pgt)
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add edi, boot_pgt
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or eax, 0x3 ; set present and writable bits
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mov DWORD [edi], eax
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pop edi
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; map kernel 1:1
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push edi
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push ebx
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push ecx
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mov ecx, kernel_start
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mov ebx, kernel_end
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add ebx, 0x1000
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L0: cmp ecx, ebx
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jae L1
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mov eax, ecx
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and eax, 0xFFFFF000 ; page align lower half
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mov edi, eax
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shr edi, 9 ; (edi >> 12) * 8 (index for boot_pgt)
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add edi, boot_pgt
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or eax, 0x3 ; set present and writable bits
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mov DWORD [edi], eax
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add ecx, 0x1000
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jmp L0
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L1:
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pop ecx
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pop ebx
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pop edi
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; check for long mode
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; do we have the instruction cpuid?
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pushfd
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pop eax
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mov ecx, eax
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xor eax, 1 << 21
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push eax
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popfd
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pushfd
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pop eax
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push ecx
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popfd
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xor eax, ecx
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jz Linvalid
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; cpuid > 0x80000000?
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mov eax, 0x80000000
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cpuid
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cmp eax, 0x80000001
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jb Linvalid ; It is less, there is no long mode.
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; do we have a long mode?
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mov eax, 0x80000001
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cpuid
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test edx, 1 << 29 ; Test if the LM-bit, which is bit 29, is set in the D-register.
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jz Linvalid ; They aren't, there is no long mode.
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; Set CR3
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mov eax, boot_pml4
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;or eax, (1 << 0) ; set present bit
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mov cr3, eax
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; we need to enable PAE modus
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mov eax, cr4
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or eax, 1 << 5
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mov cr4, eax
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; switch to the compatibility mode (which is part of long mode)
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mov ecx, 0xC0000080
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rdmsr
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or eax, 1 << 8
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wrmsr
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; Set CR4
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mov eax, cr4
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and eax, 0xfffbf9ff ; disable SSE
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or eax, (1 << 7) ; enable PGE
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mov cr4, eax
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; Set CR0 (PM-bit is already set)
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mov eax, cr0
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and eax, ~(1 << 2) ; disable FPU emulation
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or eax, (1 << 1) ; enable FPU montitoring
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and eax, ~(1 << 30) ; enable caching
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and eax, ~(1 << 29) ; disable write through caching
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and eax, ~(1 << 16) ; allow kernel write access to read-only pages
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or eax, (1 << 31) ; enable paging
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mov cr0, eax
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;pop ebx ; restore pointer to multiboot structure
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lgdt [GDT64.Pointer] ; Load the 64-bit global descriptor table.
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jmp GDT64.Code:start64 ; Set the code segment and enter 64-bit long mode.
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; there is no long mode
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Linvalid:
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jmp $
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[BITS 64]
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start64:
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; initialize segment registers
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mov ax, GDT64.Data
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mov ds, ax
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mov es, ax
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mov ss, ax
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mov ax, 0x00
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mov fs, ax
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mov gs, ax
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; set default stack pointer
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mov rsp, boot_stack
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add rsp, KERNEL_STACK_SIZE-16
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; jump to the boot processors's C code
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extern main
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jmp main
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jmp $
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SECTION .data
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global mb_info:
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ALIGN 8
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mb_info:
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DQ 0
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ALIGN 4096
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global boot_stack
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boot_stack:
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TIMES (KERNEL_STACK_SIZE) DB 0xcd
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; Bootstrap page tables are used during the initialization.
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ALIGN 4096
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boot_pml4:
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DQ boot_pdpt + 0x7 ; PG_PRESENT | PG_GLOBAL | PG_RW | PG_USER
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times 510 DQ 0 ; PAGE_MAP_ENTRIES - 2
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DQ boot_pml4 + 0x3 ; PG_PRESENT | PG_GLOBAL | PG_RW
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boot_pdpt:
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DQ boot_pgd + 0x7 ; PG_PRESENT | PG_GLOBAL | PG_RW | PG_USER
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times 510 DQ 0 ; PAGE_MAP_ENTRIES - 2
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DQ boot_pml4 + 0x3 ; PG_PRESENT | PG_GLOBAL | PG_RW
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boot_pgd:
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DQ boot_pgt + 0x7 ; PG_PRESENT | PG_GLOBAL | PG_RW | PG_USER
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times 510 DQ 0 ; PAGE_MAP_ENTRIES - 2
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DQ boot_pml4 + 0x3 ; PG_PRESENT | PG_GLOBAL | PG_RW
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boot_pgt:
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times 512 DQ 0
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; add some hints to the ELF file
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SECTION .note.GNU-stack noalloc noexec nowrite progbits
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