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1 changed files with 3 additions and 2 deletions
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@ -256,6 +256,7 @@ extern "C" {
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INSN_CONFIG_GET_CLOCK_SRC = 2004, // Get master clock source
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INSN_CONFIG_SET_OTHER_SRC = 2005, // Set other source
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// INSN_CONFIG_GET_OTHER_SRC = 2006, // Get other source
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INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE, // Get size in bytes of subdevice's on-board fifos used during streaming input/output
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INSN_CONFIG_SET_COUNTER_MODE = 4097,
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INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */
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INSN_CONFIG_8254_READ_STATUS = 4098,
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@ -264,7 +265,7 @@ extern "C" {
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/* PWM */
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INSN_CONFIG_PWM_SET_PERIOD = 5000, /* sets frequency */
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INSN_CONFIG_PWM_GET_PERIOD = 5001, /* gets frequency */
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INSN_GET_PWM_STATUS = 5002, /* is it running? */
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INSN_CONFIG_GET_PWM_STATUS = 5002, /* is it running? */
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INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, /* sets H bridge: duty cycle and sign bit for a relay at the same time*/
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INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 /* gets H bridge data: duty cycle and the sign bit */
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};
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@ -837,7 +838,7 @@ CR_INVERT to change polarity. */
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AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */
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AMPLC_DIO_CLK_OUTNM1, /* output of preceding counter channel
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(for channel 0, preceding counter
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channel is channel 2 on preceding
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channel is channel 2 on preceding
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counter subdevice, for first counter
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subdevice, preceding counter
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subdevice is the last counter
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