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Additional verbage for extended triggering

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David Schleef 2001-08-19 01:32:30 +00:00
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@ -1823,6 +1823,61 @@ returns 0. On error, this function returns -1.
This chapter is meant to be a reference for some of the advanced
features of Comedi.
<sect1>Digital input combining machines
<p>
When one or several digital inputs are used to modify an output
value, either an accumulator or a single digital line or bit,
a bitfield structure is typically used in the Comedi interface.
The digital inputs have two properties, "sensitive" inputs and
"modifier" inputs. Edge transitions on sensitive inputs cause
changes in the output signal, whereas modifier inputs change the
effect of edge transitions on sensitive inputs. Note that inputs
can be both modifier inputs and sensitive inputs.
<p>
For simplification purposes, it is assumed that multiple digital
inputs do not change simultaneously.
<p>
The combined state of the modifier inputs determine a modifier
state. For each combination of modifier state and sensitive
input, there is a set of bits that determine the effect on the
output value due to positive or negative transitions of the
sensitive input. For each transition direction, there are two
bits defined as follows:
<itemize>
<item>00 - transition is ignored
<item>01 - accumulator is incremented, or output is set
<item>10 - accumulator is decremented, or output is cleared
<item>11 - reserved
</itemize>
<p>
For example, a simple digital follower is specified by the bit
pattern 01 10, because it sets the output on positive transitions
of the input, and clears the output on negative transitions. A
digital inverter is similarily 10 01. These systems have only
one sensitive input.
<p>
As another example, a simple up counter, which increments on
positive transitions of one input, is specified by 01 00. This
system has only one sensitive input.
<p>
When multiple digital inputs are used, the inputs are divided
into two types, inputs which cause changes in the accumulator, and
those that only modify the meaning of transitions on other inputs.
Modifier inputs do not require bitfields, but there needs to be
a bitfield of length 4*(2^(N-1)) for each edge sensitive input,
where N is the total number of inputs. Since N is usually 2 or
3, with only one edge sensitive input, the scaling issues are
not significant.
<sect1>INSN_CONFIG
<p>
@ -1904,9 +1959,9 @@ to loop through. It may be necessary to configure the channels used.
<sect2>Extended Triggering
<p>Status: design
<p>Status: alpha
<p>ID: not assigned
<p>CHanspec: ignored
<p>Chanspec: ignored
<p>
This section covers common information for all extended
@ -1937,6 +1992,12 @@ other trigger sources/arguments that can only be determined at
command test time. Passing all stages of a command test should
only be allowed with a properly configured extended trigger.
<p>
Extended triggers must use data[1] as flags. The upper 16 bits
are reserved and used only for flags that are common to
all extended triggers. The lower 16 bits may be defined by the
particular type of extended trigger.
<p>
Various types of extended triggers must use data[1] to know which
event the extended trigger will be assigned to in the command
@ -1950,46 +2011,45 @@ structure. The possible values are an OR'd mask of the following:
<item>COMEDI_EV_STOP
</itemize>
<p>
Extended triggers must use data[2] as flags. The upper 16 bits
are reserved and used only for flags that are common to
all extended triggers. The lower 16 bits may be defined by the
particular type of extended trigger.
<p>
Notes: data[1] and data[2] may eventually be combined.
<sect2>Analog Triggering
<p>Status: design
<p>Status: alpha
<p>ID: not assigned
<p>Implementation: ni_mio_common
<p>Chanspec: ignored
<p>
Analog triggering is described by a state machine that has two
states, "set" and "reset". Transitions from the reset state to
the set state cause a trigger to be issued. The state machine is
configured by specifying the chanspec
for the analog line to trigger on (data[3]), the voltage level that
resets the trigger (data[4]), and the voltage level that sets the
trigger (data[5]). The interpretation of the chanspec and voltage
levels is device dependent, but should correspond to similar values
of the analog input subdevice, if relevant.
<itemize>
<item>data[1] - trigger and combining machine configuration
<item>data[2] - analog triggering signal chanspec
<item>data[3] - primary analog level
<item>data[4] - secondary analog level
</itemize>
<p>
If the set voltage is greater than the reset voltage, it is
assumed that any voltage greater than the set voltage is sufficient
for the set condition, and any voltage lesser than the reset voltage
is sufficient for the reset condition.
Analog triggering is described by a digital combining machine that
has two sensitive digital inputs. The sensitive digital inputs are
generated by configurable analog comparators. The analog comparators
generate a digital 1 when the analog triggering signal is greater
than the comparator level. The digital inputs are not modifier
inputs. Note, however, there is an effective modifier due to the
restriction that the primary analog comparator level must be less
than the secondary analog comparator level.
<p>
If only one analog comparator signal is used, the combining machine
for the secondary input should be set to ignored, and the secondary
analog level should be set to 0.
<p>
The interpretation of the chanspec and voltage levels is device
dependent, but should correspond to similar values of the analog
input subdevice, if possible.
<p>
Notes: Reading range information is not addressed. This makes it
difficult to convert voltages to data values. A simple
set/reset model may not be sufficient to describe all analog triggers.
In particular, this doesn't properly describe analog triggering that
operates when the input voltage is within some range, but not greater
or lesser than the range.
difficult to convert comparator voltages to data values.
<p>
Possible extensions: A parameter that specifies the necessary time
@ -1998,20 +2058,26 @@ A parameter that specifies the necessary time that the reset condition
has to be true before the state machine is reset.
<sect2>Pattern Matching Triggering
<sect2>Bitfield Pattern Matching Extended Trigger
<p>Status: design
<p>ID: not assigned
<p>Chanspec: ignored
<itemize>
<item>data[1] - trigger flags
<item>data[2] - mask
<item>data[3] - pattern
</itemize>
<p>
The pattern matching trigger issues a trigger when all of a specifed
set of input lines match a specified pattern. If the device allows,
the input lines should correspond to the input lines of a digital input
subdevice, however, this will necessarily be device dependent. Each
possible digital line that can be matched is assigned a bit in the
mask and pattern. A bit set in the mask (data[3]) indicates that the
input line must match the corresponding bit in the pattern (data[4]).
mask and pattern. A bit set in the mask indicates that the
input line must match the corresponding bit in the pattern.
A bit cleared in the mask indicates that the input line is ignored.
<p>
@ -2019,6 +2085,10 @@ Notes: This only allows 32 bits in the pattern/mask, which may be
too few. Devices may support selecting different sets of lines from
which to match a pattern.
<p>
Discovery: The number of bits can be discovered by setting the mask
to all 1's. The driver must modify this value and return -EAGAIN.
<sect2>Counter configuration
@ -2026,19 +2096,29 @@ which to match a pattern.
<p>ID: not assigned
<p>Chanspec: used to specify counter
<itemize>
<item>data[1] - trigger configuration
<item>data[2] - primary input chanspec
<item>data[3] - primary combining machine configuration
<item>data[4] - secondary input chanspec
<item>data[5] - secondary combining machine configuration
<item>data[6] - latch configuration
</itemize>
<p>
Counters can be operated either in synchronous mode (using insn_read)
or asynchronous mode (using commands), similar to analog input subdevices.
The input signal for both modes is the accumulator.
Commands on counter subdevices are almost always specified using
scan_begin_src=TRIG_OTHER, with the counter configuration also serving
as the extended configuration for the scan begin source.
<p>
Counters are made up of an accumulator and a state machine that
Counters are made up of an accumulator and a combining machine that
determines when the accumulator should be incremented or decremented
based on the values of the input signals. The state machine
based on the values of the input signals. The combining machine
optionally determines when the accumulator should be latched and
put into a buffer.
put into a buffer. This feature is used in asynchronous mode.
<p>