From 2621c0b26188e03fab7de58dd8d993250a2a5552 Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Mon, 30 Jun 2014 01:46:59 +0200 Subject: [PATCH] fixed comment capitalization, style and indentions --- arch/x86/kernel/entry.asm | 90 +++++++++++++++++++--------------- include/eduos/config.h.example | 10 ++-- mm/memory.c | 4 +- 3 files changed, 57 insertions(+), 47 deletions(-) diff --git a/arch/x86/kernel/entry.asm b/arch/x86/kernel/entry.asm index 19df613..f664e55 100644 --- a/arch/x86/kernel/entry.asm +++ b/arch/x86/kernel/entry.asm @@ -32,19 +32,20 @@ %include "config.inc" [BITS 32] + ; We use a special name to map this section at the begin of our kernel -; => Multiboot needs its magic number at the begin of the kernel +; => Multiboot expects its magic number at the beginning of the kernel. SECTION .mboot global start start: jmp stublet -; This part MUST be 4byte aligned, so we solve that issue using 'ALIGN 4' +; This part MUST be 4 byte aligned, so we solve that issue using 'ALIGN 4'. ALIGN 4 mboot: ; Multiboot macros to make a few lines more readable later - MULTIBOOT_PAGE_ALIGN equ 1<<0 - MULTIBOOT_MEMORY_INFO equ 1<<1 + MULTIBOOT_PAGE_ALIGN equ (1 << 0) + MULTIBOOT_MEMORY_INFO equ (1 << 1) MULTIBOOT_HEADER_MAGIC equ 0x1BADB002 MULTIBOOT_HEADER_FLAGS equ MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO MULTIBOOT_CHECKSUM equ -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) @@ -57,37 +58,44 @@ mboot: SECTION .text ALIGN 4 stublet: -; initialize stack pointer +; Initialize stack pointer mov esp, boot_stack add esp, KERNEL_STACK_SIZE-16 -; initialize cpu features +; Initialize CPU features call cpu_init -; interpret multiboot information +; Interpret multiboot information extern multiboot_init push ebx call multiboot_init add esp, 4 -; jump to the boot processors's C code +; Jump to the boot processors's C code extern main call main jmp $ +; This will set up the x86 control registers: +; Caching and the floating point unit are enabled global cpu_init cpu_init: - mov eax, cr0 -; enable caching, disable paging and fpu emulation - and eax, 0x1ffffffb -; ...and turn on FPU exceptions - or eax, 0x22 - mov cr0, eax ; clears the current pgd entry xor eax, eax mov cr3, eax -; at this stage, we disable the SSE support - mov eax, cr4 - and eax, 0xfffbf9ff + +; Set CR4 mov cr4, eax + and eax, ~(1 << 9) ; disable SSE + or eax, (1 << 4) ; enable PSE + mov cr4, eax + +; Set CR0 + mov eax, cr0 + and eax, ~(1 << 2) ; disable FPU emulation + and eax, ~(1 << 30) ; enable caching + or eax, (1 << 31) ; enable paging + or eax, (1 << 5) ; enable FPU exceptions + mov cr0, eax + ret ; This will set up our new segment registers. We need to do @@ -108,12 +116,12 @@ gdt_flush: flush2: ret -; The first 32 interrupt service routines (isr) entries correspond to exceptions. -; Some exceptions will push an error code onto the stack which is specific to +; The first 32 interrupt service routines (ISR) entries correspond to exceptions. +; Some exceptions will push an error code onto the stack which is specific to ; the exception caused. To decrease the complexity, we handle this by pushing a -; dummy error code of 0 onto the stack for any ISR that doesn't push an error -; code already. -; +; Dummy error code of 0 onto the stack for any ISR that doesn't push an error +; code already. +; ; ISRs are registered as "Interrupt Gate". ; Therefore, the interrupt flag (IF) is already cleared. @@ -136,8 +144,8 @@ flush2: jmp common_stub %endmacro -; create isr entries, where the number after the -; pseudo error code represents following interrupts +; Create isr entries, where the number after the +; pseudo error code represents following interrupts: ; 0: Divide By Zero Exception ; 1: Debug Exception ; 2: Non Maskable Interrupt Exception @@ -189,18 +197,16 @@ isrstub_pseudo_error 9 jmp common_stub %endmacro -; create entries for the interrupts 0 to 23 +; Create entries for the interrupts 0 to 23 %assign i 0 %rep 24 irqstub i %assign i i+1 %endrep -extern syscall_handler +; Used to realize system calls. +; By entering the handler, the interrupt flag is not cleared. global isrsyscall - -; used to realize system calls -; by entering the handler, the interrupt flag is not cleared isrsyscall: cli push es @@ -213,13 +219,14 @@ isrsyscall: push ebx push eax - ; set kernel data segmenets +; Set kernel data segmenets mov ax, 0x10 mov ds, ax mov es, ax mov eax, [esp] sti + extern syscall_handler call syscall_handler cli @@ -241,12 +248,12 @@ extern irq_handler extern get_current_stack extern finish_task_switch +; Create a pseudo interrupt on top of the stack. +; Afterwards, we switch to the task with iret. +; We already are in kernel space => no pushing of SS required. global switch_context ALIGN 4 switch_context: - ; create on the stack a pseudo interrupt - ; afterwards, we switch to the task with iret - ; we already in kernel space => no pushing of SS required mov eax, [esp+4] ; on the stack is already the address to store the old esp pushf ; push controll register push DWORD 0x8 ; CS @@ -263,8 +270,6 @@ ALIGN 4 rollback: ret -extern set_kernel_stack - ALIGN 4 common_stub: pusha @@ -274,8 +279,10 @@ common_stub: mov es, ax mov ds, ax - ; use the same handler for interrupts and exceptions +; Use the same handler for interrupts and exceptions push esp + + extern set_kernel_stack call irq_handler add esp, 4 @@ -287,15 +294,15 @@ common_switch: call get_current_stack ; get new esp xchg eax, esp - ; set task switched flag +; Set task switched flag mov eax, cr0 or eax, 8 mov cr0, eax - ; set esp0 in the task state segment +; Set esp0 in the task state segment call set_kernel_stack - ; call cleanup code +; Call cleanup code call finish_task_switch no_context_switch: @@ -305,9 +312,12 @@ no_context_switch: add esp, 8 iret +SECTION .data + global boot_stack ALIGN 4096 boot_stack: -TIMES (KERNEL_STACK_SIZE) DB 0xcd + TIMES (KERNEL_STACK_SIZE) DB 0xcd +; add some hints to the ELF file SECTION .note.GNU-stack noalloc noexec nowrite progbits diff --git a/include/eduos/config.h.example b/include/eduos/config.h.example index 6ea0090..1959693 100644 --- a/include/eduos/config.h.example +++ b/include/eduos/config.h.example @@ -34,15 +34,15 @@ extern "C" { #define EDUOS_VERSION "0.1" #define MAX_TASKS 16 -#define TIMER_FREQ 100 /* in HZ */ -#define CLOCK_TICK_RATE 1193182 /* 8254 chip's internal oscillator frequency */ -#define VIDEO_MEM_ADDR 0xB8000 // the video memora address +#define TIMER_FREQ 100 /* in HZ */ +#define CLOCK_TICK_RATE 1193182 /* 8254 chip's internal oscillator frequency */ +#define VIDEO_MEM_ADDR 0xB8000 /* the video memory address */ #define CACHE_LINE 64 -#define KERNEL_STACK_SIZE (8*1024) +#define KERNEL_STACK_SIZE (8<<10) /* 8 KiB */ #define BITMAP_SIZE (128<<5) /* for 128 MiB of RAM */ #define INT_SYSCALL 0x80 -#define BYTE_ORDER LITTLE_ENDIAN +#define BYTE_ORDER LITTLE_ENDIAN #define CONFIG_VGA diff --git a/mm/memory.c b/mm/memory.c index 072ba63..37489b9 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -179,14 +179,14 @@ int memory_init(void) } else if (mb_info->flags & MULTIBOOT_INFO_MEM) { size_t page; - size_t pages_lower = mb_info->mem_lower >> 2; + size_t pages_lower = mb_info->mem_lower >> 2; /* KiB to page number */ size_t pages_upper = mb_info->mem_upper >> 2; for (page=0; page