add irq save spinlocks and semaphores
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5 changed files with 217 additions and 12 deletions
105
arch/x86/include/asm/irqflags.h
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105
arch/x86/include/asm/irqflags.h
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/*
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* Copyright (c) 2010, Stefan Lankes, RWTH Aachen University
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @author Stefan Lankes
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* @file arch/x86/include/asm/irqflags.h
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* @brief Functions related to IRQ configuration
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*
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* This file contains definitions of inline functions
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* for enabling and disabling IRQ handling.
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*/
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#ifndef __ARCH_IRQFLAGS_H__
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#define __ARCH_IRQFLAGS_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @brief Disable IRQs
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*
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* This inline function just clears out the interrupt bit
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*/
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inline static void irq_disable(void) {
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asm volatile("cli" ::: "memory");
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}
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/** @brief Disable IRQs (nested)
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*
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* Disable IRQs when unsure if IRQs were enabled at all.\n
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* This function together with irq_nested_enable can be used
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* in situations when interrupts shouldn't be activated if they
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* were not activated before calling this function.
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*
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* @return The set of flags which have been set until now
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*/
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inline static uint32_t irq_nested_disable(void) {
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size_t flags;
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asm volatile("pushf; cli; pop %0": "=r"(flags) : : "memory");
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if (flags & (1 << 9))
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return 1;
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return 0;
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}
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/** @brief Enable IRQs */
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inline static void irq_enable(void) {
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asm volatile("sti" ::: "memory");
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}
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/** @brief Enable IRQs (nested)
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*
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* If called after calling irq_nested_disable, this function will
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* not activate IRQs if they were not active before.
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*
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* @param flags Flags to set. Could be the old ones you got from irq_nested_disable.
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*/
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inline static void irq_nested_enable(uint8_t flags) {
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if (flags)
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irq_enable();
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}
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/** @brief Determines, if the interrupt flags (IF) is ser
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*
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* @return
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* - 1 interrupt flag is set
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* - 0 interrupt flag is cleared
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*/
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inline static uint8_t is_irq_enabled(void)
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{
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size_t flags;
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asm volatile("pushf; pop %0": "=r"(flags) : : "memory");
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if (flags & (1 << 9))
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return 1;
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -64,7 +64,7 @@ inline static int sem_init(sem_t* s, unsigned int v) {
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s->pos = 0;
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s->pos = 0;
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for(i=0; i<MAX_TASKS; i++)
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for(i=0; i<MAX_TASKS; i++)
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s->queue[i] = MAX_TASKS;
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s->queue[i] = MAX_TASKS;
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spinlock_init(&s->lock);
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spinlock_irqsave_init(&s->lock);
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return 0;
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return 0;
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}
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}
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@ -78,7 +78,7 @@ inline static int sem_destroy(sem_t* s) {
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if (BUILTIN_EXPECT(!s, 0))
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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return -EINVAL;
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spinlock_destroy(&s->lock);
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spinlock_irqsave_destroy(&s->lock);
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return 0;
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return 0;
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}
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}
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@ -98,12 +98,12 @@ inline static int sem_trywait(sem_t* s) {
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if (BUILTIN_EXPECT(!s, 0))
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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return -EINVAL;
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spinlock_lock(&s->lock);
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spinlock_irqsave_lock(&s->lock);
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if (s->value > 0) {
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if (s->value > 0) {
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s->value--;
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s->value--;
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ret = 0;
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ret = 0;
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}
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}
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spinlock_unlock(&s->lock);
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spinlock_irqsave_unlock(&s->lock);
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return ret;
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return ret;
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}
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}
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@ -121,15 +121,15 @@ inline static int sem_wait(sem_t* s) {
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return -EINVAL;
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return -EINVAL;
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next_try1:
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next_try1:
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spinlock_lock(&s->lock);
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spinlock_irqsave_lock(&s->lock);
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if (s->value > 0) {
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if (s->value > 0) {
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s->value--;
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s->value--;
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spinlock_unlock(&s->lock);
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spinlock_irqsave_unlock(&s->lock);
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} else {
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} else {
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s->queue[s->pos] = current_task->id;
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s->queue[s->pos] = current_task->id;
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s->pos = (s->pos + 1) % MAX_TASKS;
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s->pos = (s->pos + 1) % MAX_TASKS;
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block_current_task();
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block_current_task();
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spinlock_unlock(&s->lock);
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spinlock_irqsave_unlock(&s->lock);
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reschedule();
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reschedule();
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goto next_try1;
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goto next_try1;
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}
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}
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@ -146,10 +146,10 @@ inline static int sem_post(sem_t* s) {
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if (BUILTIN_EXPECT(!s, 0))
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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return -EINVAL;
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spinlock_lock(&s->lock);
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spinlock_irqsave_lock(&s->lock);
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if (s->value > 0) {
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if (s->value > 0) {
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s->value++;
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s->value++;
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spinlock_unlock(&s->lock);
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spinlock_irqsave_unlock(&s->lock);
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} else {
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} else {
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unsigned int k, i;
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unsigned int k, i;
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@ -163,7 +163,7 @@ inline static int sem_post(sem_t* s) {
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}
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}
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i = (i + 1) % MAX_TASKS;
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i = (i + 1) % MAX_TASKS;
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}
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}
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spinlock_unlock(&s->lock);
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spinlock_irqsave_unlock(&s->lock);
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}
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}
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return 0;
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return 0;
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@ -49,11 +49,11 @@ typedef struct {
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/// Position in queue
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/// Position in queue
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unsigned int pos;
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unsigned int pos;
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/// Access lock
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/// Access lock
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spinlock_t lock;
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spinlock_irqsave_t lock;
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} sem_t;
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} sem_t;
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/// Macro for initialization of semaphore
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/// Macro for initialization of semaphore
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#define SEM_INIT(v) {v, {[0 ... MAX_TASKS-1] = MAX_TASKS}, 0, SPINLOCK_INIT}
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#define SEM_INIT(v) {v, {[0 ... MAX_TASKS-1] = MAX_TASKS}, 0, SPINLOCK_IRQSAVE_INIT}
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@ -40,6 +40,7 @@
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#include <eduos/errno.h>
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#include <eduos/errno.h>
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#include <asm/atomic.h>
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#include <asm/atomic.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/irqflags.h>
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -125,6 +126,92 @@ inline static int spinlock_unlock(spinlock_t* s) {
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return 0;
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return 0;
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}
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}
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/** @brief Initialization of a irqsave spinlock
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*
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* Initialize each irqsave spinlock before use!
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*
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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inline static int spinlock_irqsave_init(spinlock_irqsave_t* s) {
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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atomic_int32_set(&s->queue, 0);
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atomic_int32_set(&s->dequeue, 1);
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s->flags = 0;
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s->counter = 0;
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return 0;
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}
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/** @brief Destroy irqsave spinlock after use
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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inline static int spinlock_irqsave_destroy(spinlock_irqsave_t* s) {
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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s->flags = 0;
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s->counter = 0;
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return 0;
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}
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/** @brief Unlock an irqsave spinlock on exit of critical section
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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inline static int spinlock_irqsave_lock(spinlock_irqsave_t* s) {
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int32_t ticket;
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uint8_t flags;
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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flags = irq_nested_disable();
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if (s->counter == 1) {
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s->counter++;
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return 0;
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}
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ticket = atomic_int32_add(&s->queue, 1);
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while (atomic_int32_read(&s->dequeue) != ticket) {
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PAUSE;
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}
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s->flags = flags;
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s->counter = 1;
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return 0;
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}
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/** @brief Unlock irqsave spinlock on exit of critical section and re-enable interrupts
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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inline static int spinlock_irqsave_unlock(spinlock_irqsave_t* s) {
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uint8_t flags;
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if (BUILTIN_EXPECT(!s, 0))
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return -EINVAL;
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s->counter--;
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if (!s->counter) {
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flags = s->flags;
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s->flags = 0;
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atomic_int32_inc(&s->dequeue);
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irq_nested_enable(flags);
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}
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return 0;
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -54,8 +54,21 @@ typedef struct spinlock {
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uint32_t counter;
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uint32_t counter;
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} spinlock_t;
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} spinlock_t;
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typedef struct spinlock_irqsave {
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/// Internal queue
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atomic_int32_t queue;
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/// Internal dequeue
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atomic_int32_t dequeue;
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/// Internal counter var
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uint32_t counter;
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/// Interrupt flag
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uint8_t flags;
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} spinlock_irqsave_t;
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/// Macro for spinlock initialization
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/// Macro for spinlock initialization
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#define SPINLOCK_INIT { ATOMIC_INIT(0), ATOMIC_INIT(1), MAX_TASKS, 0}
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#define SPINLOCK_INIT { ATOMIC_INIT(0), ATOMIC_INIT(1), MAX_TASKS, 0}
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/// Macro for irqsave spinlock initialization
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#define SPINLOCK_IRQSAVE_INIT { ATOMIC_INIT(0), ATOMIC_INIT(1), 0, 0}
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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