255 lines
8.9 KiB
C
255 lines
8.9 KiB
C
/*
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* Copyright (c) 2010, Stefan Lankes, RWTH Aachen University
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @author Stefan Lankes
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* @file arch/x86/kernel/irq.c
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* @brief Function definitions for irq.h and a standard IRQ-handler
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*
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*
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*/
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#include <eduos/stdio.h>
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#include <eduos/string.h>
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#include <eduos/tasks.h>
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#include <eduos/errno.h>
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#include <asm/irq.h>
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#include <asm/idt.h>
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#include <asm/isrs.h>
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#include <asm/io.h>
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/*
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* These are our own ISRs that point to our special IRQ handler
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* instead of the regular 'fault_handler' function
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*/
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extern void irq0(void);
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extern void irq1(void);
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extern void irq2(void);
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extern void irq3(void);
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extern void irq4(void);
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extern void irq5(void);
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extern void irq6(void);
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extern void irq7(void);
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extern void irq8(void);
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extern void irq9(void);
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extern void irq10(void);
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extern void irq11(void);
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extern void irq12(void);
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extern void irq13(void);
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extern void irq14(void);
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extern void irq15(void);
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extern void irq16(void);
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extern void irq17(void);
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extern void irq18(void);
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extern void irq19(void);
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extern void irq20(void);
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extern void irq21(void);
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extern void irq22(void);
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extern void irq23(void);
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#define MAX_HANDLERS 256
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/** @brief IRQ handle pointers
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*
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* This array is actually an array of function pointers. We use
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* this to handle custom IRQ handlers for a given IRQ
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*/
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static void* irq_routines[MAX_HANDLERS] = {[0 ... MAX_HANDLERS-1] = NULL };
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/* This installs a custom IRQ handler for the given IRQ */
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int irq_install_handler(unsigned int irq, irq_handler_t handler)
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{
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if (irq >= MAX_HANDLERS)
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return -EINVAL;
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irq_routines[irq] = handler;
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return 0;
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}
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/* This clears the handler for a given IRQ */
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int irq_uninstall_handler(unsigned int irq)
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{
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if (irq >= MAX_HANDLERS)
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return -EINVAL;
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irq_routines[irq] = NULL;
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return 0;
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}
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/** @brief Remapping IRQs with a couple of IO output operations
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*
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* Normally, IRQs 0 to 7 are mapped to entries 8 to 15. This
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* is a problem in protected mode, because IDT entry 8 is a
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* Double Fault! Without remapping, every time IRQ0 fires,
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* you get a Double Fault Exception, which is NOT what's
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* actually happening. We send commands to the Programmable
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* Interrupt Controller (PICs - also called the 8259's) in
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* order to make IRQ0 to 15 be remapped to IDT entries 32 to
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* 47
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*/
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static int irq_remap(void)
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{
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outportb(0x20, 0x11);
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outportb(0xA0, 0x11);
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outportb(0x21, 0x20);
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outportb(0xA1, 0x28);
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outportb(0x21, 0x04);
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outportb(0xA1, 0x02);
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outportb(0x21, 0x01);
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outportb(0xA1, 0x01);
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outportb(0x21, 0x0);
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outportb(0xA1, 0x0);
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return 0;
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}
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/** @brief Remap IRQs and install ISRs in IDT
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*
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* We first remap the interrupt controllers, and then we install
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* the appropriate ISRs to the correct entries in the IDT.\n
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* This is just like installing the exception handlers
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*/
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static int irq_install(void)
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{
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irq_remap();
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idt_set_gate(32, (size_t)irq0, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(33, (size_t)irq1, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(34, (size_t)irq2, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(35, (size_t)irq3, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(36, (size_t)irq4, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(37, (size_t)irq5, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(38, (size_t)irq6, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(39, (size_t)irq7, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(40, (size_t)irq8, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(41, (size_t)irq9, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(42, (size_t)irq10, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(43, (size_t)irq11, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(44, (size_t)irq12, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(45, (size_t)irq13, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(46, (size_t)irq14, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(47, (size_t)irq15, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(48, (size_t)irq16, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(49, (size_t)irq17, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(50, (size_t)irq18, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(51, (size_t)irq19, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(52, (size_t)irq20, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(53, (size_t)irq21, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(54, (size_t)irq22, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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idt_set_gate(55, (size_t)irq23, KERNEL_CODE_SELECTOR,
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IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
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return 0;
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}
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int irq_init(void)
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{
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idt_install();
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isrs_install();
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irq_install();
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return 0;
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}
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/** @brief Default IRQ handler
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*
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* Each of the IRQ ISRs point to this function, rather than
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* the 'fault_handler' in 'isrs.c'. The IRQ Controllers need
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* to be told when you are done servicing them, so you need
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* to send them an "End of Interrupt" command. If we use the PIC
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* instead of the APIC, we have two 8259 chips: The first one
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* exists at 0x20, the second one exists at 0xA0. If the second
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* controller (an IRQ from 8 to 15) gets an interrupt, you need to
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* acknowledge the interrupt at BOTH controllers, otherwise, you
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* only send an EOI command to the first controller. If you don't send
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* an EOI, it won't raise any more IRQs.
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*
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* Note: If we enabled the APIC, we also disabled the PIC. Afterwards,
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* we get no interrupts between 0 and 15.
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*/
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size_t** irq_handler(struct state *s)
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{
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/* This is a blank function pointer */
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void (*handler) (struct state * s);
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/*
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* Find out if we have a custom handler to run for this
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* IRQ and then finally, run it
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*/
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if (BUILTIN_EXPECT(s->int_no < MAX_HANDLERS, 1)) {
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handler = irq_routines[s->int_no];
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if (handler)
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handler(s);
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} else kprintf("Invalid interrupt number %d\n", s->int_no);
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/*
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* If the IDT entry that was invoked was greater-than-or-equal to 40
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* and lower than 48 (meaning IRQ8 - 15), then we need to
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* send an EOI to the slave controller of the PIC
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*/
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if (s->int_no >= 40)
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outportb(0xA0, 0x20);
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/*
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* In either case, we need to send an EOI to the master
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* interrupt controller of the PIC, too
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*/
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outportb(0x20, 0x20);
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// timer interrupt?
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if (s->int_no == 32)
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return scheduler(); // switch to a new task
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else if ((s->int_no >= 32) && (get_highest_priority() > current_task->prio))
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return scheduler();
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return NULL;
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}
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