227 lines
6.3 KiB
C
227 lines
6.3 KiB
C
/*
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* Copyright (c) 2014, Stefan Lankes, Daniel Krebs, RWTH Aachen University
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <eduos/stdio.h>
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#include <eduos/string.h>
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#include <eduos/mailbox.h>
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#include <asm/io.h>
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#include <asm/uart.h>
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#include <asm/irq.h>
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#include <asm/irqflags.h>
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#ifdef CONFIG_PCI
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#include <asm/pci.h>
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#endif
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#ifdef CONFIG_UART
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/*
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* This implementation based on following tutorial:
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* http://en.wikibooks.org/wiki/Serial_Programming/8250_UART_Programming
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*/
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#define UART_RX 0 /* In: Receive buffer */
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#define UART_TX 0 /* Out: Transmit buffer */
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#define UART_IER 1 /* Out: Interrupt Enable Register */
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#define UART_FCR 2 /* Out: FIFO Control Register */
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#define UART_IIR 2 /* In: Interrupt ID Register */
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#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
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#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
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#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
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#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
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#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
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#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
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#define UART_IIR_MSI 0x00 /* Modem status interrupt */
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#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
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#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
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#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
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#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
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#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
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#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
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#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */
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#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */
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#define UART_DLL 0 /* Out: Divisor Latch Low */
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#define UART_DLM 1 /* Out: Divisor Latch High */
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#define UART_LCR 3 /* Out: Line Control Register */
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#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
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#define UART_LCR_SBC 0x40 /* Set break control */
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#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
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#define UART_LCR_EPAR 0x10 /* Even parity select */
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#define UART_LCR_PARITY 0x08 /* Parity Enable */
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#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 bit, 1=2 bits */
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#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
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static uint32_t iobase = 0;
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static tid_t id;
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static mailbox_uint8_t input_queue;
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#define MEMMAPIO
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#if 1
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#define READ_FROM_UART(x) inportb(iobase + x)
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#define WRITE_TO_UART(x, y) outportb(iobase + x, y)
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#else
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#define READ_FROM_UART(x) inportb(iobase + x)
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#define WRITE_TO_UART(x, y) outportb(iobase + x, y)
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#endif
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/* Get a single character on a serial device */
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static unsigned char uart_getchar(void)
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{
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return READ_FROM_UART(UART_RX);
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}
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/* Puts a single character on a serial device */
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int uart_putchar(unsigned char c)
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{
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if (!iobase)
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return 0;
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WRITE_TO_UART(UART_TX, c);
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return (int) c;
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}
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/* Uses the routine above to output a string... */
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int uart_puts(const char *text)
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{
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size_t i, len = strlen(text);
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if (!iobase)
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return 0;
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for (i = 0; i < len; i++)
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uart_putchar(text[i]);
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return len;
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}
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/* Handles all UART's interrupt */
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static void uart_handler(struct state *s)
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{
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unsigned char c = READ_FROM_UART(UART_IIR);
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while (!(c & UART_IIR_NO_INT)) {
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if (c & UART_IIR_RDI) {
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c = uart_getchar();
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mailbox_uint8_post(&input_queue, c);
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}
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c = READ_FROM_UART(UART_IIR);
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}
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}
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/* thread entry point => enable all incoming messages */
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static int uart_thread(void* arg)
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{
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unsigned char c = 0;
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while(1) {
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mailbox_uint8_fetch(&input_queue, &c);
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kputchar(c);
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}
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return 0;
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}
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int uart_enable_input(void)
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{
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int err = create_kernel_task(&id, uart_thread, NULL, HIGH_PRIO);
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if (BUILTIN_EXPECT(err, 0))
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kprintf("Failed to create task (uart): %d\n", err);
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else
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kputs("Create task to handle incoming messages (uart)\n");
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return err;
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}
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static void uart_config(void)
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{
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mailbox_uint8_init(&input_queue);
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/*
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* enable FIFOs
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* clear RX and TX FIFO
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* set irq trigger to 8 bytes
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*/
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WRITE_TO_UART(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1);
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/*
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* 8bit word length
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* 1 stop bit
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* no partity
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* set DLAB=1
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*/
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char lcr = UART_LCR_WLEN8 | UART_LCR_DLAB;
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WRITE_TO_UART(UART_LCR, lcr);
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/*
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* set baudrate to 115200 (on qemu)
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*/
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WRITE_TO_UART(UART_DLL, 0x01);
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WRITE_TO_UART(UART_DLM, 0x00);
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/* set DLAB=0 */
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WRITE_TO_UART(UART_LCR, lcr & (~UART_LCR_DLAB));
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/* enable interrupt */
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WRITE_TO_UART(UART_IER, UART_IER_RDI | UART_IER_RLSI | UART_IER_THRI);
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}
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int uart_init(void)
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{
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#ifdef CONFIG_PCI
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pci_info_t pci_info;
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// Searching for Intel's UART device
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if (pci_get_device_info(0x8086, 0x0936, &pci_info) == 0)
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goto Lsuccess;
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// Searching for Qemu's UART device
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if (pci_get_device_info(0x1b36, 0x0002, &pci_info) == 0)
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goto Lsuccess;
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return -1;
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Lsuccess:
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// we use COM1
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iobase = 0x03f8;
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irq_install_handler(32+4, uart_handler);
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// configure uart
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uart_config();
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#endif
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return 0;
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}
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#endif
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