299 lines
9.1 KiB
C
299 lines
9.1 KiB
C
/*
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* Copyright (c) 2010, Stefan Lankes, RWTH Aachen University
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* 2014, Steffen Vogel, RWTH Aachen University
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* This is a 32/64 bit portable paging implementation for the x86 architecture
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* using self-referenced page tablesi.
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* See http://www.noteblok.net/2014/06/14/bachelor/ for a detailed description.
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*
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* @author Steffen Vogel <steffen.vogel@rwth-aachen.de>
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*/
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#include <eduos/stdio.h>
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#include <eduos/memory.h>
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#include <eduos/errno.h>
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#include <eduos/string.h>
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#include <eduos/spinlock.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/multiboot.h>
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/* Note that linker symbols are not variables, they have no memory
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* allocated for maintaining a value, rather their address is their value. */
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extern const void kernel_start;
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extern const void kernel_end;
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/** Lock for kernel space page tables */
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static spinlock_t kslock = SPINLOCK_INIT;
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/** This PGD table is initialized in entry.asm */
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extern size_t boot_map[PAGE_MAP_ENTRIES];
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/** A self-reference enables direct access to all page tables */
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static size_t* self[PAGE_LEVELS] = {
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(size_t *) 0xFFC00000,
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(size_t *) 0xFFFFF000
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};
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/** An other self-reference for page_map_copy() */
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static size_t * other[PAGE_LEVELS] = {
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(size_t *) 0xFF800000,
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(size_t *) 0xFFFFE000
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};
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size_t page_virt_to_phys(size_t addr)
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{
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size_t vpn = addr >> PAGE_BITS; // virtual page number
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size_t entry = self[0][vpn]; // page table entry
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size_t off = addr & ~PAGE_MASK; // offset within page
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size_t phy = entry & PAGE_MASK; // physical page frame number
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return phy | off;
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}
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int page_map(size_t viraddr, size_t phyaddr, size_t npages, size_t bits)
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{
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int lvl, ret = -ENOMEM;
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long vpn = viraddr >> PAGE_BITS;
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long first[PAGE_LEVELS], last[PAGE_LEVELS];
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/* Calculate index boundaries for page map traversal */
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for (lvl=0; lvl<PAGE_LEVELS; lvl++) {
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first[lvl] = (vpn ) >> (lvl * PAGE_MAP_BITS);
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last[lvl] = (vpn+npages-1) >> (lvl * PAGE_MAP_BITS);
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}
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/** @todo: might not be sufficient! */
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if (bits & PG_USER)
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spinlock_irqsave_lock(¤t_task->page_lock);
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else
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spinlock_lock(&kslock);
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/* Start iterating through the entries
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* beginning at the root table (PGD or PML4) */
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for (lvl=PAGE_LEVELS-1; lvl>=0; lvl--) {
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for (vpn=first[lvl]; vpn<=last[lvl]; vpn++) {
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if (lvl) { /* PML4, PDPT, PGD */
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if (!(self[lvl][vpn] & PG_PRESENT)) {
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/* There's no table available which covers the region.
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* Therefore we need to create a new empty table. */
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size_t phyaddr = get_pages(1);
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if (BUILTIN_EXPECT(!phyaddr, 0))
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goto out;
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if (bits & PG_USER)
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atomic_int32_inc(¤t_task->user_usage);
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/* Reference the new table within its parent */
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self[lvl][vpn] = phyaddr | bits | PG_PRESENT;
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/* Fill new table with zeros */
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memset(&self[lvl-1][vpn<<PAGE_MAP_BITS], 0, PAGE_SIZE);
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}
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}
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else { /* PGT */
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if (self[lvl][vpn] & PG_PRESENT)
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/* There's already a page mapped at this address.
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* We have to flush a single TLB entry. */
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tlb_flush_one_page(vpn << PAGE_BITS);
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self[lvl][vpn] = phyaddr | bits | PG_PRESENT;
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phyaddr += PAGE_SIZE;
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}
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}
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}
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ret = 0;
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out:
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if (bits & PG_USER)
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spinlock_irqsave_unlock(¤t_task->page_lock);
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else
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spinlock_unlock(&kslock);
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return ret;
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}
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/** Tables are freed by page_map_drop() */
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int page_unmap(size_t viraddr, size_t npages)
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{
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/* We aquire both locks for kernel and task tables
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* as we dont know to which the region belongs. */
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spinlock_irqsave_lock(¤t_task->page_lock);
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spinlock_lock(&kslock);
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/* Start iterating through the entries.
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* Only the PGT entries are removed. Tables remain allocated. */
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size_t vpn, start = viraddr>>PAGE_BITS;
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for (vpn=start; vpn<start+npages; vpn++)
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self[0][vpn] = 0;
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spinlock_irqsave_unlock(¤t_task->page_lock);
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spinlock_unlock(&kslock);
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/* This can't fail because we don't make checks here */
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return 0;
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}
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int page_map_drop()
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{
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void traverse(int lvl, long vpn) {
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long stop;
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for (stop=vpn+PAGE_MAP_ENTRIES; vpn<stop; vpn++) {
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if ((self[lvl][vpn] & PG_PRESENT) && (self[lvl][vpn] & PG_USER)) {
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/* Post-order traversal */
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if (lvl)
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traverse(lvl-1, vpn<<PAGE_MAP_BITS);
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put_pages(self[lvl][vpn] & PAGE_MASK, 1);
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atomic_int32_dec(¤t_task->user_usage);
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}
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}
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}
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spinlock_irqsave_lock(¤t_task->page_lock);
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traverse(PAGE_LEVELS-1, 0);
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spinlock_irqsave_unlock(¤t_task->page_lock);
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/* This can't fail because we don't make checks here */
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return 0;
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}
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int page_map_copy(task_t *dest)
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{
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int traverse(int lvl, long vpn) {
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long stop;
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for (stop=vpn+PAGE_MAP_ENTRIES; vpn<stop; vpn++) {
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if (self[lvl][vpn] & PG_PRESENT) {
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if (self[lvl][vpn] & PG_USER) {
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size_t phyaddr = get_pages(1);
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if (BUILTIN_EXPECT(!phyaddr, 0))
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return -ENOMEM;
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atomic_int32_inc(&dest->user_usage);
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other[lvl][vpn] = phyaddr | (self[lvl][vpn] & ~PAGE_MASK);
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if (lvl) /* PML4, PDPT, PGD */
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traverse(lvl-1, vpn<<PAGE_MAP_BITS); /* Pre-order traversal */
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else { /* PGT */
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page_map(PAGE_TMP, phyaddr, 1, PG_RW);
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memcpy((void*) PAGE_TMP, (void*) (vpn<<PAGE_BITS), PAGE_SIZE);
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}
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}
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else if (self[lvl][vpn] & PG_SELF)
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other[lvl][vpn] = 0;
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else
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other[lvl][vpn] = self[lvl][vpn];
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}
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else
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other[lvl][vpn] = 0;
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}
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return 0;
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}
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spinlock_irqsave_lock(¤t_task->page_lock);
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self[PAGE_LEVELS-1][PAGE_MAP_ENTRIES-2] = dest->page_map | PG_PRESENT | PG_SELF | PG_RW;
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int ret = traverse(PAGE_LEVELS-1, 0);
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other[PAGE_LEVELS-1][PAGE_MAP_ENTRIES-1] = dest->page_map | PG_PRESENT | PG_SELF | PG_RW;
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self [PAGE_LEVELS-1][PAGE_MAP_ENTRIES-2] = 0;
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spinlock_irqsave_unlock(¤t_task->page_lock);
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/* Flush TLB entries of 'other' self-reference */
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flush_tlb();
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return ret;
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}
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void page_fault_handler(struct state *s)
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{
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size_t viraddr = read_cr2();
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kprintf("Page Fault Exception (%d) at cs:ip = %#x:%#lx, task = %u, addr = %#lx, error = %#x [ %s %s %s %s %s ]\n",
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s->int_no, s->cs, s->eip, current_task->id, viraddr, s->error,
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(s->error & 0x4) ? "user" : "supervisor",
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(s->error & 0x10) ? "instruction" : "data",
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(s->error & 0x2) ? "write" : ((s->error & 0x10) ? "fetch" : "read"),
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(s->error & 0x1) ? "protection" : "not present",
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(s->error & 0x8) ? "reserved bit" : "\b");
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while(1) HALT;
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}
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int page_init()
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{
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size_t addr, npages;
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int i;
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/* Replace default pagefault handler */
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irq_uninstall_handler(14);
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irq_install_handler(14, page_fault_handler);
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/* Map kernel */
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addr = (size_t) &kernel_start;
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npages = PAGE_FLOOR((size_t) &kernel_end - (size_t) &kernel_start) >> PAGE_BITS;
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page_map(addr, addr, npages, PG_RW | PG_GLOBAL);
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#ifdef CONFIG_VGA
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/* Map video memory */
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page_map(VIDEO_MEM_ADDR, VIDEO_MEM_ADDR, 1, PG_RW | PG_PCD | PG_GLOBAL);
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#endif
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/* Map multiboot information and modules */
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if (mb_info) {
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addr = (size_t) mb_info & PAGE_MASK;
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npages = PAGE_FLOOR(sizeof(*mb_info)) >> PAGE_BITS;
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page_map(addr, addr, npages, PG_GLOBAL);
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if (mb_info->flags & MULTIBOOT_INFO_MODS) {
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addr = mb_info->mods_addr;
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npages = PAGE_FLOOR(mb_info->mods_count*sizeof(multiboot_module_t)) >> PAGE_BITS;
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page_map(addr, addr, npages, PG_GLOBAL);
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multiboot_module_t* mmodule = (multiboot_module_t*) ((size_t) mb_info->mods_addr);
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for(i=0; i<mb_info->mods_count; i++) {
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addr = mmodule[i].mod_start;
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npages = PAGE_FLOOR(mmodule[i].mod_end - mmodule[i].mod_start) >> PAGE_BITS;
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page_map(addr, addr, npages, PG_USER | PG_GLOBAL);
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}
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}
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}
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/* Unmap bootstrap identity paging (see entry.asm, PG_BOOT) */
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for (i=0; i<PAGE_MAP_ENTRIES; i++)
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if (self[0][i] & PG_BOOT)
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self[0][i] = 0;
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/* Flush TLB to adopt changes above */
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flush_tlb();
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return 0;
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}
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