diff --git a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c index 322d6116..6c15ad83 100644 --- a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c +++ b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c @@ -49,6 +49,11 @@ * 1.0 nsk 15/05/15 Updated Correct AFRID and AFRMSK Registers. * Modified DataSwaping when EDL is Zero. * (CR 861772) +* 1.0 nsk 16/06/15 Updated XCanFd_Recv_Mailbox(), XCanFd_EnterMode(), +* XCanFd_GetMode() since RTL has changed.RTL Changes,Added +* new bits to MSR,SR,ISR,IER,ICR Registers and modified +* TS2 bits in BTR and F_SJW bits in F_BTR Registers. +* . * * ******************************************************************************/ @@ -179,7 +184,9 @@ u32 XCanFd_AcceptFilterGetEnabled(XCanFd *InstancePtr) * - XCANFD_MODE_NORMAL if the device is in Normal Mode. * - XCANFD_MODE_LOOPBACK if the device is in Loop Back Mode. * - XCANFD_MODE_SNOOP if the device is in Snoop Mode. -* +* - XCANFD_MODE_BR if the device is in Bus-Off recovery Mode. +* - XCANFD_MODE_PEE if the device is in Protocol Exception +* Event mode. * @note None. * *****************************************************************************/ @@ -199,7 +206,6 @@ u8 XCanFd_GetMode(XCanFd *InstancePtr) else if ((Value & XCANFD_SR_SLEEP_MASK) != (u32)0) { Mode = XCANFD_MODE_SLEEP; } - else if ((Value & XCANFD_SR_NORMAL_MASK) != (u32)0) { if ((Value & XCANFD_SR_SNOOP_MASK) != (u32)0) { Mode = XCANFD_MODE_SNOOP; @@ -213,6 +219,10 @@ u8 XCanFd_GetMode(XCanFd *InstancePtr) /* If this line is reached, the device is in Loop Back Mode. */ Mode = XCANFD_MODE_LOOPBACK; } + if ((Value & XCANFD_SR_PEE_CONFIG_MASK) != (u32)0){ + Mode = Mode | XCANFD_MODE_PEE; + } + return (u8)Mode; } @@ -225,8 +235,12 @@ u8 XCanFd_GetMode(XCanFd *InstancePtr) * - Configuration Mode: Pass in parameter XCANFD_MODE_CONFIG * - Sleep Mode: Pass in parameter XCANFD_MODE_SLEEP * - Normal Mode: Pass in parameter XCANFD_MODE_NORMAL -* - Loop Back Mode: Pass in parameter XCANFD_MODE_LOOPBACK. +* - Loop Back Mode: Pass in parameter XCANFD_MODE_LOOPBACK * - Snoop Mode: Pass in Parameter XCANFD_MODE_SNOOP +* - Auto Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_ABR +* - Start Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_SBR +* - Protocol Exception Event Mode: Pass in Parameter XCANFD_MODE_PEE +* - Disable AutoRetransmission Mode: Pass in Paramter XCANFD_MODE_DAR * * Read xcanfd.h and device specification for detailed description of each * operation mode. @@ -255,11 +269,15 @@ void XCanFd_EnterMode(XCanFd *InstancePtr, u8 OperationMode) (OperationMode == XCANFD_MODE_SLEEP) || (OperationMode == XCANFD_MODE_NORMAL) || (OperationMode == XCANFD_MODE_LOOPBACK) || - (OperationMode == XCANFD_MODE_SNOOP)); + (OperationMode == XCANFD_MODE_SNOOP) || + (OperationMode == XCANFD_MODE_PEE) || + (OperationMode == XCANFD_MODE_ABR) || + (OperationMode == XCANFD_MODE_DAR) || + (OperationMode == XCANFD_MODE_SBR)); CurrentMode = XCanFd_GetMode(InstancePtr); MsrReg = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_MSR_OFFSET) & XCANFD_DAR_MASK; + XCANFD_MSR_OFFSET) & XCANFD_MSR_CONFIG_MASK; if ((CurrentMode == XCANFD_MODE_NORMAL) && (OperationMode == XCANFD_MODE_SLEEP)) { @@ -282,7 +300,7 @@ void XCanFd_EnterMode(XCanFd *InstancePtr, u8 OperationMode) * mode. */ XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_SRR_OFFSET,MsrReg); + XCANFD_SRR_OFFSET, 0); /* * Check if the device has entered Configuration Mode, if not, return @@ -293,47 +311,81 @@ void XCanFd_EnterMode(XCanFd *InstancePtr, u8 OperationMode) } switch (OperationMode) { - case XCANFD_MODE_CONFIG: + case XCANFD_MODE_CONFIG: break; - case XCANFD_MODE_SLEEP: + case XCANFD_MODE_SLEEP: - /* Switch the device into Sleep Mode */ - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_MSR_OFFSET, - (XCANFD_MSR_SLEEP_MASK | MsrReg)); - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_SRR_OFFSET, - XCANFD_SRR_CEN_MASK); + /* Switch the device into Sleep Mode */ + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, + (XCANFD_MSR_SLEEP_MASK | MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); + break; + + case XCANFD_MODE_NORMAL: + + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, MsrReg); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); + break; + + case XCANFD_MODE_LOOPBACK: + + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, + (XCANFD_MSR_LBACK_MASK | MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); + break; + + case XCANFD_MODE_SNOOP: + + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, (XCANFD_MSR_SNOOP_MASK | + MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); + break; + + case XCANFD_MODE_ABR: + + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, (XCANFD_MSR_ABR_MASK | + MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); break; - case XCANFD_MODE_NORMAL: + case XCANFD_MODE_SBR: - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_MSR_OFFSET,MsrReg); - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_SRR_OFFSET,XCANFD_SRR_CEN_MASK); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, (XCANFD_MSR_SBR_MASK | + MsrReg)); + break; + + case XCANFD_MODE_PEE: + + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, (XCANFD_MSR_DPEE_MASK | + MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); break; - case XCANFD_MODE_LOOPBACK: - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_MSR_OFFSET, - (XCANFD_MSR_LBACK_MASK | MsrReg)); - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_SRR_OFFSET, - XCANFD_SRR_CEN_MASK); + case XCANFD_MODE_DAR: - break; + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_MSR_OFFSET, (XCANFD_MSR_DAR_MASK | + MsrReg)); + XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); - case XCANFD_MODE_SNOOP: - - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_MSR_OFFSET, (XCANFD_MSR_SNOOP_MASK | MsrReg)); - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_SRR_OFFSET, XCANFD_SRR_CEN_MASK); break; } } @@ -419,11 +471,11 @@ int XCanFd_Send(XCanFd *InstancePtr, u32 *FramePtr,u32 *TxBufferNumber) /* Write ID to ID Register */ XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_TXID_OFFSET(FreeTxBuffer),FramePtr[0]); + XCANFD_TXID_OFFSET(FreeTxBuffer), FramePtr[0]); /* Write DLC to DLC Register */ XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_TXDLC_OFFSET(FreeTxBuffer),FramePtr[1]); + XCANFD_TXDLC_OFFSET(FreeTxBuffer), FramePtr[1]); CanEDL = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_TXDLC_OFFSET(FreeTxBuffer)); @@ -440,7 +492,7 @@ int XCanFd_Send(XCanFd *InstancePtr, u32 *FramePtr,u32 *TxBufferNumber) XCanFd_WriteReg( InstancePtr->CanFdConfig.BaseAddress, (XCANFD_TXDW_OFFSET(FreeTxBuffer)+ - (DwIndex*XCANFD_DW_BYTES)),OutValue); + (DwIndex*XCANFD_DW_BYTES)), OutValue); DwIndex++; } } @@ -455,7 +507,7 @@ int XCanFd_Send(XCanFd *InstancePtr, u32 *FramePtr,u32 *TxBufferNumber) XCanFd_WriteReg( InstancePtr->CanFdConfig.BaseAddress, (XCANFD_TXDW_OFFSET(FreeTxBuffer)+ - (Len)),OutValue); + (Len)), OutValue); DwIndex++; } } @@ -465,7 +517,7 @@ int XCanFd_Send(XCanFd *InstancePtr, u32 *FramePtr,u32 *TxBufferNumber) XCANFD_TRR_OFFSET); Value |= (1 << FreeTxBuffer); XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_TRR_OFFSET,Value); + XCANFD_TRR_OFFSET, Value); /* Assign buffer number to user */ *TxBufferNumber = FreeTxBuffer; @@ -672,9 +724,9 @@ u32 XCanFd_Recv_Sequential(XCanFd *InstancePtr, u32 *FramePtr) /*****************************************************************************/ /** * -* This function receives a CAN Frame in MAIL BOX Mode. Read Receive -* Control Status Registers.if CoreStatus bit is set then read that -* corresponding buffer and update the data to user buffer. +* This function receives a CAN Frame in MAIL BOX Mode. Read Rx Last Buffer +* Index from ISR Register. This tells which buffer is having data.then read +* and update the data to user buffer. * * @param InstancePtr is a pointer to the XCanFd instance to be worked on. * @param FramePtr is a pointer to a 32-bit aligned buffer where the CAN @@ -696,91 +748,77 @@ u32 XCanFd_Recv_Mailbox(XCanFd *InstancePtr, u32 *FramePtr) u32 DwIndex=0; u32 Result; u32 CanEDL; - u32 ReadIndex=0; - u32 NoCtrlStatus; u32 Dlc; u32 Len; - u32 NofRcsReg=0; + u32 RcsRegNr=0; + u32 RxBufferIndex; + u32 CoreStatusBit; u32 Mask; - /* - * Core status bit in Receive Control Status Register starts from 16 - * th bit Location. - */ - u32 CoreStatusBit=16; Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - NofRcsReg = XCanFd_Get_NofRxBuffers(InstancePtr); + RxBufferIndex = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_ISR_OFFSET) & + XCANFD_IXR_RXLRM_BI_MASK; + RxBufferIndex >>= XCANFD_RXLRM_BI_SHIFT; + CoreStatusBit = (RxBufferIndex%XCANFD_CSB_SHIFT) + XCANFD_CSB_SHIFT; + RcsRegNr = RxBufferIndex/XCANFD_CSB_SHIFT; - for (NoCtrlStatus = 0;NoCtrlStatus < NofRcsReg;NoCtrlStatus++) { - Result = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, - XCANFD_RCS_OFFSET(NoCtrlStatus)); + Result = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, + XCANFD_RCS_OFFSET(RcsRegNr)); + Mask = Result & XCANFD_RCS_HCB_MASK; + if (Result & 1<CanFdConfig. + BaseAddress,XCANFD_RXID_OFFSET(RxBufferIndex)); - while (CoreStatusBit <32) { - if (Result & (1<< CoreStatusBit)) { + /* Read CanFd DLC */ + FramePtr[1] = CanEDL = XCanFd_ReadReg(InstancePtr->CanFdConfig. + BaseAddress, + XCANFD_RXDLC_OFFSET(RxBufferIndex)); - /* Read ID from ID Register of that FIFO */ - FramePtr[0] = XCanFd_ReadReg( - InstancePtr->CanFdConfig. - BaseAddress, - XCANFD_RXID_OFFSET(ReadIndex)); + Dlc = XCanFd_GetDlc2len(FramePtr[1] & + XCANFD_DLCR_DLC_MASK); + /* A CanFD Frame is received */ - /* Read DLC from DLC Register of that FIFO */ - FramePtr[1] = CanEDL = XCanFd_ReadReg( - InstancePtr->CanFdConfig. - BaseAddress, - XCANFD_RXDLC_OFFSET(ReadIndex)); + if (CanEDL & XCANFD_DLCR_EDL_MASK) { - Dlc = XCanFd_GetDlc2len(FramePtr[1] & - XCANFD_DLCR_DLC_MASK); + /* Read all Bytes from DW Register */ - /* CanFD Frame is received */ - if (CanEDL & XCANFD_DLCR_EDL_MASK) { - /* - * Read all Bytes from DW Register of - * that FIFO - */ - for (Len = 0;Len < Dlc;Len += 4) { - FramePtr[2+DwIndex] = - Xil_EndianSwap32( - XCanFd_ReadReg( - InstancePtr->CanFdConfig. - BaseAddress, - (XCANFD_RXDW_OFFSET( - ReadIndex) - +(DwIndex*XCANFD_DW_BYTES)))); - DwIndex++; - } - DwIndex=0; - } - else { - /* Legacy CAN Frame */ - for (Len = 0;Len < Dlc;Len += 4) { - FramePtr[2+DwIndex] = - Xil_EndianSwap32( - XCanFd_ReadReg( - InstancePtr->CanFdConfig. - BaseAddress, - (XCANFD_RXDW_OFFSET(ReadIndex)+ - (Len)))); - DwIndex++; - } - } - Mask = Result & 0xFFFF; - Result &= 1<CanFdConfig. - BaseAddress, - XCANFD_RCS_OFFSET(NoCtrlStatus),Result); - return XST_SUCCESS; + for (Len = 0;Len < Dlc;Len += 4) { + FramePtr[2+DwIndex] = Xil_EndianSwap32( + XCanFd_ReadReg( + InstancePtr->CanFdConfig. + BaseAddress, + (XCANFD_RXDW_OFFSET( + RxBufferIndex) + +(DwIndex*XCANFD_DW_BYTES)))); + DwIndex++; } - ReadIndex++; - CoreStatusBit++; + DwIndex=0; } - CoreStatusBit = 16; + else { + /* Legacy CAN Frame */ + for (Len = 0;Len < Dlc;Len += 4) { + FramePtr[2+DwIndex] = Xil_EndianSwap32( + XCanFd_ReadReg( + InstancePtr->CanFdConfig. + BaseAddress, + (XCANFD_RXDW_OFFSET( + RxBufferIndex)+ + (Len)))); + DwIndex++; + } + } + /* Clear CSB Bit of RCS Register */ + Result = Mask | (1 << CoreStatusBit); + XCanFd_WriteReg(InstancePtr->CanFdConfig. + BaseAddress,XCANFD_RCS_OFFSET(RcsRegNr),Result); + return XST_SUCCESS; + } else { + return XST_NO_DATA; } - return XST_NO_DATA; } /*****************************************************************************/ diff --git a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h index a0562c17..027514ee 100644 --- a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h +++ b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h @@ -55,7 +55,7 @@ * - Readable Error Counters. * - External PHY chip required. * - Backward compatiable for Legacy CAN. -* - Supports reception in Milibox and Sequential Mode +* - Supports reception in Mailbox and Sequential Mode * * The device driver supports all the features listed above, if applicable. * @@ -195,6 +195,13 @@ exclusion * Updated xcanfd.c while sending data when EDL is Zero. * Updated driver tcl file to get configurable TxBuffers. * (CR 861772). +* 1.0 nsk 16/06/15 Updated XCanFd_Recv_Mailbox(), XCanFd_EnterMode() +* XCanFd_GetMode() in xcanfd.c and Added new definition +* for Register bits in xcanfd_hw.h and updated +* XCanFd_IntrHandler() in xcanfd_intr.c as per new RTL. +* Changes in RTL, Added new bits to MSR,SR,ISR,IER,ICR +* Registers and modified TS2 bits in BTR and F_SJW bits +* in F_BTR Registers. * * ******************************************************************************/ @@ -219,8 +226,14 @@ extern "C" { #define XCANFD_MODE_CONFIG 0x00000001 /**< Configuration mode */ #define XCANFD_MODE_NORMAL 0x00000002 /**< Normal mode */ #define XCANFD_MODE_LOOPBACK 0x00000004 /**< Loop Back mode */ -#define XCANFD_MODE_SLEEP 0x00000008 /**< Sleep mode */ -#define XCANFD_MODE_SNOOP 0x00000010 +#define XCANFD_MODE_SLEEP 0x00000008 /**< Sleep mode */ +#define XCANFD_MODE_SNOOP 0x00000010 /**< Snoop mode */ +#define XCANFD_MODE_ABR 0x00000020 /**< Auto Bus-Off Recovery */ +#define XCANFD_MODE_SBR 0x00000040 /**< Starut Bus-Off Recovery */ +#define XCANFD_MODE_PEE 0x00000080 /**< Protocol Exception mode */ +#define XCANFD_MODE_DAR 0x0000000A /**< Disable Auto Retransmission + mode */ +#define XCANFD_MODE_BR 0x0000000B /**< Bus-Off Recovery Mode */ /* @} */ /** @name Callback identifiers used as parameters to XCanFd_SetHandler() @@ -237,6 +250,7 @@ extern "C" { /**************************** Type Definitions *******************************/ /** + * @struct * This typedef contains configuration information for a device. */ typedef struct { @@ -286,6 +300,7 @@ typedef void (*XCanFd_EventHandler) (void *CallBackRef, u32 Mask); /*****************************************************************************/ /** + * @struct * The XCanFd driver instance data. The user is required to allocate a * variable of this type for every CAN device in the system. A pointer * to a variable of this type is then passed to the driver API functions. @@ -752,24 +767,6 @@ typedef struct { (XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,\ XCANFD_TIMESTAMPR_OFFSET) >> 16) -/*****************************************************************************/ -/** -* -* This function Disables the Auto retransmissions. -* -* @param InstancePtr is a pointer to the XCanFd instance to be worked on. -* -* @return TimeStampCount -* -* -* @note None. -* -******************************************************************************/ -#define XCanFd_DisableAuto_Retransmission(InstancePtr) \ - XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_MSR_OFFSET, \ - (XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_MSR_OFFSET) \ - | XCANFD_DAR_MASK)); - /****************************************************************************/ /** * diff --git a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_hw.h b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_hw.h index bd483b3e..b25b9bde 100644 --- a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_hw.h +++ b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_hw.h @@ -45,10 +45,14 @@ * MODIFICATION HISTORY: * * Ver Who Date Changes -* ----- ---- ---------- ----------------------------------------------- +* ----- ---- ---------- ------------------------------------------------------- * 1.0 nsk 06/04/2015 First release * 1.0 nsk 15/05/2015 Modified XCANFD_BTR_TS1_MASK * (CR 861772). +* 1.0 nsk 16/06/2015 Added New definitions for Register +* bits since RTL has changed.RTL Changes,Added +* new bits to MSR,SR,ISR,IER,ICR Registers and modified +* TS2 bits in BTR and F_SJW bits in F_BTR Registers. * * * @@ -110,6 +114,8 @@ extern "C" { */ #define XCANFD_RCS2_OFFSET 0x0B8 /**< Rx Buffer Control Status 2 Register */ +#define XCANFD_RCS_HCB_MASK 0xFFFF /**< Rx Buffer Control Status Register + Host Control Bit Mask */ #define XCANFD_RXBFLL1_OFFSET 0x0C0 /**< Rx Buffer Full Interrupt Enable Register */ #define XCANFD_RXBFLL2_OFFSET 0x0C4 /**< Rx Buffer Full Interrupt Enable @@ -679,6 +685,11 @@ extern "C" { #define XCANFD_MSR_DAR_MASK 0x00000010 /**< Disable Auto-Retransmission Select Mask */ #define XCANFD_MSR_SNOOP_MASK 0x00000004 /**< Snoop Mode Select Mask */ +#define XCANFD_MSR_DPEE_MASK 0x00000020 /**< Protocol Exception Event + Mask */ +#define XCANFD_MSR_SBR_MASK 0x00000040 /**< Start Bus-Off Recovery Mask */ +#define XCANFD_MSR_ABR_MASK 0x00000080 /**< Auto Bus-Off Recovery Mask */ +#define XCANFD_MSR_CONFIG_MASK 0x000000F8 /**< Configuration Mode Mask */ /* @} */ /** @name Baud Rate Prescaler register @@ -692,7 +703,7 @@ extern "C" { */ #define XCANFD_BTR_SJW_MASK 0x000F0000 /**< Sync Jump Width Mask */ #define XCANFD_BTR_SJW_SHIFT 16 /**< Sync Jump Width Shift */ -#define XCANFD_BTR_TS2_MASK 0x00001F00 /**< Time Segment 2 Mask */ +#define XCANFD_BTR_TS2_MASK 0x00000F00 /**< Time Segment 2 Mask */ #define XCANFD_BTR_TS2_SHIFT 8 /**< Time Segment 2 Shift */ #define XCANFD_BTR_TS1_MASK 0x0000003F /**< Time Segment 1 Mask */ #define XCANFD_F_BRPR_TDCMASK 0x00001F00 /**< Tranceiver Delay @@ -705,7 +716,7 @@ extern "C" { /** @name Fast Bit Timing Register * @{ */ -#define XCANFD_F_BTR_SJW_MASK 0x00030000 /**< Sync Jump Width Mask */ +#define XCANFD_F_BTR_SJW_MASK 0x00070000 /**< Sync Jump Width Mask */ #define XCANFD_F_BTR_SJW_SHIFT 16 /**< Sync Jump Width Shift */ #define XCANFD_F_BTR_TS2_MASK 0x00000700 /**< Time Segment 2 Mask */ #define XCANFD_F_BTR_TS2_SHIFT 8 /**< Time Segment 2 Shift */ @@ -749,13 +760,23 @@ extern "C" { #define XCANFD_SR_SLEEP_MASK 0x00000004 /**< Sleep Mode Mask */ #define XCANFD_SR_LBACK_MASK 0x00000002 /**< Loop Back Mode Mask */ #define XCANFD_SR_CONFIG_MASK 0x00000001 /**< Configuration Mode Mask */ +#define XCANFD_SR_PEE_CONFIG_MASK 0x00000200 /**< Protocol Exception Mode + Indicator Mask */ +#define XCANFD_SR_BSFR_CONFIG_MASK 0x00000400 /**< Bus-Off recovery Mode + Indicator Mask */ +#define XCANFD_SR_NISO_MASK 0x00000800 /**< Non-ISO Core Mask */ /* @} */ /** @name Interrupt Status/Enable/Clear Register * @{ */ #define XCANFD_IXR_RXBOFLW_BI_MASK 0x3F000000 /**< Rx Buffer index for Overflow - Intr Mask (Mailbox Mode))*/ + (Mailbox Mode) */ +#define XCANFD_IXR_RXLRM_BI_MASK 0x00FC0000 /**< Rx Buffer index for Last + Received Message (Mailbox + Mode) */ +#define XCANFD_RXLRM_BI_SHIFT 18 /**< Rx Buffer Index Shift Value */ +#define XCANFD_CSB_SHIFT 16 /**< Core Status Bit Shift Value */ #define XCANFD_IXR_RXMNF_MASK 0x00020000 /**< Rx Match Not Finished Intr Mask */ #define XCANFD_IXR_RXBOFLW_MASK 0x00010000 /**< Rx Buffer Overflow interrupt @@ -778,7 +799,11 @@ extern "C" { #define XCANFD_IXR_TXOK_MASK 0x00000002 /**< TX Successful Interrupt Mask */ #define XCANFD_IXR_ARBLST_MASK 0x00000001 /**< Arbitration Lost Intr Mask */ -#define XCANFD_IXR_ALL (XCANFD_IXR_RXBOFLW_BI_MASK | \ +#define XCANFD_IXR_PEE_MASK 0x00000004 /**< Protocol Exception Intr Mask */ +#define XCANFD_IXR_BSRD_MASK 0x00000008 /**< Bus-Off recovery done Intr + Mask */ +#define XCANFD_IXR_ALL (XCANFD_IXR_PEE_MASK | \ + XCANFD_IXR_BSRD_MASK | \ XCANFD_IXR_RXMNF_MASK | \ XCANFD_IXR_RXBOFLW_MASK | \ XCANFD_IXR_RXRBF_MASK | \ diff --git a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_intr.c b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_intr.c index b60adf11..da86a4e8 100644 --- a/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_intr.c +++ b/XilinxProcessorIPLib/drivers/canfd/src/xcanfd_intr.c @@ -43,9 +43,12 @@ * MODIFICATION HISTORY: * * Ver Who Date Changes -* ----- ---- --------- ----------------------------------------------- +* ----- ---- --------- ------------------------------------------------------- * 1.0 nsk 06/04/15 First release -* +* 1.0 nsk 16/06/15 Updated XCanFd_IntrHandler() since RTL has +* changed. RTL Changes,Added new bits to MSR,SR,ISR, +* IER,ICR Registers and modified TS2 bits in +* BTR and F_SJW bits in F_BTR Registers. * * ******************************************************************************/ @@ -474,6 +477,7 @@ void XCanFd_IntrHandler(void *InstancePtr) * - Enter sleep mode * - Enter Bus off status * - Arbitration is lost + * - Protocol Exception Event * * If so, call event callback provided by upper level. */ @@ -484,21 +488,12 @@ void XCanFd_IntrHandler(void *InstancePtr) XCANFD_IXR_WKUP_MASK | XCANFD_IXR_SLP_MASK | XCANFD_IXR_BSOFF_MASK | XCANFD_IXR_RXFOFLW_MASK | XCANFD_IXR_ARBLST_MASK | - XCANFD_IXR_RXRBF_MASK); + XCANFD_IXR_RXRBF_MASK | + XCANFD_IXR_PEE_MASK | + XCANFD_IXR_BSRD_MASK); if (EventIntr) { CanPtr->EventHandler(CanPtr->EventRef, EventIntr); - - if ((EventIntr & XCANFD_IXR_BSOFF_MASK)) { - - /* - * Event callback should reset whole device if "Enter - * Bus Off Status" interrupt occurred. All pending - * interrupts are cleared and no further checking and - * handling of other interrupts is needed any more. - */ - return; - } } /*