From 07377abe62266473c9059252e7b9789c95d738e5 Mon Sep 17 00:00:00 2001 From: Jyotheeswar Reddy Date: Thu, 6 Aug 2015 11:02:28 -0700 Subject: [PATCH] PMUFW: Exceptions: Log exception details and set FW error bit Exception handler is modified to log the ESR and EAR registers into persistent global storage registers(0,1) and set FW error bit-0. If bit-0 of FWError group in ERROR_2 register set is configured to do a SRST,then post reset, SW can read the reason for exception from these persistent registers. Signed-off-by: Jyotheeswar Reddy --- lib/sw_apps/zynqmp_pmufw/src/xpfw_start.S | 12 ++++++++++++ lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/lib/sw_apps/zynqmp_pmufw/src/xpfw_start.S b/lib/sw_apps/zynqmp_pmufw/src/xpfw_start.S index 96565f86..29816040 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/xpfw_start.S +++ b/lib/sw_apps/zynqmp_pmufw/src/xpfw_start.S @@ -89,6 +89,18 @@ XPfw_Init: .ent XPfw_Exception .type XPfw_Exception, @function XPfw_Exception: +/* Save ESR to PERS_GLOBAL_STORAGE0 Register */ + addik r3, r0, 0xffd80050 + mfs r4, resr + swi r4, r3, 0 +/* Save EAR to PERS_GLOBAL_STORAGE1 Register */ + addik r3, r0, 0xffd80054 + mfs r4, rear + swi r4, r3, 0 +/* Set the FW error bit-0 */ + addik r3, r0, 0xffd6033c + addik r4, r0, 0x10000000 + swi r4, r3, 0 /* For now, just keep looping here. Its easier to debug */ bri 0 nop diff --git a/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h b/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h index 49a60779..43f1a46b 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h +++ b/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h @@ -1,4 +1,4 @@ #ifndef ZYNQMP_XPFW_VERSION__H_ #define ZYNQMP_XPFW_VERSION__H_ - #define ZYNQMP_XPFW_VERSION "2015.3-rc1-15-gea64c7dae039" + #define ZYNQMP_XPFW_VERSION "2015.3-rc1-16-gdffcba8f6d56" #endif