From 0f3d519f5b9d713fd65d6d1149da328f1b9eabe1 Mon Sep 17 00:00:00 2001 From: Andrei-Liviu Simion Date: Fri, 1 May 2015 19:20:52 -0700 Subject: [PATCH] dp: rx: mst: Indicate that the payload table has been updated during allocation. Signed-off-by: Andrei-Liviu Simion --- XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c b/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c index 4275b02e..36e4931d 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c @@ -827,6 +827,7 @@ static void XDp_TxInterruptHandler(XDp *InstancePtr) static void XDp_RxInterruptHandler(XDp *InstancePtr) { u32 IntrStatus; + u32 RegVal; /* Determine what kind of interrupts have occurred. * Note: XDP_RX_INTERRUPT_CAUSE is a RC (read-clear) register. */ @@ -929,6 +930,12 @@ static void XDp_RxInterruptHandler(XDp *InstancePtr) /* The RX's DPCD payload allocation registers have been written for * allocation, de-allocation, or partial deletion. */ if (IntrStatus & XDP_RX_INTERRUPT_CAUSE_PAYLOAD_ALLOC_MASK) { + RegVal = XDp_ReadReg(InstancePtr->Config.BaseAddr, + XDP_RX_MST_CAP); + RegVal |= XDP_RX_MST_CAP_VCP_UPDATE_MASK; + XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_MST_CAP, + RegVal); + InstancePtr->RxInstance.IntrPayloadAllocHandler( InstancePtr->RxInstance.IntrPayloadAllocCallbackRef); }