diff --git a/XilinxProcessorIPLib/drivers/sdps/src/xsdps.c b/XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
index 680cc3db..22157519 100755
--- a/XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
+++ b/XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
@@ -166,6 +166,13 @@ int XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
 	InstancePtr->Host_Caps = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
 						XSDPS_CAPS_OFFSET);
 
+	/*
+	 * Select voltage and enable bus power.
+	 */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_POWER_CTRL_OFFSET,
+			XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK);
+
 	/*
 	 * Change the clock frequency to 400 KHz
 	 */
@@ -175,13 +182,6 @@ int XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
 		goto RETURN_PATH ;
 	}
 
-	/*
-	 * Select voltage and enable bus power.
-	 */
-	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
-			XSDPS_POWER_CTRL_OFFSET,
-			XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK);
-
 	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
 			XSDPS_HOST_CTRL1_OFFSET,
 			XSDPS_HC_DMA_ADMA2_32_MASK);