From 13dc99ad960f23be7f945481c141a33a225da2c5 Mon Sep 17 00:00:00 2001 From: P L Sai Krishna Date: Mon, 15 Dec 2014 15:12:30 +0530 Subject: [PATCH] cpu_v2_3: Added new version for cpu driver. This patch add new version for cpu driver and deprecated the older version. Signed-off-by: P L Sai Krishna --- XilinxProcessorIPLib/drivers/cpu/data/cpu.mdd | 52 +++ XilinxProcessorIPLib/drivers/cpu/data/cpu.tcl | 440 ++++++++++++++++++ XilinxProcessorIPLib/drivers/cpu/src/Makefile | 27 ++ XilinxProcessorIPLib/drivers/cpu/src/fsl.h | 169 +++++++ XilinxProcessorIPLib/drivers/cpu/src/xio.c | 227 +++++++++ XilinxProcessorIPLib/drivers/cpu/src/xio.h | 263 +++++++++++ 6 files changed, 1178 insertions(+) create mode 100755 XilinxProcessorIPLib/drivers/cpu/data/cpu.mdd create mode 100755 XilinxProcessorIPLib/drivers/cpu/data/cpu.tcl create mode 100755 XilinxProcessorIPLib/drivers/cpu/src/Makefile create mode 100755 XilinxProcessorIPLib/drivers/cpu/src/fsl.h create mode 100755 XilinxProcessorIPLib/drivers/cpu/src/xio.c create mode 100755 XilinxProcessorIPLib/drivers/cpu/src/xio.h diff --git a/XilinxProcessorIPLib/drivers/cpu/data/cpu.mdd b/XilinxProcessorIPLib/drivers/cpu/data/cpu.mdd new file mode 100755 index 00000000..52c436a3 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/data/cpu.mdd @@ -0,0 +1,52 @@ +############################################################################### +# +# Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +# +############################################################################### +OPTION psf_version = 2.1; + +BEGIN driver cpu + +OPTION copyfiles = all; +OPTION driver_state = ACTIVE; +OPTION supported_peripherals = (microblaze); +OPTION default_os = "standalone_v4_1"; +OPTION VERSION = 2.3; +OPTION NAME = cpu; + +PARAM name = compiler, desc = "Compiler used to compile both BSP/Libraries and Applications.", type = string, default = mb-gcc; +PARAM name = archiver, desc = "Archiver used to archive libraries for both BSP generation as well as for applications", type = string, default = mb-ar; +PARAM name = compiler_flags, desc = "Compiler flags used in BSP and library generation. '-c' flag stands for 'compile and assemble, but do not link'. Without this flag, gcc tries to link the code, which will fail bacause there is no application involved during libgen. '-O2' can be overwritten by extra compiler flags", type = string, default = "-O2 -c", permit = none; +PARAM name = extra_compiler_flags, desc = "Extra compiler flags used in BSP and library generation.", type = string, default = "-g -ffunction-sections -fdata-sections"; +PARAM name = multiplier, desc = "Is there a hard multiplier present ?", type = bool, default = false, state = "deprecated", state_desc = "Presence of hardware multiplier is now automatically detected based on the target FPGA architecture."; +PARAM name = xmdstub_peripheral, desc = "Debug peripheral to be used with xmdstub", type = peripheral_instance, range = (none, opb_uartlite, opb_uart16550, opb_jtag_uart, opb_mdm, debugnotraceblaze, debugnotraceblazenode, debugtraceblazenode, debugtraceblaze, mdm, xps_uartlite), default = none; + +PARAM name = CORE_CLOCK_FREQ_HZ, desc = "Core Clock Frequency in Hz", type = int, default = 100000000, state = "deprecated"; + +END driver diff --git a/XilinxProcessorIPLib/drivers/cpu/data/cpu.tcl b/XilinxProcessorIPLib/drivers/cpu/data/cpu.tcl new file mode 100755 index 00000000..89fb5ea8 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/data/cpu.tcl @@ -0,0 +1,440 @@ +############################################################################### +# +# Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +# +############################################################################## +## @BEGIN_CHANGELOG EDK_L +## Updated the Tcl to add the bus frequency to xparameters.h +## @END_CHANGELOG +## @BEGIN_CHANGELOG EDK_LS3 +## Updated the Tcl to check for Extended FPU for pulling in libm compiled +## with -mhard-float +## @END_CHANGELOG +## @BEGIN_CHANGELOG EDK_MS3 +## Updated the Tcl to pull appropriate libraries for Little Endian Microblaze +## @END_CHANGELOG +## +## MODIFICATION HISTORY: +## +## Ver Who Date Changes +## ----- ---- -------- ------------------------------------------------------- +## 1.04a asa 07/16/12 Updated the tcl to return 100 MHz for CR 668726 for an +## IP integrator design when when cpu is directly connected +## to axi slave peripheral +## 2.0 adk 10/12/13 Updated as per the New Tcl API's +## 2.1 bss 04/14/14 Updated to copy libgloss.a and libgcc.a libraries +## 2.1 bss 04/29/14 Updated to copy libgloss.a if exists otherwise libxil.a +## CR#794205 +## 2.2 bss 08/04/14 Updated to add protection macros for xparameters.h +## CR#802257 +# uses xillib.tcl + +######################################## +# Make file writable +######################################## +proc make_writable {osname filename} { + + if {[string first "win64" $osname] != -1 || [string first "win" $osname] != -1 } { + file attributes $filename -readonly no + } else { + file attributes $filename -permissions ugo+w + } +} + +proc generate {drv_handle} { + global env + global tcl_platform + + set osname "[::hsm::utils::get_hostos_platform]/" + + #--------------------------------------------------------------------------- + # Start of mb-gcc specific processing.. + # 1. Copy libc, libm and libxil files.. + # 2. Generate the attribute interrupt_handler for the interrupting source... + #--------------------------------------------------------------------------- + set compiler [get_property CONFIG.compiler $drv_handle] + # preserve case + set temp $compiler + set compiler [string tolower $compiler] + if { $compiler == "mb-gcc" || $compiler == "mb-g++" || $compiler == "mb-c++" } { + # If the user has just specified the compiler without specifying a path, + # we default to the compiler root being the EDK installation + if {[string compare "mb-gcc" $compiler] == 0 || + [string compare "mb-g++" $compiler] == 0 || + [string compare "mb-c++" $compiler] == 0 } { + + set compiler_root "" + set xilinx_edk_gnu [array get env XILINX_EDK_GNU] + set gnu_osdir $osname + if {[string first "win64" $osname] != -1 || [string first "win" $osname] != -1 } { + set gnu_osdir "nt" + } elseif {[string first "lnx64" $osname] != -1 || [string first "lnx" $osname] != -1 } { + set gnu_osdir "lin" + } + if { $xilinx_edk_gnu == "" } { + append compiler_root $env(XILINX_SDK) "/gnu/microblaze/" $gnu_osdir + } { + append compiler_root $env(XILINX_EDK_GNU) "/microblaze/" $gnu_osdir + } + } else { + set compiler_root [file dirname $temp] + + ## Big time kludge here. We rely on the compiler toolchain name staying the same forever here. + set compiler_root [string range $compiler_root 0 [expr [string length $compiler_root] - 4]] + } + puts $compiler_root + # Copy the library files - libc.a, libm.a, libxil.a + set shifter "" + set multiplier "" + set libxil_shifter "" + set libxil_multiplier "" + set pattern "" + set fpu "" + + set libc "libc" + set libm "libm" + + set sw_proc_handle [get_sw_processor] + set periph [get_cells [get_property HW_INSTANCE $sw_proc_handle]] + set proctype [get_property IP_NAME $periph] + + set endian [get_property CONFIG.C_ENDIANNESS $periph] + if {[string compare -nocase "1" $endian] == 0 } { + set endian "_le" + set libxil_endian "le" + } else { + set endian "" + set libxil_endian "" + } + + set shift [get_property CONFIG.C_USE_BARREL $periph] + if {[string compare -nocase "1" $shift] == 0 } { + set shifter "_bs" + set libxil_shifter "bs" + } + + set hard_float [get_property CONFIG.C_USE_FPU $periph] + if {[string compare -nocase "1" $hard_float] == 0 || [string compare -nocase "2" $hard_float] == 0} { + set fpu "_fpd" + } + + set pcmp [get_property CONFIG.C_USE_PCMP_INSTR $periph] + if {[string compare -nocase "1" $pcmp] == 0 } { + set pattern "_p" + } + + #------------------------------------------------- + # Check if MULTIPLIER PARAMETER is set in MSS file + # If so, then use it. Else find the C_FAMILY + # and set the multiplier accordingly + #------------------------------------------------- + set multiply [get_property CONFIG.C_USE_HW_MUL $periph] + if {[string compare -nocase "" $multiply] == 0 } { + set family [string tolower [get_property CONFIG.C_FAMILY $periph] + if {[string first "virtex" $family] >= 0 } { + if {[string compare -nocase "virtexe" $family] == 0 } { + set multiplier "" + set libxil_multiplier "" + + } else { + set multiplier "_m" + set libxil_multiplier "m" + } + } elseif {[string compare -nocase "spartan3" $family] == 0 } { + set multiplier "_m" + set libxil_multiplier "m" + } + } elseif {[string compare -nocase "1" $multiply] == 0 } { + set multiplier "_m" + set libxil_multiplier "m" + } + + set libc [format "%s%s%s%s%s%s" $libc $endian $multiplier $shifter $pattern ".a"] + set libm [format "%s%s%s%s%s%s%s" $libm $endian $multiplier $shifter $pattern $fpu ".a"] + set libxil "libgloss.a" + set libgcc "libgcc.a" + set targetdir "../../lib/" + + #------------------------------------------------------ + # Copy libc, libm , libxil files... + # + # There are checks and flows to handle differences in + # the GCC 3.4.1 toolchain (EDK 9.1i and prior) and + # the GCC 4.1.1 toolchain (EDK 9.2i and later) + #------------------------------------------------------ + set libcfilename [format "%s%s" $targetdir "libc.a"] + set libmfilename [format "%s%s" $targetdir "libm.a"] + + set library_dir [file join $compiler_root "microblaze/lib"] + + if { ![file exists $library_dir] } { + set library_dir [file join $compiler_root "microblaze-xilinx-elf/lib"] + if { ![file exists $library_dir] } { + error "Couldn't figure out compiler's library directory" "" "hsm_error" + } + set libgcc_dir [file join $compiler_root "lib/gcc/microblaze-xilinx-elf"] + set libgcc_dir [glob -dir $libgcc_dir *] + if { ![file exists $libgcc_dir] } { + error "Couldn't figure out compiler's GCC library directory" "" "hsm_error" + } + } + + + file copy -force [file join $library_dir $libc] $libcfilename + make_writable $osname $libcfilename + + file copy -force [file join $library_dir $libm] $libmfilename + make_writable $osname $libmfilename + + set libxil_path [file join $library_dir $libxil_shifter $libxil_multiplier $libxil_endian $libxil] + set symlink [file type $libxil_path] + if { ![file exists $libxil_path] || $symlink == "link"} { + # no libgloss.a in older SDK use libxil.a + set libxil "libxil.a" + set libxil_path [file join $library_dir $libxil_shifter $libxil_multiplier $libxil_endian $libxil] + } + set libgcc_path [file join $libgcc_dir $libxil_shifter $libxil_multiplier $libxil_endian $libgcc] + if { ![file exists $libxil_path] } { + set libxil_path [file join $env(XILINX_SDK) "data/embeddedsw/lib/microblaze/" $libxil] + } + + file copy -force $libxil_path $targetdir + make_writable $osname [file join $targetdir $libxil] + file copy -force $libgcc_path $targetdir + make_writable $osname [file join $targetdir $libgcc] + + } else { + error "ERROR: Wrong compiler type selected please use mb-gcc or mb-g++ or mb-c++" + return; + } + + + + # End of mb-gcc specific processing... + + #------------------------------------ + # Handle xmdstub generation + #------------------------------------ + set xmdstub_periph [get_property CONFIG.xmdstub_peripheral $drv_handle] + if {[string compare -nocase "none" $xmdstub_periph] != 0 } { + set xmdstub_periph_handle [xget_hwhandle $xmdstub_periph] + set targetdir "../../code" + set filename "xmdstub.s" + file copy -force [file join $env(XILINX_SDK) "data/embeddedsw/lib/microblaze/src" $filename] $targetdir + file mtime [file join $targetdir $filename] [clock seconds] + set filename "make.xmdstub" + file copy -force [file join $env(XILINX_SDK) "data/embeddedsw/lib/microblaze/src" $filename] $targetdir + file mtime [file join $targetdir $filename] [clock seconds] + set xmd_addr_file [open "../../code/xmdstubaddr.s" w] + set xmdstub_periph_baseaddr [::hsm::utils::format_addr_string [xget_value $xmdstub_periph_handle "PARAMETER" "C_BASEADDR"] "C_BASEADDR"] + puts $xmd_addr_file ".equ DEBUG_PERIPHERAL_BASEADDRESS, $xmdstub_periph_baseaddr" + close $xmd_addr_file + # execute make + set pwd [pwd] + if [catch {cd "../../code"} err] { + error "Couldn't cd to code directory: $err" "" "hsm_error" + return + } + if [catch {exec make -f make.xmdstub xmdstub} err] { + error "Couldn't make xmdstub: $err" "" "hsm_error" + return + } + cd $pwd + } + + #-------------------------- + # Handle the Bus Frequency + #-------------------------- + set file_handle [::hsm::utils::open_include_file "xparameters.h"] + puts $file_handle "#ifndef XPARAMETERS_H /* prevent circular inclusions */" + puts $file_handle "#define XPARAMETERS_H /* by using protection macros */" + puts $file_handle "" + puts $file_handle "/* Definitions for bus frequencies */" + set bus_array {"M_AXI_DP" "M_AXI_IP"} + set bus_freq [::hsm::utils::get_clk_pin_freq $periph "Clk"] + if {[llength $bus_freq] == 0} { + set bus_freq "100000000" + } + + foreach bus_inst $bus_array { + set bhandle [get_intf_pins $bus_inst -of_objects $periph] + if { $bhandle == "" } { + continue; + } + puts $file_handle "#define [::hsm::utils::get_driver_param_name "cpu" [format "%s_FREQ_HZ" $bus_inst]] $bus_freq" + } + + puts $file_handle "/******************************************************************/" + puts $file_handle "" + puts $file_handle "/* Canonical definitions for bus frequencies */" + set bus_id 0 + foreach bus $bus_array { + set bhandle [get_intf_pins $bus_inst -of_objects $periph] + if { $bhandle == "" } { + continue; + } + puts $file_handle "#define [::hsm::utils::get_driver_param_name "PROC_BUS" [format "%d_FREQ_HZ" $bus_id]] $bus_freq" + incr bus_id + } + puts $file_handle "/******************************************************************/" + puts $file_handle "" + + #-------------------------- + # define CORE_CLOCK_FREQ_HZ + #-------------------------- + set clk_freq [::hsm::utils::get_clk_pin_freq $periph "Clk"] + puts $file_handle "#define [::hsm::utils::get_driver_param_name "cpu" CORE_CLOCK_FREQ_HZ] $clk_freq" + puts $file_handle "#define [format "XPAR_%s_CORE_CLOCK_FREQ_HZ" [string toupper $proctype]] $clk_freq" + + puts $file_handle "\n/******************************************************************/\n" + close $file_handle + + #-------------------------- + # define all params + #-------------------------- + ::hsm::utils::define_all_params $drv_handle "xparameters.h" + + #---------------------------------------- + # define all params without instance name + #---------------------------------------- + ::hsm::utils::define_processor_params $drv_handle "xparameters.h" + xdefine_addr_params_for_ext_intf $drv_handle "xparameters.h" +} +proc xdefine_addr_params_for_ext_intf {drvhandle file_name} { + set sw_proc_handle [get_sw_processor] + set hw_proc_handle [get_cells [get_property HW_INSTANCE $sw_proc_handle ]] + + # Open include file + set file_handle [::hsm::utils::open_include_file $file_name] + + set mem_ranges [get_mem_ranges -of_objects $hw_proc_handle] + foreach mem_range $mem_ranges { + set inst [get_property INSTANCE $mem_range] + if {$inst != ""} { + continue + } + + set bparam_name [get_property BASE_NAME $mem_range] + set bparam_value [get_property BASE_VALUE $mem_range] + set hparam_name [get_property HIGH_NAME $mem_range] + set hparam_value [get_property HIGH_VALUE $mem_range] + + # Print all parameters for all peripherals + + set name [string toupper [get_property NAME $mem_range]] + puts $file_handle "" + puts $file_handle "/* Definitions for interface [string toupper $name] */" + set name [format "XPAR_%s_" $name] + + if {$bparam_value != ""} { + set value [::hsm::utils::format_addr_string $bparam_value $bparam_name] + set param [string toupper $bparam_name] + if {[string match C_* $param]} { + set name [format "%s%s" $name [string range $param 2 end]] + } else { + set name [format "%s%s" $name $param] + } + + puts $file_handle "#define $name $value" + } + + set name [string toupper [get_property NAME $mem_range]] + set name [format "XPAR_%s_" $name] + if {$hparam_value != ""} { + set value [::hsm::utils::format_addr_string $hparam_value $hparam_name] + set param [string toupper $hparam_name] + if {[string match C_* $param]} { + set name [format "%s%s" $name [string range $param 2 end]] + } else { + set name [format "%s%s" $name $param] + } + + puts $file_handle "#define $name $value" + } + + + puts $file_handle "" + } + + close $file_handle +} + +proc post_generate {drv_handle} { + set file_handle [::hsm::utils::open_include_file "xparameters.h"] + puts $file_handle "#endif /* end of protection macro */" + close $file_handle +} + +# Returns the frequency of a bus +#proc xget_busfreq {bus_name} { +# set bus_freq "" +# set bus_handle [xget_hwhandle $bus_name] +# if {$bus_handle == ""} { +# puts "WARNING: Bus Clock frequency information is not available in the design, for $bus_name. Assuming a default frequency of 100MHz\n" +# return 100000000 +# } +# +# set bus_type [xget_hw_value $bus_handle] +# +# if { $bus_type == "axi_interconnect" } { +# set port_name "INTERCONNECT_ACLK" +# } +# set clkhandle [xget_hw_port_handle $bus_handle $port_name] +# if { [string compare -nocase $clkhandle ""] != 0 } { +# set bus_freq [xget_hw_subproperty_value $clkhandle "CLK_FREQ_HZ"] +# } +# return $bus_freq +#} + +# Returns the frequency of a bus for IPI system +#proc xget_bus_freq_value {periph_handle bus_name} { +# set bus_freq "" +# set bus_handle [xget_hw_ipinst_handle $periph_handle $bus_name] +# if {$bus_handle == ""} { +# puts "WARNING: Bus Clock frequency information is not available in the design, for $bus_name. Assuming a default frequency of 100MHz\n" +# return 100000000 +# } +# +# set bus_type [xget_hw_value $bus_handle] +# +# if { $bus_type == "plb_v34" || $bus_type == "plb_v46" } { +# set port_name "PLB_Clk" +# } elseif { $bus_type == "axi_interconnect" } { +# set port_name "INTERCONNECT_ACLK" +# } elseif { $bus_type == "axi_crossbar" } { +# set port_name "ACLK" +# } else { +# set port_name "OPB_Clk" +# } +# set clkhandle [xget_hw_port_handle $bus_handle $port_name] +# if { [string compare -nocase $clkhandle ""] != 0 } { +# set bus_freq [xget_hw_subproperty_value $clkhandle "CLK_FREQ_HZ"] +# } +# return $bus_freq +#} diff --git a/XilinxProcessorIPLib/drivers/cpu/src/Makefile b/XilinxProcessorIPLib/drivers/cpu/src/Makefile new file mode 100755 index 00000000..dd934f66 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/src/Makefile @@ -0,0 +1,27 @@ +COMPILER= +ARCHIVER= +CP=cp +COMPILER_FLAGS= +EXTRA_COMPILER_FLAGS= +LIB=libxil.a + +RELEASEDIR=../../../lib +INCLUDEDIR=../../../include +INCLUDES=-I${INCLUDEDIR} + +OUTS = *.o + +LIBSOURCES=*.c +INCLUDEFILES=xio.h + +libs: + echo "Compiling cpu" + $(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES) + $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS} + make clean + +include: + ${CP} ${INCLUDEFILES} ${INCLUDEDIR} + +clean: + rm -rf ${OUTS} diff --git a/XilinxProcessorIPLib/drivers/cpu/src/fsl.h b/XilinxProcessorIPLib/drivers/cpu/src/fsl.h new file mode 100755 index 00000000..07e9d98e --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/src/fsl.h @@ -0,0 +1,169 @@ +/****************************************************************************** +* +* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file fsl.h +* +* This file contains macros for interfacing to the Fast Simplex Link (FSL) +* interface.. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  06/20/07 Initial version, moved over from bsp area
+* 1.11c ecm  08/26/08 Fixed the missing 'FSL_DEFAULT' define that was causing
+*					  assembly errors.
+*
+* +* @note +* +* None. +* +******************************************************************************/ + + +#ifndef _FSL_H +#define _FSL_H + +/***************************** Include Files *********************************/ + + +#ifdef __cplusplus +extern "C" { +#endif +/************************** Constant Definitions *****************************/ + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/* if these have not been defined already, define here */ +#ifndef stringify + +/* necessary for pre-processor */ +#define stringify(s) tostring(s) +#define tostring(s) #s + +#endif /* stringify */ + +/* Extended FSL macros. These now replace all of the previous FSL macros */ +#define FSL_DEFAULT +#define FSL_NONBLOCKING n +#define FSL_EXCEPTION e +#define FSL_CONTROL c +#define FSL_ATOMIC a + +#define FSL_NONBLOCKING_EXCEPTION ne +#define FSL_NONBLOCKING_CONTROL nc +#define FSL_NONBLOCKING_ATOMIC na +#define FSL_EXCEPTION_CONTROL ec +#define FSL_EXCEPTION_ATOMIC ea +#define FSL_CONTROL_ATOMIC ca + +#define FSL_NONBLOCKING_EXCEPTION_CONTROL nec +#define FSL_NONBLOCKING_EXCEPTION_ATOMIC nea +#define FSL_NONBLOCKING_CONTROL_ATOMIC nca +#define FSL_EXCEPTION_CONTROL_ATOMIC eca + +#define FSL_NONBLOCKING_EXCEPTION_CONTROL_ATOMIC neca + +#define getfslx(val, id, flags) asm volatile (stringify(flags) "get\t%0,rfsl" stringify(id) : "=d" (val)) +#define putfslx(val, id, flags) asm volatile (stringify(flags) "put\t%0,rfsl" stringify(id) :: "d" (val)) + +#define tgetfslx(val, id, flags) asm volatile ("t" stringify(flags) "get\t%0,rfsl" stringify(id) : "=d" (val)) +#define tputfslx(id, flags) asm volatile ("t" stringify(flags) "put\trfsl" stringify(id)) + +#define getdfslx(val, var, flags) asm volatile (stringify(flags) "getd\t%0,%1" : "=d" (val) : "d" (var)) +#define putdfslx(val, var, flags) asm volatile (stringify(flags) "putd\t%0,%1" :: "d" (val), "d" (var)) + +#define tgetdfslx(val, var, flags) asm volatile ("t" stringify(flags) "getd\t%0,%1" : "=d" (val) : "d" (var)) +#define tputdfslx(var, flags) asm volatile ("t" stringify(flags) "putd\t%0" :: "d" (var)) + +/* if the mb_interface.h file has been included already, the following are not needed and will not be defined */ + +/* Legacy FSL Access Macros */ + +#ifndef getfsl + +/* Blocking Data Read and Write to FSL no. id */ +#define getfsl(val, id) asm volatile ("get\t%0,rfsl" stringify(id) : "=d" (val)) +#define putfsl(val, id) asm volatile ("put\t%0,rfsl" stringify(id) :: "d" (val)) + +/* Non-blocking Data Read and Write to FSL no. id */ +#define ngetfsl(val, id) asm volatile ("nget\t%0,rfsl" stringify(id) : "=d" (val)) +#define nputfsl(val, id) asm volatile ("nput\t%0,rfsl" stringify(id) :: "d" (val)) + +/* Blocking Control Read and Write to FSL no. id */ +#define cgetfsl(val, id) asm volatile ("cget\t%0,rfsl" stringify(id) : "=d" (val)) +#define cputfsl(val, id) asm volatile ("cput\t%0,rfsl" stringify(id) :: "d" (val)) + +/* Non-blocking Control Read and Write to FSL no. id */ +#define ncgetfsl(val, id) asm volatile ("ncget\t%0,rfsl" stringify(id) : "=d" (val)) +#define ncputfsl(val, id) asm volatile ("ncput\t%0,rfsl" stringify(id) :: "d" (val)) + +/* Polling versions of FSL access macros. This makes the FSL access interruptible */ +#define getfsl_interruptible(val, id) asm volatile ("\n1:\n\tnget\t%0,rfsl" stringify(id) "\n\t" \ + "addic\tr18,r0,0\n\t" \ + "bnei\tr18,1b\n" \ + : "=d" (val) :: "r18") + +#define putfsl_interruptible(val, id) asm volatile ("\n1:\n\tnput\t%0,rfsl" stringify(id) "\n\t" \ + "addic\tr18,r0,0\n\t" \ + "bnei\tr18,1b\n" \ + :: "d" (val) : "r18") + +#define cgetfsl_interruptible(val, id) asm volatile ("\n1:\n\tncget\t%0,rfsl" stringify(id) "\n\t" \ + "addic\tr18,r0,0\n\t" \ + "bnei\tr18,1b\n" \ + : "=d" (val) :: "r18") + +#define cputfsl_interruptible(val, id) asm volatile ("\n1:\n\tncput\t%0,rfsl" stringify(id) "\n\t" \ + "addic\tr18,r0,0\n\t" \ + "bnei\tr18,1b\n" \ + :: "d" (val) : "r18") +/* FSL valid and error check macros. */ +#define fsl_isinvalid(result) asm volatile ("addic\t%0,r0,0" : "=d" (result)) +#define fsl_iserror(error) asm volatile ("mfs\t%0,rmsr\n\t" \ + "andi\t%0,%0,0x10" : "=d" (error)) + +#endif /* legacy FSL defines */ +/************************** Function Prototypes ******************************/ + +/************************** Variable Definitions *****************************/ + +#ifdef __cplusplus +} +#endif +#endif /* _FSL_H */ diff --git a/XilinxProcessorIPLib/drivers/cpu/src/xio.c b/XilinxProcessorIPLib/drivers/cpu/src/xio.c new file mode 100755 index 00000000..79138c6b --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/src/xio.c @@ -0,0 +1,227 @@ +/****************************************************************************** +* +* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xio.c +* +* Contains I/O functions for memory-mapped or non-memory-mapped I/O +* architectures. These functions encapsulate generic CPU I/O requirements. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a rpm  11/07/03 Added InSwap/OutSwap routines for endian conversion
+* 1.01a ecm  02/24/06 CR225908 corrected the extra curly braces in macros
+*                     and bumped version to 1.01.a.
+* 2.11a mta  03/21/07 Updated to new coding style.
+*
+*
+* +* @note +* +* This file may contain architecture-dependent code. +* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xio.h" +#include "xil_types.h" +#include "xil_assert.h" + +/************************** Constant Definitions *****************************/ + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + + +/*****************************************************************************/ +/** +* +* Performs a 16-bit endian converion. +* +* @param Source contains the value to be converted. +* @param DestPtr contains a pointer to the location to put the +* converted value. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XIo_EndianSwap16(u16 Source, u16 *DestPtr) +{ + *DestPtr = (u16) (((Source & 0xFF00) >> 8) | ((Source & 0x00FF) << 8)); +} + +/*****************************************************************************/ +/** +* +* Performs a 32-bit endian converion. +* +* @param Source contains the value to be converted. +* @param DestPtr contains a pointer to the location to put the +* converted value. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XIo_EndianSwap32(u32 Source, u32 *DestPtr) +{ + /* get each of the half words from the 32 bit word */ + + u16 LoWord = (u16) (Source & 0x0000FFFF); + u16 HiWord = (u16) ((Source & 0xFFFF0000) >> 16); + + /* byte swap each of the 16 bit half words */ + + LoWord = (((LoWord & 0xFF00) >> 8) | ((LoWord & 0x00FF) << 8)); + HiWord = (((HiWord & 0xFF00) >> 8) | ((HiWord & 0x00FF) << 8)); + + /* swap the half words before returning the value */ + + *DestPtr = (u32) ((LoWord << 16) | HiWord); +} + +/*****************************************************************************/ +/** +* +* Performs an input operation for a 16-bit memory location by reading from the +* specified address and returning the byte-swapped value read from that +* address. +* +* @param InAddress contains the address to perform the input +* operation at. +* +* @return The byte-swapped value read from the specified input address. +* +* @note None. +* +******************************************************************************/ +u16 XIo_InSwap16(XIo_Address InAddress) +{ + u16 InData; + + /* get the data then swap it */ + InData = XIo_In16(InAddress); + + return (u16) (((InData & 0xFF00) >> 8) | ((InData & 0x00FF) << 8)); +} + +/*****************************************************************************/ +/** +* +* Performs an input operation for a 32-bit memory location by reading from the +* specified address and returning the byte-swapped value read from that +* address. +* +* @param InAddress contains the address to perform the input +* operation at. +* +* @return The byte-swapped value read from the specified input address. +* +* @note None. +* +******************************************************************************/ +u32 XIo_InSwap32(XIo_Address InAddress) +{ + u32 InData; + u32 SwapData; + + /* get the data then swap it */ + InData = XIo_In32(InAddress); + XIo_EndianSwap32(InData, &SwapData); + + return SwapData; +} + +/*****************************************************************************/ +/** +* +* Performs an output operation for a 16-bit memory location by writing the +* specified value to the the specified address. The value is byte-swapped +* before being written. +* +* @param OutAddress contains the address to perform the output +* operation at. +* @param Value contains the value to be output at the specified address. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XIo_OutSwap16(XIo_Address OutAddress, u16 Value) +{ + u16 OutData; + + /* swap the data then output it */ + OutData = (u16) (((Value & 0xFF00) >> 8) | ((Value & 0x00FF) << 8)); + + XIo_Out16(OutAddress, OutData); +} + +/*****************************************************************************/ +/** +* +* Performs an output operation for a 32-bit memory location by writing the +* specified value to the the specified address. The value is byte-swapped +* before being written. +* +* @param OutAddress contains the address at which the +* output operation has to be done. +* @param Value contains the value to be output at the specified address. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XIo_OutSwap32(XIo_Address OutAddress, u32 Value) +{ + u32 OutData; + + /* swap the data then output it */ + XIo_EndianSwap32(Value, &OutData); + XIo_Out32(OutAddress, OutData); +} diff --git a/XilinxProcessorIPLib/drivers/cpu/src/xio.h b/XilinxProcessorIPLib/drivers/cpu/src/xio.h new file mode 100755 index 00000000..105f60d6 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/cpu/src/xio.h @@ -0,0 +1,263 @@ +/****************************************************************************** +* +* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xio.h +* +* This file contains the interface for the XIo component, which encapsulates +* the Input/Output functions for processors that do not require any special +* I/O handling. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a rpm  11/07/03 Added InSwap/OutSwap routines for endian conversion
+* 1.00a xd   11/04/04 Improved support for doxygen
+* 1.01a ecm  02/24/06 CR225908 corrected the extra curly braces in macros
+*                     and bumped version to 1.01.a.
+* 1.11a mta  03/21/07 Updated to new coding style.
+* 1.11b va   04/17/08 Updated Tcl for better CORE_CLOCK_FREQ_HZ definition
+* 1.11a sdm  03/12/09 Updated Tcl to define correct value for CORE_CLOCK_FREQ_HZ
+*                     (CR  #502010)
+* 1.13a sdm  03/12/09 Updated the Tcl to pull appropriate libraries for Little
+*                     Endian Microblaze
+* 2.0   adk  19/12/13 Updated as per the New Tcl API's
+* 2.1   bss  04/14/14 Updated tcl to copy libgloss.a and libgcc.a libraries
+* 2.1   bss  04/29/14 Updated to copy libgloss.a if exists otherwise libxil.a
+*			CR#794205
+* 2.2   bss  08/04/14 Updated driver tcl to add protection macros for
+*		      xparameters.h (CR#802257).
+*
+*
+* +* @note +* +* This file may contain architecture-dependent items (memory-mapped or +* non-memory-mapped I/O). +* +******************************************************************************/ + +#ifndef XIO_H /* prevent circular inclusions */ +#define XIO_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_types.h" +#include "xil_assert.h" + +/************************** Constant Definitions *****************************/ + + +/**************************** Type Definitions *******************************/ + +/** + * Typedef for an I/O address. Typically correlates to the width of the + * address bus. + */ +typedef u32 XIo_Address; + +/***************** Macros (Inline Functions) Definitions *********************/ + +/* + * The following macros allow optimized I/O operations for memory mapped I/O. + * It should be noted that macros cannot be used if synchronization of the I/O + * operation is needed as it will likely break some code. + */ + +/*****************************************************************************/ +/** +* +* Performs an input operation for an 8-bit memory location by reading from the +* specified address and returning the value read from that address. +* +* @param InputPtr contains the address to perform the input operation at. +* +* @return The value read from the specified input address. +* +* @note None. +* +******************************************************************************/ +#define XIo_In8(InputPtr) (*(volatile u8 *)(InputPtr)) + +/*****************************************************************************/ +/** +* +* Performs an input operation for a 16-bit memory location by reading from the +* specified address and returning the value read from that address. +* +* @param InputPtr contains the address to perform the input operation at. +* +* @return The value read from the specified input address. +* +* @note None. +* +******************************************************************************/ +#define XIo_In16(InputPtr) (*(volatile u16 *)(InputPtr)) + +/*****************************************************************************/ +/** +* +* Performs an input operation for a 32-bit memory location by reading from the +* specified address and returning the value read from that address. +* +* @param InputPtr contains the address to perform the input operation at. +* +* @return The value read from the specified input address. +* +* @note None. +* +******************************************************************************/ +#define XIo_In32(InputPtr) (*(volatile u32 *)(InputPtr)) + + +/*****************************************************************************/ +/** +* +* Performs an output operation for an 8-bit memory location by writing the +* specified value to the the specified address. +* +* @param OutputPtr contains the address to perform the output operation +* at. +* @param Value contains the value to be output at the specified address. +* +* @return None +* +* @note None. +* +******************************************************************************/ +#define XIo_Out8(OutputPtr, Value) \ + (*(volatile u8 *)((OutputPtr)) = (Value)) + +/*****************************************************************************/ +/** +* +* Performs an output operation for a 16-bit memory location by writing the +* specified value to the the specified address. +* +* @param OutputPtr contains the address to perform the output operation +* at. +* @param Value contains the value to be output at the specified address. +* +* @return None +* +* @note None. +* +******************************************************************************/ +#define XIo_Out16(OutputPtr, Value) \ + (*(volatile u16 *)((OutputPtr)) = (Value)) + +/*****************************************************************************/ +/** +* +* Performs an output operation for a 32-bit memory location by writing the +* specified value to the the specified address. +* +* @param OutputPtr contains the address to perform the output operation +* at. +* @param Value contains the value to be output at the specified address. +* +* @return None +* +* @note None. +* +******************************************************************************/ +#define XIo_Out32(OutputPtr, Value) \ + (*(volatile u32 *)((OutputPtr)) = (Value)) + + +/* The following macros allow the software to be transportable across + * processors which use big or little endian memory models. + * + * Defined first is a no-op endian conversion macro. This macro is not to + * be used directly by software. Instead, the XIo_To/FromLittleEndianXX and + * XIo_To/FromBigEndianXX macros below are to be used to allow the endian + * conversion to only be performed when necessary + */ +#define XIo_EndianNoop(Source, DestPtr) (*DestPtr = Source) + +#ifdef XLITTLE_ENDIAN + +#define XIo_ToLittleEndian16 XIo_EndianNoop +#define XIo_ToLittleEndian32 XIo_EndianNoop +#define XIo_FromLittleEndian16 XIo_EndianNoop +#define XIo_FromLittleEndian32 XIo_EndianNoop + +#define XIo_ToBigEndian16(Source, DestPtr) XIo_EndianSwap16(Source, DestPtr) +#define XIo_ToBigEndian32(Source, DestPtr) XIo_EndianSwap32(Source, DestPtr) +#define XIo_FromBigEndian16 XIo_ToBigEndian16 +#define XIo_FromBigEndian32 XIo_ToBigEndian32 + +#else + +#define XIo_ToLittleEndian16(Source, DestPtr) XIo_EndianSwap16(Source, DestPtr) +#define XIo_ToLittleEndian32(Source, DestPtr) XIo_EndianSwap32(Source, DestPtr) +#define XIo_FromLittleEndian16 XIo_ToLittleEndian16 +#define XIo_FromLittleEndian32 XIo_ToLittleEndian32 + +#define XIo_ToBigEndian16 XIo_EndianNoop +#define XIo_ToBigEndian32 XIo_EndianNoop +#define XIo_FromBigEndian16 XIo_EndianNoop +#define XIo_FromBigEndian32 XIo_EndianNoop + +#endif + +/************************** Function Prototypes ******************************/ + +/* The following functions allow the software to be transportable across + * processors which use big or little endian memory models. These functions + * should not be directly called, but the macros XIo_To/FromLittleEndianXX and + * XIo_To/FromBigEndianXX should be used to allow the endian conversion to only + * be performed when necessary. + */ +void XIo_EndianSwap16(u16 Source, u16 *DestPtr); +void XIo_EndianSwap32(u32 Source, u32 *DestPtr); + +/* The following functions handle IO addresses where data must be swapped + * They cannot be implemented as macros + */ +u16 XIo_InSwap16(XIo_Address InAddress); +u32 XIo_InSwap32(XIo_Address InAddress); +void XIo_OutSwap16(XIo_Address OutAddress, u16 Value); +void XIo_OutSwap32(XIo_Address OutAddress, u32 Value); + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */