diff --git a/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.mdd b/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.mdd
index 33ca15c7..ccaaacea 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.mdd
+++ b/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.mdd
@@ -28,13 +28,16 @@
 # in advertising or otherwise to promote the sale, use or other dealings in
 # this Software without prior written authorization from Xilinx.
 #
+# MODIFICATION HISTORY
+#
+# 10.0 6/30/14 Removed support for EDK cores.
 #
 ##############################################################################
 OPTION psf_version = 2.1;
 
 BEGIN driver hwicap
 
-OPTION supported_peripherals = (axi_hwicap_v[2-9]_[0-9][3-9]_[a-z] axi_hwicap_v[0-9]_[0-9]); 
+OPTION supported_peripherals = axi_hwicap_v[0-9]_[0-9]; 
 OPTION driver_state = ACTIVE;
 OPTION copyfiles = all;
 OPTION VERSION = 10.0;
diff --git a/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.tcl b/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.tcl
index b6536493..b8ba96fb 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.tcl
+++ b/XilinxProcessorIPLib/drivers/hwicap/data/hwicap.tcl
@@ -34,42 +34,15 @@
 # -------- ------ -------- ------------------------------------
 # 9.0     adk    12/10/13 Updated as per the New Tcl API's
 # 9.0     bss    02/20/14 Added kintex 8 and kintexu families
+# 10.0	  bss 	 06/24/14 Modified not to generate family.h so that
+#		  	  all families are allowed.
 ##############################################################################
 #--------------------------------
 # Tcl procedure generate 
 #--------------------------------
 
 proc generate {drv_handle} {
-
-    # This returns the C_FAMILY parameter from the processor.
-    # MicroBlaze has C_FAMILY defined, but PowerPC does not.
-    set sw_proc_handle [get_sw_processor]
-    set prochandle [get_cells [get_property HW_INSTANCE $sw_proc_handle] ]
-    set proctype [string tolower [get_property SPECIAL $prochandle]]
-    set family [string tolower [get_property CONFIG.C_FAMILY $prochandle]]
-     
-    # Create a definition in a header file
-    set filename  "./src/xhwicap_family.h"
-    set filehandle [ open $filename a ]
-    ::hsm::utils::write_c_header $filehandle "Device family" 
-    if {[string compare $family "kintex7"] == 0} {
-    	puts $filehandle "#define XHI_FPGA_FAMILY 7\n"   	
-    } elseif {[string compare $family "virtex7"] == 0} {
-	    puts $filehandle "#define XHI_FPGA_FAMILY 8\n"
-    } elseif {[string compare $family "artix7"] == 0} {
-	    puts $filehandle "#define XHI_FPGA_FAMILY 9\n"
-    } elseif {[string compare $family "zynq"] == 0} {
-	    puts $filehandle "#define XHI_FPGA_FAMILY 10\n"
-    } elseif {[string compare $family "kintex8"] == 0} {
-    	    puts $filehandle "#define XHI_FPGA_FAMILY 11\n"
-    } elseif {[string compare $family "kintexu"] == 0} {
-    	    puts $filehandle "#define XHI_FPGA_FAMILY 11\n"
-    } else {
-            puts $filehandle "#define XHI_FPGA_FAMILY 1\n"
-    }
-    close $filehandle
-
-
+    
     # Generate #defines in xparameters.h
     xdefine_include_file $drv_handle "xparameters.h" "XHwIcap" "NUM_INSTANCES" "C_BASEADDR" "C_HIGHADDR" "DEVICE_ID" "C_ICAP_DWIDTH" "C_MODE"
        
diff --git a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_intr_example.c b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_intr_example.c
index 856db305..53893c4f 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_intr_example.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_intr_example.c
@@ -56,6 +56,7 @@
 * 2.00a sv   09/29/07 First release
 * 4.00a hvm  12/1/09  Updated with HAL phase 1 changes
 * 5.00a hvm  2/25/10  Updated with S6 support
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 *
 *</pre>
 ******************************************************************************/
@@ -214,7 +215,6 @@ int HwIcapIntrExample(XIntc *IntcInstancePtr, XHwIcap *HwIcapInstancePtr,
 		return XST_FAILURE;
 	}
 
-
 	/*
 	 * Perform a self-test to ensure that the hardware was built correctly.
 	 */
@@ -235,7 +235,6 @@ int HwIcapIntrExample(XIntc *IntcInstancePtr, XHwIcap *HwIcapInstancePtr,
 		return XST_FAILURE;
 	}
 
-
 	/*
 	 * Setup the handler for the HwIcap that will be called from the
 	 * interrupt context when an HwIcap status occurs, specify a pointer
@@ -245,33 +244,19 @@ int HwIcapIntrExample(XIntc *IntcInstancePtr, XHwIcap *HwIcapInstancePtr,
 	XHwIcap_SetInterruptHandler(HwIcapInstancePtr, HwIcapInstancePtr,
 			 (XHwIcap_StatusHandler)HwIcapIntrHandler);
 
-
-
 	/*
 	 * Initialize the write buffer with pattern to write.
 	 */
 	for (Count = 0; Count < TEST_WRITE_BUFFER_SIZE;) {
 
 		WriteBuffer[Count++] = XHI_DUMMY_PACKET;
-	#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-		WriteBuffer[Count++] = XHI_SYNC_PACKET1;
-		WriteBuffer[Count++] = XHI_SYNC_PACKET2;
-	#else
 		WriteBuffer[Count++] = XHI_SYNC_PACKET;
-	#endif
 		WriteBuffer[Count++] = XHwIcap_Type1Read(XHI_IDCODE) | 1;
 		WriteBuffer[Count++] = XHI_NOOP_PACKET;
 		WriteBuffer[Count++] = XHI_NOOP_PACKET;
-
 		WriteBuffer[Count++] = XHI_DUMMY_PACKET;
-	#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-		WriteBuffer[Count++] = XHI_SYNC_PACKET1;
-		WriteBuffer[Count++] = XHI_SYNC_PACKET2;
-		WriteBuffer[Count++] = XHwIcap_Type1Read(XHI_COR1) | 1;
-	#else
 		WriteBuffer[Count++] = XHI_SYNC_PACKET;
 		WriteBuffer[Count++] = XHwIcap_Type1Read(XHI_COR) | 1;
-	#endif
 		WriteBuffer[Count++] = XHI_NOOP_PACKET;
 		WriteBuffer[Count++] = XHI_NOOP_PACKET;
 	}
@@ -285,16 +270,9 @@ int HwIcapIntrExample(XIntc *IntcInstancePtr, XHwIcap *HwIcapInstancePtr,
 	 * Write the the data to the device.
 	 */
 	TransferInProgress = TRUE;
-	#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	Status = XHwIcap_DeviceWrite(HwIcapInstancePtr,
-					(u16 *) &WriteBuffer[0],
-					TEST_WRITE_BUFFER_SIZE);
-	#else
 	Status = XHwIcap_DeviceWrite(HwIcapInstancePtr,
 					(u32 *) &WriteBuffer[0],
 					TEST_WRITE_BUFFER_SIZE);
-
-	#endif
 	if (Status != XST_SUCCESS)  {
 		return XST_FAILURE;
 	}
@@ -345,7 +323,6 @@ void HwIcapIntrHandler(void *CallBackRef, u32 StatusEvent, u32 ByteCount)
 	}
 }
 
-
 /****************************************************************************/
 /**
 *
@@ -423,7 +400,6 @@ static int HwIcapSetupInterruptSystem(XIntc* IntcInstancePtr,
 	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
 				(Xil_ExceptionHandler) XIntc_InterruptHandler,
 				IntcInstancePtr);
-
 	/*
 	 * Enable non-critical exceptions.
 	 */
diff --git a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_low_level_example.c b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_low_level_example.c
index e147c949..46e2d630 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_low_level_example.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_low_level_example.c
@@ -75,6 +75,7 @@
 *			is added for all devices. This check was earlier done
 *			only for S6 devices
 * 6.00a hvm  08/05/11 Added support for K7 family
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 *
 * </pre>
 *
@@ -102,18 +103,11 @@
 /*
  * Number of words to Read for getting Id code.
  */
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6
-#define HWICAP_IDCODE_SIZE		    2
-#else
 #define HWICAP_IDCODE_SIZE		    1
-#endif
 
 /*
  * Bitstream that reads back ID Code Register
  */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) ||(XHI_FAMILY == XHI_DEV_FAMILY_V5) \
-|| (XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-
 #define HWICAP_EXAMPLE_BITSTREAM_LENGTH     6
 
 static u32 ReadId[HWICAP_EXAMPLE_BITSTREAM_LENGTH] =
@@ -125,25 +119,6 @@ static u32 ReadId[HWICAP_EXAMPLE_BITSTREAM_LENGTH] =
 	XHI_DEVICE_ID_READ, /* Read Product ID Code Register */
 	XHI_NOOP_PACKET, /* Type 1 NO OP */
 };
-#elif XHI_FAMILY == XHI_DEV_FAMILY_S6/* Spartan 6*/
-
-#define HWICAP_EXAMPLE_BITSTREAM_LENGTH     7
-
-static u32 ReadId[HWICAP_EXAMPLE_BITSTREAM_LENGTH] =
-{
-	XHI_DUMMY_PACKET, /* Dummy Word */
-	XHI_SYNC_PACKET1, /* Sync Word*/
-	XHI_SYNC_PACKET2, /* Sync Word*/
-	XHI_NOOP_PACKET, /* Type 1 NO OP */
-	XHI_NOOP_PACKET, /* Type 1 NO OP */
-	XHI_DEVICE_ID_READ, /* Read Product ID Code Register */
-	XHI_NOOP_PACKET, /* Type 1 NO OP */
- };
-#else
-
-#error Unsupported Family of FPGAs
-
-#endif
 
 #define printf  xil_printf           /* A smaller footprint printf */
 
@@ -287,12 +262,6 @@ u32 HwIcapLowLevelExample(u32 BaseAddress, u32 *IdCode)
 	 */
 	*IdCode =  XHwIcap_ReadReg(BaseAddress, XHI_RF_OFFSET);
 
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-
-	*IdCode =  (*IdCode << 16 | (XHwIcap_ReadReg(BaseAddress,
-					XHI_RF_OFFSET)));
-#endif
-
 	return XST_SUCCESS;
 }
 
diff --git a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_config_reg.c b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_config_reg.c
index 0dc41e64..091adf05 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_config_reg.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_config_reg.c
@@ -66,6 +66,7 @@
 * 5.00a hvm  04/28/10 Added support for S6 support.
 * 6.00a hvm  08/05/11 Added support for K7 family
 * 8.01a bss  05/14/12 Replaced the define XHI_C0R_1 with XHI_COR_1 for CR718042
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 * </pre>
 *
 ******************************************************************************/
@@ -78,7 +79,6 @@
 #include <xhwicap.h>
 #include <stdio.h>
 
-
 /************************** Constant Definitions *****************************/
 
 /*
@@ -180,22 +180,11 @@ int HwIcapReadConfigRegExample(u16 DeviceId)
 		printf(" CRC -> \t %x \t\r\n", ConfigRegData);
 	}
 
-#if (XHI_FAMILY != XHI_DEV_FAMILY_S6)
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_FAR, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" FAR -> \t %x \t\r\n", ConfigRegData);
 	}
-#else
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_FAR_MIN, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" FAR_MIN -> \t %x \t\r\n", ConfigRegData);
-	}
 
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_FAR_MAJ, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" FAR_MAJ -> \t %x \t\r\n", ConfigRegData);
-	}
-#endif
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_FDRI, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" FDRI -> \t %x \t\r\n", ConfigRegData);
@@ -231,7 +220,6 @@ int HwIcapReadConfigRegExample(u16 DeviceId)
 		printf(" LOUT -> \t %x \t\r\n", ConfigRegData);
 	}
 
-#if (XHI_FAMILY != XHI_DEV_FAMILY_S6)
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" COR -> \t %x \t\r\n", ConfigRegData);
@@ -245,41 +233,17 @@ int HwIcapReadConfigRegExample(u16 DeviceId)
 		XST_SUCCESS) {
 		printf(" CBC -> \t %x \t\r\n", ConfigRegData);
 	}
+
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_AXSS, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" AXSS -> \t %x \t\r\n", ConfigRegData);
 	}
 
-#else
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR1, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" COR1 -> \t %x \t\r\n", ConfigRegData);
-	}
-
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR2, &ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" COR2 -> \t %x \t\r\n", ConfigRegData);
-	}
-
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_PWRDN_REG,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" PWRDN_REG -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_FLR, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" FLR -> \t %x \t\r\n", ConfigRegData);
-	}
-
-#endif
-
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_IDCODE, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" IDCODE -> \t %x \t\r\n", ConfigRegData);
 	}
 
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) \
-	|| (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 	if (XHwIcap_GetConfigReg(&HwIcap, XHI_COR_1, (u32 *)&ConfigRegData) ==
 		XST_SUCCESS) {
 		printf(" COR_1 -> \t %x \t\r\n", ConfigRegData);
@@ -309,43 +273,6 @@ int HwIcapReadConfigRegExample(u16 DeviceId)
 		printf(" CTL_1 -> \t %x \t\r\n", ConfigRegData);
 	}
 
-#endif
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_CWDT, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" CWDT -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_HC_OPT_REG,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" HC_OPT_REG -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_MODE_REG,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" MODE_REG -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_SEU_OPT, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" SEU_OPT -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_EXP_SIGN,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" EXP_SIGN -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_RDBK_SIGN,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" RDBK_SIGN -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_BOOTSTS, (u32 *)&ConfigRegData) ==
-		XST_SUCCESS) {
-		printf(" BOOTSTS -> \t %x \t\r\n", ConfigRegData);
-	}
-	if (XHwIcap_GetConfigReg(&HwIcap, XHI_EYE_MASK,
-		(u32 *)&ConfigRegData) == XST_SUCCESS) {
-		printf(" EYE_MASK -> \t %x \t\r\n", ConfigRegData);
-	}
-
-#endif
-
 	printf("\r\n HwIcapReadConfigRegExample Passed Successfully.\r\n\r\n");
 
 	return XST_SUCCESS;
diff --git a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_frame_polled_example.c b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_frame_polled_example.c
index c5071d88..a16139cb 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_frame_polled_example.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/examples/xhwicap_read_frame_polled_example.c
@@ -59,6 +59,7 @@
 * 4.00a hvm  11/20/09 Updated to support V6
 * 5.00a hvm  2/20/10  Updated to support S6.
 * 6.00a hvm  08/05/11 Added support for K7 family
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 * </pre>
 *
 ******************************************************************************/
@@ -86,21 +87,11 @@
  * These are the parameters for reading a frame of data in
  * the slice SLICE_X0Y0
  */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5 ) ||\
-	(XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 #define HWICAP_EXAMPLE_TOP		0
 #define HWICAP_EXAMPLE_HCLK		5
 #define HWICAP_EXAMPLE_MAJOR		5
 #define HWICAP_EXAMPLE_MINOR		10
 
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-
-#define HWICAP_EXAMPLE_ROW		5
-#define HWICAP_EXAMPLE_MAJOR		2
-#define HWICAP_EXAMPLE_MINOR		20
-
-#endif
-
 #define printf  xil_printf	/* A smaller footprint printf */
 
 
@@ -165,11 +156,8 @@ int HwIcapReadFramePolledExample(u16 DeviceId)
 	int Status;
 	u32 Index;
 	XHwIcap_Config *CfgPtr;
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	u16  FrameData[XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME];
-#else
 	u32  FrameData[XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME];
-#endif
+
 	/*
 	 * Initialize the HwIcap instance.
 	 */
@@ -191,8 +179,6 @@ int HwIcapReadFramePolledExample(u16 DeviceId)
 		return XST_FAILURE;
 	}
 
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5 ) ||\
-	(XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 	/*
 	 * Read the Frame
 	 */
@@ -203,17 +189,6 @@ int HwIcapReadFramePolledExample(u16 DeviceId)
 					 HWICAP_EXAMPLE_MAJOR,
 					 HWICAP_EXAMPLE_MINOR,
 					 (u32 *) &FrameData[0]);
-
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	Status = XHwIcap_DeviceReadFrame(&HwIcap,
-					 HWICAP_EXAMPLE_BLOCK,
-					 HWICAP_EXAMPLE_ROW,
-					 HWICAP_EXAMPLE_MAJOR,
-					 HWICAP_EXAMPLE_MINOR,
-					 (u16 *) &FrameData[0]);
-
-#endif
-
 	if (Status != XST_SUCCESS) {
 		printf("Failed to Read Frame: %d \r\n", Status);
 		return XST_FAILURE;
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.c b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.c
index 81878378..303ebf98 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.c
@@ -72,6 +72,8 @@
 * 8.01a bss  04/18/13  Updated to fix compiler warnings. CR#704814
 * 9.0   bss  02/20/14  Updated to support Kintex8, kintexu and virtex72000T
 *	 		family devices.
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
+*		      Removed IDCODE lookup logic in XHwIcap_CfgInitialize.
 * </pre>
 *
 *****************************************************************************/
@@ -85,402 +87,6 @@
 
 /************************** Constant Definitions ****************************/
 
-/*
- * This is a list of arrays that contain information about columns interspersed
- * into the CLB columns.  These are DSP, IOB, DCM, and clock tiles.  When these
- * are crossed, the frame address must be incremeneted by an additional count
- * from the CLB column index.  The center tile is skipped twice because it
- * contains both a DCM and a GCLK tile that must be skipped.
- * CXT SKIP column definitions are removed for the V6 devices as the existig
- * V6 Lx definitions are valid for CXT devices also.
- */
-u16 XHI_EMPTY_SKIP_COLS[] = {0xFFFF};
-
-u16 XHI_XC4VLX15_SKIP_COLS[] = {8, 12, 12, 0xFFFF};
-u16 XHI_XC4VLX25_SKIP_COLS[] = {8, 14, 14, 0xFFFF};
-u16 XHI_XC4VLX40_SKIP_COLS[] = {8, 18, 18, 0xFFFF};
-u16 XHI_XC4VLX60_SKIP_COLS[] = {12, 26, 26, 0xFFFF};
-u16 XHI_XC4VLX80_SKIP_COLS[] = {12, 28, 28, 0xFFFF};
-u16 XHI_XC4VLX100_SKIP_COLS[] = {12, 32, 32, 0xFFFF};
-u16 XHI_XC4VLX160_SKIP_COLS[] = {12, 44, 44, 0xFFFF};
-u16 XHI_XC4VLX200_SKIP_COLS[] = {12, 58, 58, 0xFFFF};
-u16 XHI_XC4VSX25_SKIP_COLS[] = {6, 14, 20, 20, 26, 34, 0xFFFF};
-u16 XHI_XC4VSX35_SKIP_COLS[] = {6, 14, 20, 20, 26, 34, 0xFFFF};
-u16 XHI_XC4VSX55_SKIP_COLS[] = {6, 10, 14, 18, 24, 24, 30, 34, 38,
-                                  42, 0xFFFF};
-u16 XHI_XC4VFX12_SKIP_COLS[] = {12, 12, 16, 0xFFFF};
-u16 XHI_XC4VFX20_SKIP_COLS[] = {6, 18, 18, 22, 30, 0xFFFF};
-u16 XHI_XC4VFX40_SKIP_COLS[] = {6, 26, 26, 38, 46, 0xFFFF};
-u16 XHI_XC4VFX60_SKIP_COLS[] = {6, 18, 26, 26, 34, 46, 0xFFFF};
-u16 XHI_XC4VFX100_SKIP_COLS[] = {6, 22, 34, 34, 46, 62, 0xFFFF};
-u16 XHI_XC4VFX140_SKIP_COLS[] = {6, 22, 42, 42, 62, 78, 0xFFFF};
-
-
-u16 XHI_XC5VLX30_SKIP_COLS[] = {4, 6, 14, 14, 22, 26, 0xFFFF};
-u16 XHI_XC5VLX50_SKIP_COLS[] = {4, 6, 14, 14, 22, 26, 0xFFFF};
-u16 XHI_XC5VLX85_SKIP_COLS[] = {4, 14, 16, 24, 24, 36, 46, 50, 0xFFFF};
-u16 XHI_XC5VLX110_SKIP_COLS[] = {4, 14, 16, 24, 24, 36, 46, 50, 0xFFFF};
-u16 XHI_XC5VLX220_SKIP_COLS[] = {4, 26, 28, 30, 32, 52, 52, 72, 78, 100,
-				104, 0xFFFF};
-u16 XHI_XC5VLX330_SKIP_COLS[] = {4, 26, 28, 30, 32, 52, 52, 72, 78, 100,
-				104, 0xFFFF};
-u16 XHI_XC5VLX30T_SKIP_COLS[] = {4, 6, 14, 14, 22, 26, 0xFFFF};
-u16 XHI_XC5VLX50T_SKIP_COLS[] = {4, 6, 14, 14, 22, 26, 0xFFFF};
-u16 XHI_XC5VLX85T_SKIP_COLS[] = {4, 14, 16, 24, 24, 36, 46, 50, 0xFFFF};
-u16 XHI_XC5VLX110T_SKIP_COLS[] = {4, 14, 16, 24, 24, 36, 46, 50, 0xFFFF};
-u16 XHI_XC5VLX220T_SKIP_COLS[] = {4, 26, 28, 30, 32, 52, 52, 72, 78, 100,
-				104, 0xFFFF};
-u16 XHI_XC5VLX330T_SKIP_COLS[] = {4, 26, 28, 30, 32, 52, 52, 72, 78, 100,
-				104, 0xFFFF};
-u16 XHI_XC5VSX35T_SKIP_COLS[] = {4, 6, 8, 10, 12, 14, 16, 18, 18, 20, 22,
-				24, 26, 30, 0xFFFF};
-u16 XHI_XC5VSX50T_SKIP_COLS[] = {4, 6, 8, 10, 12, 14, 16, 18, 18, 20, 22,
-				24, 26, 30, 0xFFFF};
-u16 XHI_XC5VSX95T_SKIP_COLS[] = {4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24,
-				24, 26, 28, 30, 32, 34, 36, 38, 42, 0xFFFF};
-u16 XHI_XC5VFX30T_SKIP_COLS[] = {4, 10, 16, 20, 20, 24, 26, 28, 30, 34, 0xFFFF};
-u16 XHI_XC5VFX70T_SKIP_COLS[] = {4, 10, 16, 20, 20, 24, 26, 28, 30, 34, 0xFFFF};
-u16 XHI_XC5VFX100T_SKIP_COLS[] = {4, 10, 16, 22, 24, 26, 28, 32, 32, 36,
-				38, 40, 42, 48, 52, 0xFFFF};
-u16 XHI_XC5VFX130T_SKIP_COLS[] = {4, 10, 16, 22, 24, 26, 28, 32, 32, 36,
-				38, 40, 42, 48, 52, 0xFFFF};
-u16 XHI_XC5VFX200T_SKIP_COLS[] = {4, 10, 16, 22, 28, 30, 32, 34, 38, 38, 42, 44,
-				46, 48, 54, 60, 64, 0xFFFF};
-
-/* V6 devices Skip column information */
-u16 XHI_XC6VHX250T_SKIP_COLS[] = {5, 10, 13, 18, 27, 30, 35, 38, 43, 54, 59,
-				64, 67, 72, 75, 84, 89, 92, 97, 105, 106,
-				0xFFFF};
-
-u16 XHI_XC6VHX255T_SKIP_COLS[] = {5, 10, 13, 18, 27, 30, 35, 38, 43, 54, 59,
-				64, 67, 72, 75, 84, 89, 92, 97, 105, 106,
-				0xFFFF};
-
-u16 XHI_XC6VHX380T_SKIP_COLS[] = {5, 10, 13, 18, 27, 30, 35, 38, 43, 54, 59,
-				64, 67, 72, 75, 84, 89, 92, 97, 105, 106,
-				0xFFFF};
-
-u16 XHI_XC6VHX565T_SKIP_COLS[] = {5, 10, 13, 22, 39, 48, 51, 56, 59, 64, 75,
-				80, 85, 88, 93, 96, 105, 122, 131, 134,
-				139, 147, 148, 0xFFFF};
-
-u16 XHI_XC6VLX75T_SKIP_COLS[] = {5, 8, 13, 16, 19, 22, 25, 36, 41, 44, 47,
-				50, 53, 58, 61, 69, 70, 0xFFFF};
-
-u16 XHI_XC6VLX130T_SKIP_COLS[] = {5, 8, 13, 16, 19, 22, 25, 36, 41, 44, 47,
-				50, 53, 58, 61, 69, 70, 0xFFFF};
-
-u16 XHI_XC6VLX195T_SKIP_COLS[] = {5, 8, 13, 16, 25, 28, 33, 36, 41, 52, 57,
-				62, 65, 70, 73, 82, 85, 90, 93, 101, 102,
-				0xFFFF};
-
-u16 XHI_XC6VLX240T_SKIP_COLS[] = {5, 8, 13, 16, 25, 28, 33, 36, 41, 52, 57,
-				62, 65, 70, 73, 82, 85, 90, 93, 101, 102,
-				0xFFFF};
-
-u16 XHI_XC6VLX365T_SKIP_COLS[] = {5, 8, 21, 24, 33, 50, 53, 58, 69, 74, 79,
-				82, 99, 108, 111, 124, 127, 132, 140, 141,
-				0xFFFF};
-
-u16 XHI_XC6VLX550T_SKIP_COLS[] = {5, 8, 21, 24, 33, 50, 53, 58, 69, 74, 79,
-				82, 99, 108, 111, 124, 127, 132, 140, 141,
-				0xFFFF};
-
-u16 XHI_XC6VLX760_SKIP_COLS[] = {5, 8, 33, 36, 45, 70, 77, 80, 85, 96, 101,
-				106, 109, 116, 141, 150, 153, 178, 181, 186,
-				0xFFFF};
-
-u16 XHI_XC6VSX315T_SKIP_COLS[] = {5, 8, 13, 16, 21, 24, 29, 32, 37, 40, 45,
-				48, 51, 54, 59, 70, 75, 80, 83, 86, 89, 94,
-				97, 102,105, 110, 113, 118, 121, 126, 129,
-				137, 138, 0xFFFF};
-
-u16 XHI_XC6VSX475T_SKIP_COLS[] = {5, 8, 13, 16, 21, 24, 29, 32, 37, 40, 45,
-				48, 51, 54, 59, 70, 75, 80, 83, 86, 89, 94,
-				97, 102,105, 110, 113, 118, 121, 126, 129,
-				137, 138, 0xFFFF};
-
-
-u16 XHI_XC6SLX4_SKIP_COLS[] = {3, 6, 9, 0xFFFF};
-
-u16 XHI_XC6SLX9_SKIP_COLS[] = {3, 6, 9, 14, 0xFFFF};
-
-u16 XHI_XC6SLX16_SKIP_COLS[] = {3, 6, 12, 19, 22, 0xFFFF};
-
-u16 XHI_XC6SLX25_SKIP_COLS[] = {3, 6, 12, 19, 28, 31, 0xFFFF};
-
-u16 XHI_XC6SLX45_SKIP_COLS[] = {3, 6, 12, 19, 26, 32, 35, 0xFFFF};
-
-u16 XHI_XC6SLX45T_SKIP_COLS[] = {3, 6, 12, 19, 26, 32, 35, 0xFFFF};
-
-u16 XHI_XC6SLX75_SKIP_COLS[] = {3, 8, 14, 21, 27, 33, 36, 39, 0xFFFF};
-
-u16 XHI_XC6SLX100_SKIP_COLS[] = {3, 6, 11, 15, 21, 28, 35, 41, 46, 51, 54,
-				 0xFFFF};
-
-u16 XHI_XC6SLX150_SKIP_COLS[] = {3, 6, 17, 21, 27, 40, 51, 57, 61, 70, 73,
-				 0xFFFF};
-
-/* Device details look up table  */
-
-const DeviceDetails DeviceDetaillkup[] = {
-
-	/* Virtex4 devices */
-
-	{ XHI_XC4VLX15, 24, 64, 3, 1, 3, 0, 4, XHI_XC4VLX15_SKIP_COLS },
-
-	{ XHI_XC4VLX25, 28, 96, 3, 1, 3, 0, 6, XHI_XC4VLX25_SKIP_COLS },
-
-	{ XHI_XC4VLX40,	36, 128, 3, 1, 3, 0, 8, XHI_XC4VLX40_SKIP_COLS },
-
-	{ XHI_XC4VLX60, 52, 128, 5, 1, 3, 0, 8, XHI_XC4VLX60_SKIP_COLS },
-
-	{ XHI_XC4VLX80, 56, 160, 5, 1, 3, 0, 10, XHI_XC4VLX80_SKIP_COLS },
-
-	{ XHI_XC4VLX100,64, 192, 5, 1, 3, 0, 12, XHI_XC4VLX100_SKIP_COLS },
-
-	{ XHI_XC4VLX160, 88, 192, 6, 1, 3, 0, 12, XHI_XC4VLX160_SKIP_COLS },
-
-	{ XHI_XC4VLX200, 116, 192, 7, 1, 3, 0, 12, XHI_XC4VLX200_SKIP_COLS },
-
-	{ XHI_XC4VSX25,  40, 64, 8, 4, 3, 0, 4, XHI_XC4VSX25_SKIP_COLS },
-
-	{ XHI_XC4VSX35,  40, 96, 8, 4, 3, 0, 6, XHI_XC4VSX35_SKIP_COLS },
-
-	{ XHI_XC4VSX55, 48, 128, 10, 8, 3, 0, 8, XHI_XC4VSX55_SKIP_COLS },
-
-	{ XHI_XC4VFX12, 24, 64, 3, 1, 3, 0, 4, XHI_XC4VFX12_SKIP_COLS },
-
-	{ XHI_XC4VFX20, 36, 64, 5, 1, 3, 2, 4, XHI_XC4VFX20_SKIP_COLS },
-
-	{ XHI_XC4VFX40, 52, 96, 7, 1, 3, 2, 6, XHI_XC4VFX40_SKIP_COLS },
-
-	{ XHI_XC4VFX60, 52, 128, 8, 2, 3, 2, 8, XHI_XC4VFX60_SKIP_COLS },
-
-	{ XHI_XC4VFX100, 68, 160, 10, 2, 3, 2, 10, XHI_XC4VFX100_SKIP_COLS },
-
-	{ XHI_XC4VFX140, 84, 192, 12, 2, 3, 2, 12, XHI_XC4VFX140_SKIP_COLS },
-
-	/* Virtex5 devices.  Array index is 17 for the first V5 device*/
-
-	{ XHI_XC5VLX30, 30, 80, 2, 1, 2, 0, 4, XHI_XC5VLX30_SKIP_COLS },
-
-	{ XHI_XC5VLX50, 30, 120, 2, 1, 2, 0, 6, XHI_XC5VLX50_SKIP_COLS },
-
-	{ XHI_XC5VLX85, 54, 120, 4, 1, 2, 0, 6, XHI_XC5VLX85_SKIP_COLS },
-
-	{ XHI_XC5VLX110, 54, 160, 4, 1, 2, 0, 8, XHI_XC5VLX110_SKIP_COLS },
-
-	{ XHI_XC5VLX220, 108, 160, 6, 2, 2, 0, 8, XHI_XC5VLX220_SKIP_COLS },
-
-	{ XHI_XC5VLX330, 108, 240, 6, 2, 2, 0, 12, XHI_XC5VLX330_SKIP_COLS },
-
-	{ XHI_XC5VLX30T, 30, 80, 3, 1, 2, 1, 4, XHI_XC5VLX30T_SKIP_COLS },
-
-	{ XHI_XC5VLX50T, 30, 120, 3, 1, 2, 1, 6, XHI_XC5VLX50T_SKIP_COLS },
-
-	{ XHI_XC5VLX85T, 54, 120, 5, 1, 2, 1, 6, XHI_XC5VLX85T_SKIP_COLS },
-
-	{ XHI_XC5VLX110T, 54, 160, 5, 1, 2, 1, 8, XHI_XC5VLX110T_SKIP_COLS },
-
-	{ XHI_XC5VLX220T, 108, 160, 7, 2, 2, 1, 8, XHI_XC5VLX220T_SKIP_COLS },
-
-	{ XHI_XC5VLX330T, 108, 240, 7, 2, 2, 1, 12, XHI_XC5VLX330T_SKIP_COLS },
-
-	{ XHI_XC5VSX35T, 34, 80, 6, 6, 2, 1, 4, XHI_XC5VSX35T_SKIP_COLS },
-
-	{ XHI_XC5VSX50T, 34, 120, 6, 6, 2, 1, 6, XHI_XC5VSX50T_SKIP_COLS },
-
-	{ XHI_XC5VSX95T, 46, 160, 7, 10, 2, 1, 8, XHI_XC5VSX95T_SKIP_COLS },
-
-	{ XHI_XC5VFX30T, 38, 80, 5, 2, 2, 1, 4, XHI_XC5VFX30T_SKIP_COLS },
-
-	{ XHI_XC5VFX70T, 38, 160, 5, 2, 2, 1, 8, XHI_XC5VFX70T_SKIP_COLS },
-
-	{ XHI_XC5VFX100T, 56, 160, 8, 4, 2, 1, 8, XHI_XC5VFX100T_SKIP_COLS },
-
-	{ XHI_XC5VFX130T, 56, 200, 8, 4, 3, 1, 10, XHI_XC5VFX130T_SKIP_COLS },
-
-	{ XHI_XC5VFX200T, 68, 240, 10, 4, 3, 1, 12, XHI_XC5VFX200T_SKIP_COLS },
-
-	/* Virtex6 devices. Array index is 37 for the first V6 device */
-
-	{ XHI_XC6VHX250T, 85, 240, 11, 6, 2, 2, 6, XHI_XC6VHX250T_SKIP_COLS },
-
-	{ XHI_XC6VHX255T, 85, 240, 11, 6, 2, 2, 6, XHI_XC6VHX255T_SKIP_COLS },
-
-	{ XHI_XC6VHX380T, 85, 360, 11, 6, 2, 2, 9, XHI_XC6VHX380T_SKIP_COLS },
-
-	{ XHI_XC6VHX565T, 125, 360, 13, 6, 2, 2, 9, XHI_XC6VHX565T_SKIP_COLS },
-
-	{ XHI_XC6VLX75T, 53, 120, 7, 5, 3, 1, 3, XHI_XC6VLX75T_SKIP_COLS },
-
-	{ XHI_XC6VLX130T, 53, 200, 7, 6, 3, 1, 3, XHI_XC6VLX130T_SKIP_COLS },
-
-	{ XHI_XC6VLX195T, 81, 200, 9, 8, 3, 1, 5, XHI_XC6VLX195T_SKIP_COLS },
-
-	{ XHI_XC6VLX240T, 81, 240, 9, 8, 3, 1, 6, XHI_XC6VLX240T_SKIP_COLS },
-
-	{ XHI_XC6VLX365T, 121, 240, 9, 6, 4, 1, 6, XHI_XC6VLX365T_SKIP_COLS },
-
-	{ XHI_XC6VLX550T, 121, 360, 9, 6, 4, 1, 9, XHI_XC6VLX550T_SKIP_COLS },
-
-	{ XHI_XC6VLX760, 121, 360, 10, 6, 4, 0, 9, XHI_XC6VLX760_SKIP_COLS },
-
-	{ XHI_XC6VSX315T, 105, 240, 15, 14, 3, 1, 6, XHI_XC6VSX315T_SKIP_COLS},
-
-	{ XHI_XC6VSX475T, 105, 360, 15, 14, 3, 1, 9, XHI_XC6VSX475T_SKIP_COLS},
-
-	{ XHI_XC6VCX75T, 53, 120, 7, 5, 3, 1, 3, XHI_XC6VLX75T_SKIP_COLS },
-
-	{ XHI_XC6VCX130T, 53, 200, 7, 6, 3, 1, 3, XHI_XC6VLX130T_SKIP_COLS },
-
-	{ XHI_XC6VCX195T, 81, 200, 9, 8, 3, 1, 5, XHI_XC6VLX195T_SKIP_COLS },
-
-	{ XHI_XC6VCX240T, 81, 240, 9, 8, 3, 1, 6, XHI_XC6VLX240T_SKIP_COLS },
-
-	/* Spartan6 devices. Array index is 54 for the first S6 device */
-
-	{ XHI_XC6SLX4, 5, 64, 1, 1, 0, 1, 0, XHI_XC6SLX4_SKIP_COLS },
-
-	{ XHI_XC6SLX9, 12, 64, 2, 1, 0, 1, 0, XHI_XC6SLX9_SKIP_COLS },
-
-	{ XHI_XC6SLX16, 19, 64, 2, 2, 0, 1, 0, XHI_XC6SLX16_SKIP_COLS },
-
-	{ XHI_XC6SLX25, 27, 80, 3, 2, 0, 1, 0, XHI_XC6SLX25_SKIP_COLS },
-
-	{ XHI_XC6SLX25T, 27, 80, 3, 2, 0, 1, 0, XHI_XC6SLX25_SKIP_COLS },
-
-	{ XHI_XC6SLX45, 30, 128, 4, 2, 0, 1, 0, XHI_XC6SLX45_SKIP_COLS },
-
-	{ XHI_XC6SLX45T, 30, 128, 4, 2, 0, 1, 0, XHI_XC6SLX45_SKIP_COLS },
-
-	{ XHI_XC6SLX75, 34, 192, 4, 3, 0, 1, 0, XHI_XC6SLX75_SKIP_COLS },
-
-	{ XHI_XC6SLX75T, 34, 192, 4, 3, 0, 1, 0, XHI_XC6SLX75_SKIP_COLS },
-
-	{ XHI_XC6SLX100, 45, 192, 6, 4, 0, 1, 0, XHI_XC6SLX100_SKIP_COLS },
-
-	{ XHI_XC6SLX100T, 45, 192, 6, 4, 0, 1, 0, XHI_XC6SLX100_SKIP_COLS },
-
-	{ XHI_XC6SLX150, 64, 192, 6, 4, 0, 1, 0, XHI_XC6SLX150_SKIP_COLS },
-
-	{ XHI_XC6SLX150T, 64, 192, 6, 4, 0, 1, 0, XHI_XC6SLX150_SKIP_COLS },
-
-	/*
-	 * Kintex7 devices. Array index is 67 for the first K7 device
-	 * The details of the rows, cloumns etc. are not filled  as
-	 * the related support is not added in the driver. The data
-	 * will be populated whenever the support for writing into a CLB
-	 * is implemented.
-	 */
-	{ XHI_XC7K30T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K70T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K160T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K325T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K410T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K235T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K125T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K290T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K355T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K420T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	{ XHI_XC7K480T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-
-	/*
-	 * Virtex7 devices. Array index is 78 for the first V7 device
-	 * The details of the rows, cloumns etc. are not filled  as
-	 * the related support is not added in the driver. The data
-	 * will be populated whenever the support for writing into a CLB
-	 * is implemented.
-	 */
-
-	 { XHI_XC7VX80T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX82T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX330T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX415T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7V450T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX485T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX550T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7V585T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX690T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX980T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX2000T_SLR0, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX2000T_SLR1, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX2000T_SLR2, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7VX2000T_SLR3, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	/*
-	 * Artix7 devices. Array index is 88 for the first V7 device
-	 * The details of the rows, cloumns etc. are not filled  as
-	 * the related support is not added in the driver. The data
-	 * will be populated whenever the support for writing into a CLB
-	 * is implemented.
-	 */
-
-	 { XHI_XC7A15, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7A30T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7A50T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7A100T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7A200T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 { XHI_XC7A350T, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	 /*
-	  * Zynq devices. Array index is 94 for the first V7 device
-	  * The details of the rows, cloumns etc. are not filled  as
-	  * the related support is not added in the driver. The data
-	  * will be populated whenever the support for writing into a CLB
-	  * is implemented.
-	  */
-
-	  { XHI_XC7Z010, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	  { XHI_XC7Z020, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	  { XHI_XC7Z030, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-   	  { XHI_XC7Z045, 0, 0, 0, 0, 0, 0, 0, 0 },
-
-	/*
-	 * Kintex8 devices. Array index is 98 for the first K8 device
-	 * The details of the rows, cloumns etc. are not filled  as
-	 * the related support is not added in the driver. The data
-	 * will be populated whenever the support for writing into a CLB
-	 * is implemented.
-	 */
-
-   	 { XHI_XCKU040T, 0, 0, 0, 0, 0, 0, 0, 0 }
-};
-
-
 /**************************** Type Definitions ******************************/
 
 
@@ -582,89 +188,20 @@ int XHwIcap_CfgInitialize(XHwIcap *InstancePtr, XHwIcap_Config *ConfigPtr,
 
 	DeviceIdCode = DeviceIdCode & XHI_DEVICE_ID_CODE_MASK;
 
-#if (XHI_FAMILY != XHI_DEV_FAMILY_S6)
+	if ((DeviceIdCode == XHI_DEVICE_ID_CODE_MASK) ||
+			(DeviceIdCode == 0x0)) {
+		return XST_FAILURE;
+	}
+
+
 	Status = XHwIcap_CommandDesync(InstancePtr);
 	InstancePtr->IsReady = 0;
 	if (Status != XST_SUCCESS) {
 		return XST_FAILURE;
 	}
-#endif
-
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-
-	DeviceIdIndex = 0;
-	NumDevices = XHI_V4_NUM_DEVICES;
-
-#elif XHI_FAMILY == XHI_DEV_FAMILY_V5 /* Virtex5 */
-
-	DeviceIdIndex = XHI_V4_NUM_DEVICES;
-	NumDevices = XHI_V5_NUM_DEVICES;
-
-#elif XHI_FAMILY == XHI_DEV_FAMILY_V6 /* Virtex6 */
-
-	DeviceIdIndex = XHI_V4_NUM_DEVICES +  XHI_V5_NUM_DEVICES;
-	NumDevices = XHI_V6_NUM_DEVICES;
-
-#elif XHI_FAMILY == XHI_DEV_FAMILY_S6 /* Spartan6 */
-
-	DeviceIdIndex = XHI_V4_NUM_DEVICES +  XHI_V5_NUM_DEVICES +
-			XHI_V6_NUM_DEVICES;
-	NumDevices = XHI_S6_NUM_DEVICES;
-
-#elif XHI_FAMILY == XHI_DEV_FAMILY_7SERIES /* 7Series */
-
-	DeviceIdIndex = XHI_V4_NUM_DEVICES +  XHI_V5_NUM_DEVICES +
-			XHI_V6_NUM_DEVICES +  XHI_S6_NUM_DEVICES;
-	NumDevices = XHI_K7_NUM_DEVICES + XHI_V7_NUM_DEVICES +
-			XHI_A7_NUM_DEVICES + XHI_ZYNQ_NUM_DEVICES +
-			XHI_K8_NUM_DEVICES;
-#endif
-	/*
-	 * Find the device index
-	 */
-	for (IndexCount = 0; IndexCount < NumDevices; IndexCount++) {
-
-		if (DeviceIdCode == DeviceDetaillkup[DeviceIdIndex +
-					IndexCount]. DeviceIdCode) {
-			DeviceIdIndex += IndexCount;
-			DeviceFound = TRUE;
-			break;
-		}
-	}
-
-	if (DeviceFound != TRUE) {
-
-		return XST_FAILURE;
-
-	}
-	InstancePtr->DeviceIdCode = DeviceDetaillkup[DeviceIdIndex].
-					DeviceIdCode;
-
-	InstancePtr->Rows = DeviceDetaillkup[DeviceIdIndex].Rows;
-	InstancePtr->Cols = DeviceDetaillkup[DeviceIdIndex].Cols;
-	InstancePtr->BramCols = DeviceDetaillkup[DeviceIdIndex].BramCols;
-
-	InstancePtr->DSPCols = DeviceDetaillkup[DeviceIdIndex].DSPCols;
-	InstancePtr->IOCols = DeviceDetaillkup[DeviceIdIndex].IOCols;
-	InstancePtr->MGTCols = DeviceDetaillkup[DeviceIdIndex].MGTCols;
-
-	InstancePtr->HClkRows = DeviceDetaillkup[DeviceIdIndex].HClkRows;
-	InstancePtr->SkipCols = DeviceDetaillkup[DeviceIdIndex].SkipCols;
 
 	InstancePtr->BytesPerFrame = XHI_NUM_FRAME_BYTES;
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	/*
-	 * In Spartan6 devices the word is defined as 16 bit
-	 */
-	InstancePtr->WordsPerFrame = (InstancePtr->BytesPerFrame/2);
-#else
 	InstancePtr->WordsPerFrame = (InstancePtr->BytesPerFrame/4);
-#endif
-	InstancePtr->ClbBlockFrames = (4 +22*2 + 4*2 + 22*InstancePtr->Cols);
-	InstancePtr->BramBlockFrames = (64*InstancePtr->BramCols);
-	InstancePtr->BramIntBlockFrames = (22*InstancePtr->BramCols);
-
 	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
 
 	/*
@@ -711,14 +248,8 @@ int XHwIcap_CfgInitialize(XHwIcap *InstancePtr, XHwIcap_Config *ConfigPtr,
 *		of data to the ICAP device.
 *
 *****************************************************************************/
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u16 *FrameBuffer, u32 NumWords)
-#else
 int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
-#endif
 {
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
 	u32 Index; /* Array Index */
 #if XPAR_HWICAP_0_ICAP_DWIDTH == 8
 	u8 Fifo[NumWords*4];
@@ -730,8 +261,6 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 			 to overcome compiler warnings */
 #endif
 
-#endif
-
 #if (XPAR_HWICAP_0_MODE == 0)
 	u32 WrFifoVacancy;
 	u32 IntrStatus;
@@ -767,9 +296,6 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 	 */
 	XHwIcap_IntrGlobalDisable(InstancePtr);
 
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
-
 	/* 16 bit */
 	if(InstancePtr->HwIcapConfig.IcapWidth == 16)
 	{
@@ -802,27 +328,21 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 		InstancePtr->SendBufferPtr = &Fifo[0];
 
 	}
-
-#endif
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_S6) || (XPAR_HWICAP_0_ICAP_DWIDTH == 32)\
-|| (XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-
-	/*
-	 * Set up the buffer pointer and the words to be transferred.
-	 */
-	InstancePtr->SendBufferPtr = FrameBuffer;
-	InstancePtr->RequestedWords = NumWords;
-	InstancePtr->RemainingWords = NumWords;
-
-#endif
+	else
+	{
+		/*
+		 * Set up the buffer pointer and the words to be transferred.
+		 */
+		InstancePtr->SendBufferPtr = FrameBuffer;
+		InstancePtr->RequestedWords = NumWords;
+		InstancePtr->RemainingWords = NumWords;
+	}
 
 	/*
 	 * Fill the FIFO with as many words as it will take (or as many as we
 	 * have to send.
 	 */
 
-
 #if (XPAR_HWICAP_0_MODE == 1)
 	 /* If Lite Mode then write one by one word in WriteFIFO register */
 	while (InstancePtr->RemainingWords > 0) {
@@ -866,7 +386,6 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 
 	while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
 				XHI_CR_OFFSET)) & XHI_CR_WRITE_MASK);
-
 	/*
 	 * Check if there is more data to be written to the ICAP
 	 */
@@ -926,11 +445,9 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 				InstancePtr->IsTransferInProgress = FALSE;
 				InstancePtr->RequestedWords = 0x0;
 			}
-
 		}
 
 	else {
-
 		/*
 		 * Clear the flag to indicate the write has been done
 		 */
@@ -940,7 +457,6 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 	}
 
 #endif
-
 	return XST_SUCCESS;
 }
 
@@ -967,27 +483,14 @@ int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 * @note		This is a blocking function.
 *
 *****************************************************************************/
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u16 *FrameBuffer, u32 NumWords)
-#else
 int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
-#endif
 {
-
 	u32 Retries = 0;
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	u16 *Data = FrameBuffer;
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_V6) ||\
-(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
 	u32 Index = 0; /* Array Index */
 #if XPAR_HWICAP_0_ICAP_DWIDTH == 8
 	u8 Data[NumWords*4];
 #elif XPAR_HWICAP_0_ICAP_DWIDTH == 16
 	u16 Data[NumWords*2];
-#else
-	u32 *Data = FrameBuffer;
-#endif
-
 #else
 	u32 *Data = FrameBuffer;
 #endif
@@ -1021,8 +524,6 @@ int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 	 */
 	InstancePtr->IsTransferInProgress = TRUE;
 
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
-
 	/* 8 bit */
 	if(InstancePtr->HwIcapConfig.IcapWidth == 8)
 	{
@@ -1040,35 +541,24 @@ int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 
 	/* 32 bit */
 	else {
-
 		InstancePtr->RequestedWords = NumWords;
 		InstancePtr->RemainingWords = NumWords;
 		XHwIcap_SetSizeReg(InstancePtr, NumWords);
 	}
 
-
-#else
-
-	InstancePtr->RequestedWords = NumWords;
-	InstancePtr->RemainingWords = NumWords;
-	XHwIcap_SetSizeReg(InstancePtr, NumWords);
-
-#endif
-
 	XHwIcap_StartReadBack(InstancePtr);
 
 	/*
 	 * Read the data from the Read FIFO into the buffer provided by
 	 * the user.
 	 */
+
 	/* As long as there is still data to read... */
 	while (InstancePtr->RemainingWords > 0) {
 		/* Wait until we have some data in the fifo. */
-
-			while(RdFifoOccupancy == 0) {
+		while(RdFifoOccupancy == 0) {
 			RdFifoOccupancy =
 			XHwIcap_GetRdFifoOccupancy(InstancePtr);
-
 			Retries++;
 			if (Retries > XHI_MAX_RETRIES) {
 				break;
@@ -1077,39 +567,29 @@ int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
 
 		/* Read the data from the Read FIFO. */
 
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_S6) || (XPAR_HWICAP_0_ICAP_DWIDTH == 32)\
-|| (XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-		while((RdFifoOccupancy != 0) &&
-				(InstancePtr->RemainingWords > 0)) {
-			*Data++ = XHwIcap_FifoRead(InstancePtr);
-			InstancePtr->RemainingWords--;
-			RdFifoOccupancy--;
-		}
-
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_V6) ||\
-(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
-	/* 8/16 bit */
-	if((InstancePtr->HwIcapConfig.IcapWidth == 8) ||
+		/* 8/16 bit */
+		if((InstancePtr->HwIcapConfig.IcapWidth == 8) ||
 				(InstancePtr->HwIcapConfig.IcapWidth == 16)) {
-
-		while((RdFifoOccupancy != 0) &&
-			(InstancePtr->RemainingWords > 0)) {
-			Data[Index] = XHwIcap_FifoRead(InstancePtr);
-			InstancePtr->RemainingWords--;
-			RdFifoOccupancy--;
-			Index++;
+			while((RdFifoOccupancy != 0) &&
+					(InstancePtr->RemainingWords > 0)) {
+				Data[Index] = XHwIcap_FifoRead(InstancePtr);
+				InstancePtr->RemainingWords--;
+				RdFifoOccupancy--;
+				Index++;
+			}
+		}
+		else {
+			while((RdFifoOccupancy != 0) &&
+					(InstancePtr->RemainingWords > 0)) {
+				*Data++ = XHwIcap_FifoRead(InstancePtr);
+				InstancePtr->RemainingWords--;
+				RdFifoOccupancy--;
+			}
 		}
 	}
-
-#endif
-
-}
-
-while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
-					XHI_CR_OFFSET)) &
-					XHI_CR_READ_MASK);
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
+	while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
+			XHI_CR_OFFSET)) &
+			XHI_CR_READ_MASK);
 
 	/* 8 bit */
 	if(InstancePtr->HwIcapConfig.IcapWidth == 8)
@@ -1121,9 +601,7 @@ while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
 			*FrameBuffer = *FrameBuffer | Data[Index + 3];
 			FrameBuffer++;
 		}
-
 	}
-
 	/* 16 bit */
 	else if(InstancePtr->HwIcapConfig.IcapWidth == 16)
 	{
@@ -1133,7 +611,6 @@ while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
 			FrameBuffer++;
 		}
 	}
-#endif
 
 	/*
 	 * If the requested number of words have not been read from
@@ -1143,7 +620,6 @@ while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
 		return XST_FAILURE;
 	}
 
-
 	InstancePtr->IsTransferInProgress = FALSE;
 	InstancePtr->RequestedWords = 0x0;
 
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.h b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.h
index 9bb7918a..a8cfd99e 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.h
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap.h
@@ -153,6 +153,14 @@
 * 9.0   bss  02/20/14 Modified xhwicap.c, xhwicap_l.h, xhwicap_i.h and tcl
 *		      to support Kintex8, kintexu and virtex72000T family
 *		      devices.
+* 10.0  bss  6/24/14  Removed support for families older than 7 series.
+*		      Modified driver tcl not to generate family.h.
+*		      Removed IDCODE lookup logic in XHwIcap_CfgInitialize
+*		      in xhwicap.c.
+*		      Removed IDCODE macros from xhwicap_i.h.
+*		      Removed xhwicap_ff.h and xhwicap_lut.h examples.
+*		      Removed xhwicap_clb_ff.h, xhwicap_clb_lut.h and
+*		      xhwicap_clb_srinv.h files from driver.
 *
 * </pre>
 *
@@ -212,20 +220,6 @@ typedef struct {
 
 } XHwIcap_Config;
 
-typedef struct  {
-
-	u32 DeviceIdCode;	     /**< IDCODE of targeted device */
-	u32 Cols;		     /**< Number of CLB cols */
-	u32 Rows;		     /**< Number of CLB rows */
-	u32 BramCols;		     /**< Number of BRAM cols */
-	u8  DSPCols;		     /**< Number of DSP cols for V4/V5/V6 */
-	u8  IOCols;		     /**< Number of IO cols for V4/V5/V6 */
-	u8  MGTCols;		     /**< Number of MGT cols for V4/V5/V6 */
-	u8  HClkRows;		     /**< Number of HClk cols for V4/V5/V6 */
-	u16 *SkipCols;		     /**< Columns to skip for CLB Col */
-
-} DeviceDetails;
-
  /**
   * The XHwIcap driver instance data. The user is required to allocate a
   * variable of this type for every HwIcap device in the system. A pointer
@@ -236,41 +230,15 @@ typedef struct {
 	u32 IsReady;		     /**< Device is initialized and ready */
 	int IsPolled;		     /**< Device is in polled mode */
 	u32 DeviceIdCode;	     /**< IDCODE of targeted device */
-	u32 Rows;		     	/**< Number of CLB rows */
-	u32 Cols;		     		/**< Number of CLB cols */
-	u32 BramCols;		     /**< Number of BRAM cols */
 	u32 BytesPerFrame;	     /**< Number of Bytes per minor Frame */
 	u32 WordsPerFrame;	     /**< Number of Words per minor Frame */
-	u32 ClbBlockFrames; 	     /**< Number of CLB type minor Frames */
-	u32 BramBlockFrames;	     /**< Number of Bram type minor Frames */
-	u32 BramIntBlockFrames;	     /**< Number of BramInt type minor
-						Frames */
-	u8  HClkRows;		     /**< Number of HClk cols for V4/V5 */
-	u8  DSPCols;		     /**< Number of DSP cols for V4/V5 */
-	u8  IOCols;		     	/**< Number of IO cols for V4/V5 */
-	u8  MGTCols;		     /**< Number of MGT cols for V4/V5 */
-	u16 *SkipCols;		     /**< Columns to skip for CLB Col
-				      			**  calculations */
 
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6 /* If Spartan6 device */
-	u16 *SendBufferPtr;	     /**< Buffer to write to the ICAP device */
-
-
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) ||\
-(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-				      /**< If V6 or 7Series declare buffer
-					  ** pointer depending on ICAP width */
 #if XPAR_HWICAP_0_ICAP_DWIDTH == 8
 	u8 *SendBufferPtr;
 #elif XPAR_HWICAP_0_ICAP_DWIDTH == 16
 	u16 *SendBufferPtr;
 #else
 	u32 *SendBufferPtr;
-#endif
-
-#else
-	u32 *SendBufferPtr;
-
 #endif
 	u32 RequestedWords;	     /**< Number of Words to transfer  */
 	u32 RemainingWords; 	     /**< Number of Words left to transfer  */
@@ -633,117 +601,6 @@ XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, 	\
 #define XHwIcap_GetRdFifoOccupancy(InstancePtr)		\
  XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_RFO_OFFSET)
 
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* If Virtex4 device */
-
-/****************************************************************************/
-/**
-*
-* Converts a CLB SliceX coordinate to a column coordinate used by the
-* XHwIcap_GetClbBits and XHwIcap_SetClbBits functions.
-*
-* @param	SliceX - the SliceX coordinate to be converted
-*
-* @return	Column
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceX2Col(u32 SliceX);
-*
-*****************************************************************************/
-#define XHwIcap_SliceX2Col(SliceX) \
-	( (SliceX >> 1) + 1)
-
-/****************************************************************************/
-/**
-*
-* Converts a CLB SliceY coordinate to a row coordinate used by the
-* XHwIcap_GetClbBits and XHwIcap_SetClbBits functions.
-*
-* @param	InstancePtr is a pointer to the XHwIcap instance.
-* @param	SliceY - the SliceY coordinate to be converted
-* @return	Row
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceY2Row(XHwIcap *InstancePtr, u32 SliceY);
-*
-*****************************************************************************/
-#define XHwIcap_SliceY2Row(InstancePtr, SliceY) \
-	( (InstancePtr)->Rows - (SliceY >> 1) )
-
-/****************************************************************************/
-/**
-*
-* Figures out which slice in a CLB is targeted by a given
-* (SliceX,SliceY) pair.  This slice value is used for indexing in
-* resource arrays.
-*
-* @param	SliceX - the SliceX coordinate to be converted
-* @param	SliceY - the SliceY coordinate to be converted
-*
-* @return	Slice index
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceXY2Slice(u32 SliceX, u32 SliceY);
-*
-*****************************************************************************/
-#define XHwIcap_SliceXY2Slice(SliceX,SliceY) \
-	( ((SliceX % 2) << 1) + (SliceY % 2) )
-
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6)\
-|| (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-/****************************************************************************/
-/**
-*
-* Converts a CLB SliceX coordinate to a column coordinate used by the
-* XHwIcap_GetClbBits and XHwIcap_SetClbBits functions.
-*
-* @param	SliceX - the SliceX coordinate to be converted
-*
-* @return	Column
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceX2Col(u32 SliceX);
-*
-*****************************************************************************/
-#define XHwIcap_SliceX2Col(SliceX) \
-	( ((SliceX) >> 1) + 1)
-
-/****************************************************************************/
-/**
-*
-* Converts a CLB SliceY coordinate to a row coordinate used by the
-* XHwIcap_GetClbBits and XHwIcap_SetClbBits functions.
-*
-* @param	InstancePtr is a pointer to the XHwIcap instance.
-* @param	SliceY - the SliceY coordinate to be converted
-* @return	Row
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceY2Row(XHwIcap *InstancePtr, u32 SliceY);
-*
-*****************************************************************************/
-#define XHwIcap_SliceY2Row(InstancePtr, SliceY) \
-	((InstancePtr)->Rows - (SliceY))
-
-/****************************************************************************/
-/**
-*
-* Figures out which slice in a CLB is targeted by a given
-* (SliceX,SliceY) pair.  This slice value is used for indexing in
-* resource arrays.
-*
-* @param	SliceX - the SliceX coordinate to be converted
-* @param	SliceY - the SliceY coordinate to be converted
-*
-* @return	Slice index
-*
-* @note		C-style Signature:
-*		u32 XHwIcap_SliceXY2Slice(u32 SliceX, u32 SliceY);
-*
-*****************************************************************************/
-#define XHwIcap_SliceXY2Slice(SliceX,SliceY) \
-	((SliceX) % 2)
-
-#endif
 /************************** Function Prototypes *****************************/
 
 /*
@@ -751,14 +608,8 @@ XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, 	\
  */
 int XHwIcap_CfgInitialize(XHwIcap *InstancePtr, XHwIcap_Config *ConfigPtr,
 				u32 EffectiveAddr);
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u16 *FrameBuffer, u32 NumWords);
-int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u16 *FrameBuffer, u32 NumWords);
-#else
 int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords);
 int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords);
-#endif
 void XHwIcap_Reset(XHwIcap *InstancePtr);
 void XHwIcap_FlushFifo(XHwIcap *InstancePtr);
 void XHwIcap_Abort(XHwIcap *InstancePtr);
@@ -790,7 +641,6 @@ void XHwIcap_SetInterruptHandler(XHwIcap * InstancePtr, void *CallBackRef,
 /*
  * Functions in the xhwicap_device_read_frame.c
  */
-#if (XHI_FAMILY != XHI_DEV_FAMILY_S6)
 int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top,
 				long Block, long HClkRow,
 				long MajorFrame, long MinorFrame,
@@ -804,30 +654,6 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top,
 				long MajorFrame, long MinorFrame,
 				u32 *FrameData);
 
-#else
-int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Block, long Row,
-				long MajorFrame, long MinorFrame,
-				u16 *FrameBuffer);
-/*
- * Functions in the xhwicap_device_write_frame.c
- */
-int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Block, long Row,
-				long MajorFrame, long MinorFrame,
-				u16 *FrameData);
-
-#endif
-
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* If Virtex4 device */
-#define XHwIcap_SetClbBits XHwIcap_SetClbBitsV4
-#define XHwIcap_GetClbBits XHwIcap_GetClbBitsV4
-
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6))
-		/* If Virtex5 or Virtex6 device */
-#define XHwIcap_SetClbBits XHwIcap_SetClbBitsV5
-#define XHwIcap_GetClbBits XHwIcap_GetClbBitsV5
-#endif
-
-
 /****************************************************************************/
 /**
 *
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_read_frame.c b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_read_frame.c
index c5ff405b..85c14369 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_read_frame.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_read_frame.c
@@ -51,6 +51,7 @@
 *					  modifications
 * 5.00a hvm  2/25/10  Added support for S6
 * 6.00a hvm  08/01/11 Added support for K7
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 * </pre>
 *
 *****************************************************************************/
@@ -76,8 +77,6 @@
 
 
 /************************** Function Prototypes *****************************/
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5 ) ||\
-	(XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES ))
 /****************************************************************************/
 /**
 *
@@ -145,12 +144,7 @@ int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top, long Block,
 	 * Setup FAR register.
 	 */
 	Packet = XHwIcap_Type1Write(XHI_FAR) | 1;
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-	Data = XHwIcap_SetupFarV4(Top, Block, HClkRow,  MajorFrame, MinorFrame);
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 	Data = XHwIcap_SetupFarV5(Top, Block, HClkRow,  MajorFrame, MinorFrame);
-#endif
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] = Data;
 
@@ -159,11 +153,7 @@ int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top, long Block,
 	 * The frame will be preceeded by a dummy frame, and we need to read one
 	 * extra word for V4 and V5 devices.
 	 */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	TotalWords = (InstancePtr->WordsPerFrame << 1) + 1;
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 	TotalWords = (InstancePtr->WordsPerFrame << 1);
-#endif
 	/*
 	 * Create Type one packet
 	 */
@@ -206,112 +196,3 @@ int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top, long Block,
 
 	return XST_SUCCESS;
 };
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-/****************************************************************************/
-/**
-*
-* Reads one frame from the device and puts it in memory specified by the user.
-*
-* @param	InstancePtr - a pointer to the XHwIcap instance to be worked on.
-* @param	Block - Block Address (XHI_FAR_CLB_BLOCK,
-*		XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
-* @param	MajorFrame - selects the column
-* @param	MinorFrame - selects frame inside column
-* @param	FrameBuffer is a pointer to the memory where the frame read
-*		from the device is stored
-*
-* @return	XST_SUCCESS else XST_FAILURE.
-*
-* @note		This is a blocking call.
-*
-*****************************************************************************/
-int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Block, long Row,
-				long MajorFrame, long MinorFrame,
-				u16 *FrameBuffer)
-{
-	int Status;
-	u16 Packet;
-	u16 TotalWords;
-	u16 WriteBuffer[READ_FRAME_SIZE];
-	u16 Index = 0;
-
-	Xil_AssertNonvoid(InstancePtr != NULL);
-	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
-	Xil_AssertNonvoid(FrameBuffer != NULL);
-
-	/*
-	 * DUMMY and SYNC
-	 */
-	WriteBuffer[Index++] = XHI_DUMMY_PACKET;
-	WriteBuffer[Index++] = XHI_SYNC_PACKET1;
-	WriteBuffer[Index++] = XHI_SYNC_PACKET2;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-	/*
-	 * Setup FAR register.
-	 */
-	Packet = XHwIcap_Type1Write(XHI_FAR_MAJ) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = (Block << XHI_BLOCK_SHIFT) |
-				(Row << XHI_ROW_SHIFT) | MajorFrame;
-	Packet = XHwIcap_Type1Write(XHI_FAR_MIN) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = MinorFrame;
-
-	/*
-	 * Setup CMD register to read configuration
-	 */
-	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = XHI_CMD_RCFG;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-	TotalWords = (InstancePtr->WordsPerFrame << 1) + 1;
-	/*
-	 * Create Type two packet for FDRO
-	 */
-	WriteBuffer[Index++] = XHwIcap_Type2Read(XHI_FDRO);
-	WriteBuffer[Index++] = 0x0000;
-	WriteBuffer[Index++] = TotalWords;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-	/*
-	 * Write the data to the FIFO and initiate the transfer of data
-	 * present in the FIFO to the ICAP device
-	 */
-	Status = XHwIcap_DeviceWrite(InstancePtr, (u16 *)&WriteBuffer[0],
-					Index);
-	if (Status != XST_SUCCESS)  {
-		return XST_FAILURE;
-	}
-
-	/*
-	 * Wait till the write is done.
-	 */
-	while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
-					XHI_CR_OFFSET)) &
-					XHI_CR_WRITE_MASK);
-
-	/*
-	 * Read the frame of the data including the NULL frame.
-	 */
-	Status = XHwIcap_DeviceRead(InstancePtr, &FrameBuffer[0],
-				TotalWords);
-
-	if (Status != XST_SUCCESS)  {
-		return XST_FAILURE;
-	}
-
-	/*
-	 * Send DESYNC command
-	 */
-	Status = XHwIcap_CommandDesync(InstancePtr);
-	if (Status != XST_SUCCESS)  {
-		return XST_FAILURE;
-	}
-
-	return Status;
-}
-#endif
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_write_frame.c b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_write_frame.c
index 2062265e..7bf4a97e 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_write_frame.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_device_write_frame.c
@@ -53,6 +53,7 @@
 *		      CRC bytes in the XHwIcap_DeviceWriteFrame function for S6
 *		      (CR560534)
 * 6.00a hvm  08/01/11   Added support for K7
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 *
 *
 * </pre>
@@ -79,8 +80,7 @@
 
 
 /************************** Function Prototypes *****************************/
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5 ) ||\
-(XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
+
 /****************************************************************************/
 /**
 *
@@ -140,17 +140,10 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
 
-
-
 	/*
 	 * Bypass CRC
 	 */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	Packet = XHwIcap_Type1Write(XHI_COR) | 1;
-	Data = 0x10042FDD;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-#endif
+
 	/*
 	 * ID register
 	 */
@@ -159,17 +152,12 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] = Data;
 
-
 	/*
 	 * Setup FAR
 	 */
 	Packet = XHwIcap_Type1Write(XHI_FAR) | 1;
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex 4 */
-	Data = XHwIcap_SetupFarV4(Top, Block, HClkRow,  MajorFrame, MinorFrame);
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
+
 	Data = XHwIcap_SetupFarV5(Top, Block, HClkRow,  MajorFrame, MinorFrame);
-#endif
 
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] = Data;
@@ -206,7 +194,6 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 		WriteBuffer[Index++] = Packet;
 	}
 
-
 	/*
 	 * Write the Header data into the FIFO and intiate the transfer of
 	 * data present in the FIFO to the ICAP device
@@ -219,15 +206,9 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 	/*
 	 * Write the modified frame data.
 	 */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	Status = XHwIcap_DeviceWrite(InstancePtr,
-				(u32 *) &FrameData[InstancePtr->WordsPerFrame + 1],
-				InstancePtr->WordsPerFrame);
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)) /* Virtex 6 */
 	Status = XHwIcap_DeviceWrite(InstancePtr,
 				(u32 *) &FrameData[InstancePtr->WordsPerFrame],
 				InstancePtr->WordsPerFrame);
-#endif
 	if (Status != XST_SUCCESS) {
 		return XST_FAILURE;
 	}
@@ -236,59 +217,36 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 	 * Write out the pad frame. The pad frame was read from the device
 	 * before the data frame.
 	 */
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	Status = XHwIcap_DeviceWrite(InstancePtr, (u32 *) &FrameData[1],
-				    InstancePtr->WordsPerFrame);
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)) /* Virtex6 */
 	Status = XHwIcap_DeviceWrite(InstancePtr, (u32 *) &FrameData[0],
 				    InstancePtr->WordsPerFrame);
-#endif
 	if (Status != XST_SUCCESS) {
 		return XST_FAILURE;
 	}
 
 	/* Add CRC */
 	Index = 0;
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	Packet = XHwIcap_Type1Write(XHI_CRC) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = XHI_DISABLED_AUTO_CRC;
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)) /* Virtex6 */
 	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
 	Data = XHI_CMD_RCRC;
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] = Data;
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-#endif
 
 	/* Park the FAR */
 	Packet = XHwIcap_Type1Write(XHI_FAR) | 1;
-
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-	Data = XHwIcap_SetupFarV4(0, 0, 3, 33, 0);
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 	Data = XHwIcap_SetupFarV5(0, 0, 3, 33, 0);
-#endif
 
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] =  Data;
 
 	/* Add CRC */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-	Packet = XHwIcap_Type1Write(XHI_CRC) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = XHI_DISABLED_AUTO_CRC;
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)) /* Virtex6 */
 	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
 	Data = XHI_CMD_RCRC;
 	WriteBuffer[Index++] = Packet;
 	WriteBuffer[Index++] = Data;
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
 	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-#endif
+
 
 	/*
 	 * Intiate the transfer of data present in the FIFO to
@@ -310,200 +268,4 @@ int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top, long Block,
 	return XST_SUCCESS;
 };
 
-#elif (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-/****************************************************************************/
-/**
-*
-* Writes one frame from the specified buffer and puts it in the device
-* (ICAP).
-*
-* @param	InstancePtr is a pointer to the XHwIcap instance.
-* @param	Top - top (0) or bottom (1) half of device
-* @param	Block - Block Address (XHI_FAR_CLB_BLOCK,
-* 		XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
-* @param	HClkRow - selects the HClk Row
-* @param	MajorFrame - selects the column
-* @param	MinorFrame - selects frame inside column
-* @param	FrameData is a pointer to the frame that is to be written
-*		to the device.
-*
-* @return	XST_SUCCESS else XST_FAILURE.
-*
-* @note		This is a blocking function.
-*		This function is used in conjunction with the function
-*		XHwIcap_DeviceReadFrame. This function is used to write back
-*		the frame of data read using the XHwIcap_DeviceReadFrame.
-*
-*****************************************************************************/
-int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Block, long Row,
-				long MajorFrame, long MinorFrame,
-				u16 *FrameData)
-{
-	u16 Packet;
-	u16 TotalWords;
-	int Status;
-	u16 WriteBuffer[READ_FRAME_SIZE];
-	u16 Data;
-	u16 Index =0;
-
-	Xil_AssertNonvoid(InstancePtr != NULL);
-	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
-	Xil_AssertNonvoid(FrameData != NULL);
-
-	/*
-	 * DUMMY and SYNC
-	 */
-	WriteBuffer[Index++] = XHI_DUMMY_PACKET;
-	WriteBuffer[Index++] = XHI_SYNC_PACKET1;
-	WriteBuffer[Index++] = XHI_SYNC_PACKET2;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-	/*
-	 * Reset CRC
-	 */
-	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
-	Data = XHI_CMD_RCRC;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-
-	/*
-	 * Write the FLR
-	 */
-	Packet = XHwIcap_Type1Write(XHI_FLR) | 1;
-	WriteBuffer[Index++] =  Packet ;
-	WriteBuffer[Index++] =  0x430;
-
-	/*
-	 * ID register
-	 */
-	Packet = XHwIcap_Type1Write(XHI_IDCODE) | 2;
-	WriteBuffer[Index++] = Packet;
-
-	/*
-	 * It is written wrongly in the document that only lower 16 bits are
-	 * needed.The document will be updated. We need the complete 32 bit.
-	 */
-	Data = (u16)(InstancePtr->DeviceIdCode >> 16);
-	WriteBuffer[Index++] = Data;
-	Data = (u16)InstancePtr->DeviceIdCode;
-	WriteBuffer[Index++] = Data;
-
-	/*
-	 * Bypass CRC
-	 */
-	Packet = XHwIcap_Type1Write(XHI_COR1) | 1;
-	Data = XHI_COR1_DEFAULT;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-
-
-	Packet = XHwIcap_Type1Write(XHI_COR2) | 1;
-	Data = XHI_COR2_DEFAULT;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-
-	/*
-	 * Write the FAR MAJ and MIN address values
-	 */
-	Packet = XHwIcap_Type1Write(XHI_FAR_MAJ) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = (Block << XHI_BLOCK_SHIFT) |
-				(Row << XHI_ROW_SHIFT) | MajorFrame;
-	Packet = XHwIcap_Type1Write(XHI_FAR_MIN) | 1;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = MinorFrame;
-
-	/*
-	 * Setup CMD register - write configuration
-	 */
-	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
-	Data = XHI_CMD_WCFG;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-
-	/*
-	 * Setup Packet header.
-	 */
-	TotalWords = InstancePtr->WordsPerFrame << 1;
-	/*
-	 * Create Type 2 Packet.
-	 */
-	Packet = XHwIcap_Type2Write(XHI_FDRI);
-
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = 0;
-	WriteBuffer[Index++] = TotalWords;
-
-	/*
-	 * Write the Header data into the FIFO and intiate the transfer of
-	 * data present in the FIFO to the ICAP device
-	 */
-	Status = XHwIcap_DeviceWrite(InstancePtr, (u16 *)&WriteBuffer[0],
-					Index);
-	if (Status != XST_SUCCESS)  {
-		return XST_FAILURE;
-	}
-
-	/*
-	 * Write the modified frame data.
-	 */
-	Status = XHwIcap_DeviceWrite(InstancePtr,
-				(u16 *) &FrameData[InstancePtr->WordsPerFrame],
-				InstancePtr->WordsPerFrame);
-	if (Status != XST_SUCCESS) {
-		return XST_FAILURE;
-	}
-
-	/*
-	 * Write out the pad frame. The pad frame was read from the device
-	 * before the data frame.
-	 */
-	Status = XHwIcap_DeviceWrite(InstancePtr, (u16 *) &FrameData[0],
-				    InstancePtr->WordsPerFrame);
-	if (Status != XST_SUCCESS) {
-		return XST_FAILURE;
-	}
-
-
-	/* Disable CRC */
-	Index = 0;
-	WriteBuffer[Index++] = XHI_DISABLED_AUTO_CRC_ONE;
-	WriteBuffer[Index++] = XHI_DISABLED_AUTO_CRC_TWO;
-
-	/*
-	 * Setup CMD register - write configuration
-	 */
-	Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
-	Data = XHI_CMD_LFRM;
-	WriteBuffer[Index++] = Packet;
-	WriteBuffer[Index++] = Data;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-	WriteBuffer[Index++] = XHI_NOOP_PACKET;
-
-	/*
-	 * Intiate the transfer of data present in the FIFO to
-	 * the ICAP device
-	 */
-	Status = XHwIcap_DeviceWrite(InstancePtr, &WriteBuffer[0], Index);
-	if (Status != XST_SUCCESS)  {
-		return XST_FAILURE;
-	}
-
-	/*
-	 * Send DESYNC command
-	 */
-	Status = XHwIcap_CommandDesync(InstancePtr);
-	if (Status != XST_SUCCESS) {
-		return XST_FAILURE;
-	}
-
-	return XST_SUCCESS;
-
-}
-#endif
 
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_i.h b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_i.h
index 5728eedf..74f3d385 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_i.h
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_i.h
@@ -55,6 +55,8 @@
 * 7.00a bss  03/14/12 Added Virtex 7, Artix 7 and Zynq Device families
 * 8.01a bss  05/14/12 Added the define XHI_COR_1 for CR718042
 * 9.0   bss  02/20/14 Added XHI_DEV_FAMILY_K8 for Kintex 8 devices. #CR764668
+* 10.0  bss  6/24/14  Removed support for families older than 7 series.
+*		      Removed IDCODE macros.
 *
 * </pre>
 *
@@ -68,40 +70,8 @@ extern "C" {
 
 /***************************** Include Files ********************************/
 
-#include "xhwicap_family.h"
-
 /************************** Constant Definitions ****************************/
 
-#define XHI_DEV_FAMILY_V4		2	/* Virtex4 */
-#define XHI_DEV_FAMILY_V5		3	/* Virtex5 */
-#define XHI_DEV_FAMILY_V6		4	/* Virtex6 */
-#define XHI_DEV_FAMILY_S6		5	/* Spartan6 */
-#define XHI_DEV_FAMILY_K7		7	/* Kintex7 */
-#define XHI_DEV_FAMILY_V7		8	/* Virtex7 */
-#define XHI_DEV_FAMILY_A7		9	/* Artix7 */
-#define XHI_DEV_FAMILY_ZYNQ		10	/* Zynq */
-#define XHI_DEV_FAMILY_K8		11	/* Zynq */
-
-
-#if ((XHI_FPGA_FAMILY == XHI_DEV_FAMILY_K7) ||\
-(XHI_FPGA_FAMILY == XHI_DEV_FAMILY_A7) ||\
-(XHI_FPGA_FAMILY == XHI_DEV_FAMILY_V7) ||\
-(XHI_FPGA_FAMILY == XHI_DEV_FAMILY_K8) ||\
-(XHI_FPGA_FAMILY == XHI_DEV_FAMILY_ZYNQ))
-
-#define XHI_DEV_FAMILY_7SERIES	6	/* 7 SERIES */
-
-#define XHI_FAMILY XHI_DEV_FAMILY_7SERIES
-
-#else
-
-#define XHI_FAMILY XHI_FPGA_FAMILY
-
-
-#endif
-
-
-
 /**
  * @name Configuration Type1/Type2 packet headers masks
  * @{
@@ -110,16 +80,6 @@ extern "C" {
 #define XHI_REGISTER_MASK		0x1F
 #define XHI_OP_MASK				0x3
 
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6
-
-#define XHI_WORD_COUNT_MASK_TYPE_1	0x1F
-
-#define XHI_TYPE_SHIFT			13
-#define XHI_REGISTER_SHIFT		5
-#define XHI_OP_SHIFT			11
-
-#else
-
 #define XHI_WORD_COUNT_MASK_TYPE_1	0x7FF
 #define XHI_WORD_COUNT_MASK_TYPE_2	0x07FFFFFF
 
@@ -127,8 +87,6 @@ extern "C" {
 #define XHI_REGISTER_SHIFT		13
 #define XHI_OP_SHIFT			27
 
-#endif
-
 #define XHI_TYPE_1			1
 #define XHI_TYPE_2			2
 #define XHI_OP_WRITE			2
@@ -136,52 +94,6 @@ extern "C" {
 
 /* @} */
 
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6
-/*
- * Addresses of the Configuration Registers
- */
-
-#define XHI_CRC				0
-#define XHI_FAR_MAJ			1
-#define XHI_FAR_MIN			2
-#define XHI_FDRI			3
-#define XHI_FDRO			4
-#define XHI_CMD				5
-#define XHI_CTL				6
-#define XHI_MASK			7
-#define XHI_STAT			8
-#define XHI_LOUT			9
-#define XHI_COR1			10
-#define XHI_COR2			11
-#define XHI_PWRDN_REG			12
-#define XHI_FLR				13
-#define XHI_IDCODE			14
-#define XHI_CWDT			15
-#define XHI_HC_OPT_REG			16
-
-#define XHI_CSBO			18
-#define XHI_GENERAL1			19
-#define XHI_GENERAL2			20
-#define XHI_GENERAL3			21
-#define XHI_GENERAL4			22
-#define XHI_GENERAL5			23
-#define XHI_MODE_REG			24
-#define XHI_PU_GWE			25
-#define XHI_PU_GTS			26
-#define XHI_MFWR			27
-#define XHI_CCLK_FREQ			28
-#define XHI_SEU_OPT			29
-#define XHI_EXP_SIGN			30
-#define XHI_RDBK_SIGN			31
-#define XHI_BOOTSTS			32
-#define XHI_EYE_MASK			33
-#define CBC_REG				34
-
-#define XHI_NUM_REGISTERS		35 /* Note that there is skip at
-					    * number 17. There is no register
-					    * at with this number */
-
-#else
 /*
  * Addresses of the Configuration Registers
  */
@@ -199,11 +111,6 @@ extern "C" {
 #define XHI_CBC				11
 #define XHI_IDCODE			12
 #define XHI_AXSS			13
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-#define XHI_NUM_REGISTERS           14
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-	/* Virtex5 or Virtex6 or Kintex 7*/
 #define XHI_C0R_1			14
 #define XHI_CSOB			15
 #define XHI_WBSTAR			16
@@ -214,38 +121,11 @@ extern "C" {
 					    * is not sequential in V5/V6 and
 					    *there are gaps */
 #define XHI_COR_1			14
-#endif
-#endif
+
 /**
  * @name Frame Address Register mask(s)
  * @{
  */
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-#define XHI_FAR_BOTTOM_MASK		0x1
-#define XHI_FAR_BLOCK_MASK		0x7
-#define XHI_FAR_MAJOR_FRAME_MASK	0xFF
-#define XHI_FAR_HCLKROW_MASK		0x1F
-#define XHI_FAR_MINOR_FRAME_MASK	0xFF
-#define XHI_FAR_COLUMN_MASK		0xFF
-#define XHI_FAR_MINOR_MASK		0x3F
-#define XHI_FAR_BOTTOM_SHIFT		22
-#define XHI_FAR_BLOCK_SHIFT		19
-#define XHI_FAR_MAJOR_FRAME_SHIFT	17
-#define XHI_FAR_HCLKROW_SHIFT		14
-#define XHI_FAR_MINOR_FRAME_SHIFT	9
-#define XHI_FAR_COLUMN_SHIFT		6
-#define XHI_FAR_MINOR_SHIFT		0
-
-/*
- * Address Block Types in the  Frame Address Register
- */
-#define XHI_FAR_CLB_BLOCK		0 /**< CLB/IO/CLK Block */
-#define XHI_FAR_BRAM_BLOCK		1 /**< Block RAM interconnect */
-#define XHI_FAR_BRAM_INT_BLOCK		2 /**< Block RAM content */
-
-#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-	/* Virtex5 or Virtex6 */
 #define XHI_FAR_BLOCK_MASK		0x7
 #define XHI_FAR_TOP_BOTTOM_MASK		0x1
 #define XHI_FAR_MAJOR_FRAME_MASK	0xFF
@@ -267,7 +147,6 @@ extern "C" {
 #define XHI_FAR_CLB_BLOCK		0 /**< CLB/IO/CLK Block */
 #define XHI_FAR_BRAM_BLOCK		1 /**< Block RAM interconnect */
 
-#endif
 /* @} */
 
 /*
@@ -276,11 +155,7 @@ extern "C" {
 #define XHI_CMD_NULL			0
 #define XHI_CMD_WCFG			1
 #define XHI_CMD_MFW			2
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6
-#define XHI_CMD_LFRM			3
-#else
 #define XHI_CMD_DGHIGH			3
-#endif
 #define XHI_CMD_RCFG			4
 #define XHI_CMD_START			5
 #define XHI_CMD_RCAP			6
@@ -289,48 +164,17 @@ extern "C" {
 #define XHI_CMD_SWITCH			9
 #define XHI_CMD_GRESTORE		10
 #define XHI_CMD_SHUTDOWN		11
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_V6)  || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
 #define XHI_CMD_GCAPTURE		12
-#endif
 #define XHI_CMD_DESYNCH			13
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-#define XHI_CMD_IPROG			14
-#endif
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
-	/* Virtex5 or Virtex6 */
 #define XHI_CMD_IPROG			15
 #define XHI_CMD_CRCC			16
 #define XHI_CMD_LTIMER			17
-#endif
 #define XHI_TYPE_2_READ 		((XHI_TYPE_2 << XHI_TYPE_SHIFT) | \
 					(XHI_OP_READ << XHI_OP_SHIFT))
 
 #define XHI_TYPE_2_WRITE 		( (XHI_TYPE_2 << XHI_TYPE_SHIFT) | \
 					(XHI_OP_WRITE << XHI_OP_SHIFT) )
 
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-
-#define XHI_SYNC_PACKET1		0xAA99
-#define XHI_SYNC_PACKET2		0x5566
-#define XHI_DUMMY_PACKET		0xFFFF
-#define XHI_NOOP_PACKET			0x2000
-#define XHI_TYPE1_WRITE			(XHI_TYPE_1 << XHI_TYPE_SHIFT) | \
-					((XHI_OP_WRITE << XHI_OP_SHIFT))
-
-#define XHI_TYPE2_CNT_MASK		0x07FFFFFF
-
-#define XHI_TYPE_1_PACKET_MAX_WORDS 	32
-
-#define XHI_DEVICE_ID_READ		0x29C2
-#define XHI_BLOCK_SHIFT			12
-#define XHI_ROW_SHIFT			8
-#define XHI_COR1_DEFAULT		0x3d10
-#define XHI_COR2_DEFAULT		0x9EE
-#else
 /*
  * Packet constants
  */
@@ -343,59 +187,12 @@ extern "C" {
 #define XHI_TYPE_1_HEADER_BYTES		4
 #define XHI_TYPE_2_HEADER_BYTES		8
 
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
-#define XHI_NUM_FRAME_BYTES		164  /* Number of bytes in a frame */
-#define XHI_NUM_FRAME_WORDS		41   /* Number of Words in a frame */
-#define XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME  83 /* Num of Words in a frame read
-						 * from the device including
-						 * the NULL frame and an extra
-						 * 32 bit word
-						 */
-#endif
-#endif
-
-/* Virtex6 or 7 SERIES */
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 #define XHI_NUM_FRAME_BYTES		324  /* Number of bytes in a frame */
 #define XHI_NUM_FRAME_WORDS		81   /* Number of Words in a frame */
 #define XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME  162 /* Num of Words in a frame read
 						 * from the device including
 						 * the NULL frame
 						 */
-#endif
-
-
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6 /* Spartan6 */
-#define XHI_NUM_FRAME_BYTES		130  /* Number of bytes in a frame */
-#define XHI_NUM_FRAME_WORDS		65   /* Number of Words in a frame */
-#define XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME  131 /* Num of Words in a frame read
-						 * from the device including
-						 * the NULL frame
-						 */
-#endif
-
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-
-#define XHI_GCLK_FRAMES             	3
-#define XHI_IOB_FRAMES              	30
-#define XHI_DSP_FRAMES              	21
-#define XHI_CLB_FRAMES              	22
-#define XHI_BRAM_FRAMES             	64
-#define XHI_BRAM_INT_FRAMES         	20
-
-#elif XHI_FAMILY == XHI_DEV_FAMILY_V5 /* Virtex5  */
-
-#define XHI_GCLK_FRAMES             	4
-#define XHI_IOB_FRAMES              	54
-#define XHI_DSP_FRAMES              	28
-#define XHI_CLB_FRAMES              	36
-#define XHI_BRAM_FRAMES             	64
-#define XHI_BRAM_INT_FRAMES         	30
-
-#endif
-
-
 /* Device Resources */
 #define CLB				0
 #define DSP				1
@@ -514,34 +311,6 @@ extern "C" {
 	( (XHI_TYPE_2 << XHI_TYPE_SHIFT) | (Register << XHI_REGISTER_SHIFT) | \
 	(XHI_OP_WRITE << XHI_OP_SHIFT) )
 
-#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
-/****************************************************************************/
-/**
-*
-* Generates a Type 1 packet header that is written to the Frame Address
-* Register (FAR) for a Virtex4 device.
-*
-* @param	Top - top (0) or bottom (1) half of device
-* @param	Block - Address Block Type (CLB or BRAM address space)
-* @param	HClkRow - H Clock row
-* @param	MajorAddress - CLB or BRAM column
-* @param	MinorAdderss - Frame within column
-*
-* @return	Type 1 packet header to write the FAR
-*
-* @note		None.
-*
-*****************************************************************************/
-#define XHwIcap_SetupFarV4(Top, Block, HClkRow, MajorAddress, MinorAddress)  \
-	((Top << XHI_FAR_BOTTOM_SHIFT) | \
-	(Block << XHI_FAR_BLOCK_SHIFT) | \
-	(HClkRow << XHI_FAR_HCLKROW_SHIFT) | \
-	(MajorAddress << XHI_FAR_COLUMN_SHIFT) | \
-	(MinorAddress << XHI_FAR_MINOR_SHIFT))
-#endif
-
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
-	(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
 /****************************************************************************/
 /**
 *
@@ -565,8 +334,6 @@ extern "C" {
 	(Row << XHI_FAR_ROW_ADDR_SHIFT) | \
 	(ColumnAddress << XHI_FAR_COLUMN_ADDR_SHIFT) | \
 	(MinorAddress << XHI_FAR_MINOR_ADDR_SHIFT))
-#endif
-
 
 /************************** Function Prototypes ******************************/
 
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_l.h b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_l.h
index 11c3b0d5..38046713 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_l.h
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_l.h
@@ -59,6 +59,7 @@
 *
 * 8.00a bss  06/20/12 Deleted Hang mask definition as per CR 656162
 * 9.0   bss  02/20/14 Added Kintex 8 and Virtex72000T device Idcodes.
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 *
 * </pre>
 *
@@ -75,7 +76,6 @@ extern "C" {
 #include <xil_types.h>
 #include <xil_assert.h>
 #include "xil_io.h"
-#include "xhwicap_family.h"
 /************************** Constant Definitions ****************************/
 
 /******************************************************************/
@@ -157,203 +157,6 @@ extern "C" {
 
 /* @} */
 
-/** @name IDCODE's for the Virtex4 Devices.
- *
- * @{
- */
-#define XHI_XC4VLX15	0x01658093
-#define XHI_XC4VLX25	0x0167C093
-#define XHI_XC4VLX40	0x016A4093
-#define XHI_XC4VLX60	0x016B4093
-#define XHI_XC4VLX80	0x016D8093
-#define XHI_XC4VLX100	0x01700093
-#define XHI_XC4VLX160	0x01718093
-#define XHI_XC4VLX200	0x01734093
-
-#define XHI_XC4VSX25	0x02068093
-#define XHI_XC4VSX35	0x02088093
-#define XHI_XC4VSX55	0x020B0093
-
-#define XHI_XC4VFX12	0x01E58093
-#define XHI_XC4VFX20	0x01E64093
-#define XHI_XC4VFX40	0x01E8C093
-#define XHI_XC4VFX60	0x01EB4093
-#define XHI_XC4VFX100	0x01EE4093
-#define XHI_XC4VFX140	0x01F14093
-
-#define XHI_V4_NUM_DEVICES	17
-
-/* @} */
-
-/** @name IDCODE's for the Virtex5 Devices.
- *
- * @{
- */
-#define XHI_XC5VLX30	0x0286E093
-#define XHI_XC5VLX50	0x02896093
-#define XHI_XC5VLX85	0x028AE093
-#define XHI_XC5VLX110	0x028D6093
-#define XHI_XC5VLX220	0x0290C093
-#define XHI_XC5VLX330	0x0295C093
-
-#define XHI_XC5VLX30T	0x02A6E093
-#define XHI_XC5VLX50T	0x02A96093
-#define XHI_XC5VLX85T	0x02AAE093
-#define XHI_XC5VLX110T	0x02AD6093
-#define XHI_XC5VLX220T	0x02B0C093
-#define XHI_XC5VLX330T	0x02B5C093
-
-#define XHI_XC5VSX35T	0x02E72093
-#define XHI_XC5VSX50T	0x02E9A093
-#define XHI_XC5VSX95T	0x02ECE093
-
-#define XHI_XC5VFX30T	0x03276093
-#define XHI_XC5VFX70T	0x032C6093
-#define XHI_XC5VFX100T	0x032D8093
-#define XHI_XC5VFX130T	0x03300093
-#define XHI_XC5VFX200T	0x03334093
-
-#define XHI_V5_NUM_DEVICES	20
-/* @} */
-
-/** @name IDCODE's for the Virtex6 Devices.
- *
- * @{
- */
-
-#define XHI_XC6VHX250T	0x042A2093
-#define XHI_XC6VHX255T	0x042A4093
-#define XHI_XC6VHX380T	0x042A8093
-#define XHI_XC6VHX565T	0x042AC093
-
-#define XHI_XC6VLX75T	0x04244093
-#define XHI_XC6VLX130T	0x0424A093
-#define XHI_XC6VLX195T	0x0424C093
-#define XHI_XC6VLX240T 	0x04250093
-#define XHI_XC6VLX365T	0x04252093
-#define XHI_XC6VLX550T	0x04256093
-#define XHI_XC6VLX760	0x0423A093
-#define XHI_XC6VSX315T	0x04286093
-#define XHI_XC6VSX475T	0x04288093
-#define XHI_XC6VCX75T	0x042C4093
-#define XHI_XC6VCX130T	0x042CA093
-#define XHI_XC6VCX195T	0x042CC093
-#define XHI_XC6VCX240T 	0x042D0093
-
-#define XHI_V6_NUM_DEVICES 	17
-
-/* @} */
-
-/** @name IDCODE's for the Spartan6 Devices.
- *
- * @{
- */
-
-#define XHI_XC6SLX4	0x04000093
-#define XHI_XC6SLX9	0x04001093
-#define XHI_XC6SLX16	0x04002093
-#define XHI_XC6SLX25	0x04004093
-#define XHI_XC6SLX25T	0x04024093
-#define XHI_XC6SLX45	0x04008093
-#define XHI_XC6SLX45T	0x04028093
-#define XHI_XC6SLX75	0x0400E093
-#define XHI_XC6SLX75T	0x0402E093
-#define XHI_XC6SLX100	0x04011093
-#define XHI_XC6SLX100T	0x04031093
-#define XHI_XC6SLX150	0x0401D093
-#define XHI_XC6SLX150T	0x0403D093
-
-#define XHI_S6_NUM_DEVICES	13
-
-/* @} */
-
-/** @name IDCODE's for the Kintex7 Devices.
- *
- * @{
- */
-
-#define XHI_XC7K30T	0x03642093
-#define XHI_XC7K70T	0x03647093
-#define XHI_XC7K160T	0x0364C093
-#define XHI_XC7K325T	0x03651093
-#define XHI_XC7K410T	0x03656093
-#define XHI_XC7K235T	0x0365B093
-#define XHI_XC7K125T	0x0365C093
-#define XHI_XC7K290T	0x0365D093
-#define XHI_XC7K355T	0x03747093
-#define XHI_XC7K420T	0x0374C093
-#define XHI_XC7K480T	0x03751093
-
-#define XHI_K7_NUM_DEVICES      11
-
-/* @} */
-
-
-/** @name IDCODE's for the Virtex7 Devices.
- *
- * @{
- */
-
-#define XHI_XC7VX80T		0x03680093
-#define XHI_XC7VX82T		0x03681093
-#define XHI_XC7VX330T		0x03667093
-#define XHI_XC7VX415T		0x03682093
-#define XHI_XC7V450T		0x0366C093
-#define XHI_XC7VX485T		0x03687093
-#define XHI_XC7VX550T		0x03692093
-#define XHI_XC7V585T		0x03671093
-#define XHI_XC7VX690T		0x03691093
-#define XHI_XC7VX980T		0x03696093
-#define XHI_XC7VX2000T_SLR0	0x036B3093
-#define XHI_XC7VX2000T_SLR1	0x036A2093
-#define XHI_XC7VX2000T_SLR2	0x036A4093
-#define XHI_XC7VX2000T_SLR3	0x036A6093
-
-
-#define XHI_V7_NUM_DEVICES      14
-
-/* @} */
-
-/** @name IDCODE's for the Artix7 Devices.
- *
- * @{
- */
-
-#define XHI_XC7A15		0x03627093
-#define XHI_XC7A30T		0x0362D093
-#define XHI_XC7A50T		0x0362C093
-#define XHI_XC7A100T		0x03631093
-#define XHI_XC7A200T		0x03636093
-#define XHI_XC7A350T		0x0363B093
-
-#define XHI_A7_NUM_DEVICES      6
-
-/* @} */
-
-/** @name IDCODE's for the Zynq Devices.
- *
- * @{
- */
-
-#define XHI_XC7Z010		0x03722093
-#define XHI_XC7Z020		0x03727093
-#define XHI_XC7Z030		0x0372C093
-#define XHI_XC7Z045		0x03731093
-
-#define XHI_ZYNQ_NUM_DEVICES      4
-
-/* @} */
-
-/** @name IDCODE's for the Kintex8 Devices.
- *
- * @{
- */
-#define XHI_XCKU040T	0x03822093
-
-#define XHI_K8_NUM_DEVICES      1
-
-/* @} */
-
 /**************************** Type Definitions ******************************/
 
 /***************** Macros (Inline Functions) Definitions ********************/
diff --git a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_srp.c b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_srp.c
index 4867dee7..f4a05f6f 100755
--- a/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_srp.c
+++ b/XilinxProcessorIPLib/drivers/hwicap/src/xhwicap_srp.c
@@ -66,6 +66,7 @@
 *			configuration CR 637538
 *
 * 8.00a bss  06/20/12 Deleted ReadId API as per CR 656162
+* 10.0  bss  6/24/14  Removed support for families older than 7 series
 * </pre>
 *
 *****************************************************************************/
@@ -80,11 +81,8 @@
 
 #define DESYNC_COMMAND_SIZE	7 /* Number of words in the Desync command */
 #define CAPTURE_COMMAND_SIZE	7 /* Number of words in the Capture command */
-#if XHI_FAMILY == XHI_DEV_FAMILY_S6
-#define READ_CFG_REG_COMMAND_SIZE 8 /* Num of words in Read Config command */
-#else
 #define READ_CFG_REG_COMMAND_SIZE 7 /* Num of words in Read Config command */
-#endif
+
 /**************************** Type Definitions *******************************/
 
 /***************** Macros (Inline Functions) Definitions *********************/
@@ -108,11 +106,7 @@
 int XHwIcap_CommandDesync(XHwIcap *InstancePtr)
 {
 	int Status;
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	u16 FrameBuffer[DESYNC_COMMAND_SIZE];
-#else
 	u32 FrameBuffer[DESYNC_COMMAND_SIZE];
-#endif
 	u32 Index =0;
 
 	Xil_AssertNonvoid(InstancePtr != NULL);
@@ -139,7 +133,6 @@ int XHwIcap_CommandDesync(XHwIcap *InstancePtr)
 	return XST_SUCCESS;
 }
 
-#if (XHI_FAMILY != XHI_DEV_FAMILY_S6)
 /****************************************************************************/
 /**
 *
@@ -169,10 +162,7 @@ int XHwIcap_CommandCapture(XHwIcap *InstancePtr)
 	 */
 	FrameBuffer[Index++] = XHI_DUMMY_PACKET;
 	FrameBuffer[Index++] = XHI_SYNC_PACKET;
-#if ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) \
-	|| (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES ))
 	FrameBuffer[Index++] = XHI_NOOP_PACKET;
-#endif
 	FrameBuffer[Index++] = (XHwIcap_Type1Write(XHI_CMD) | 1);
 	FrameBuffer[Index++] = XHI_CMD_GCAPTURE;
 	FrameBuffer[Index++] =  XHI_DUMMY_PACKET;
@@ -189,7 +179,7 @@ int XHwIcap_CommandCapture(XHwIcap *InstancePtr)
 
 	return XST_SUCCESS;
 }
-#endif
+
 /****************************************************************************/
 /**
  *
@@ -212,13 +202,7 @@ u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
 {
 	int Status;
 	int EosRetries =0; /* Counter for checking EOS to become high */
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	u16 FrameBuffer[READ_CFG_REG_COMMAND_SIZE];
-	u32 Retries =0;
-#else
 	u32 FrameBuffer[READ_CFG_REG_COMMAND_SIZE];
-#endif
 	u32 Index =0;
 
 	Xil_AssertNonvoid(InstancePtr != NULL);
@@ -228,26 +212,10 @@ u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
 	 * Create the data to be written to the ICAP.
 	 */
 	FrameBuffer[Index++] = XHI_DUMMY_PACKET;
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	FrameBuffer[Index++] = XHI_SYNC_PACKET1;
-	FrameBuffer[Index++] = XHI_SYNC_PACKET2;
-#else
 	FrameBuffer[Index++] = XHI_SYNC_PACKET;
-#endif
 	FrameBuffer[Index++] = XHI_NOOP_PACKET;
 	FrameBuffer[Index++] = XHI_NOOP_PACKET;
-
-#if (XHI_FAMILY == XHI_DEV_FAMILY_S6)
-	if (ConfigReg == XHI_IDCODE) {
-		FrameBuffer[Index++] = XHwIcap_Type1Read(ConfigReg) | 0x2;
-	}else {
-		FrameBuffer[Index++] = XHwIcap_Type1Read(ConfigReg) | 0x1;
-	}
-#else
 	FrameBuffer[Index++] = XHwIcap_Type1Read(ConfigReg) | 0x1;
-#endif
-
 	FrameBuffer[Index++] = XHI_NOOP_PACKET;
 	FrameBuffer[Index++] = XHI_NOOP_PACKET;
 
@@ -282,9 +250,6 @@ u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
 	while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
 			XHI_CR_OFFSET)) & XHI_CR_WRITE_MASK);
 
-#if (XHI_FAMILY == XHI_DEV_FAMILY_V6) ||\
-(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES)
-
 	/*
 	 * Read the Config Register using DeviceRead since
 	 * DeviceRead reads depending on ICAP Width for V6
@@ -292,37 +257,6 @@ u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
   	 */
 	XHwIcap_DeviceRead(InstancePtr, RegData, 1);
 
-#else
-
-	XHwIcap_SetSizeReg(InstancePtr, 1);
-
-	if (ConfigReg == XHI_IDCODE) {
-		XHwIcap_SetSizeReg(InstancePtr, 2);
-	}
-
-	XHwIcap_StartReadBack(InstancePtr);
-	while (XHwIcap_IsDeviceBusy(InstancePtr) != FALSE) {
-		Retries++;
-		if (Retries > XHI_MAX_RETRIES) {
-			return XST_FAILURE;
-		}
-	}
-	while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
-						XHI_CR_OFFSET)) &
-						XHI_CR_READ_MASK);
-
-	/*
-	 * Return the Register value
-	 */
-	*RegData = XHwIcap_FifoRead(InstancePtr);
-
-	if (ConfigReg == XHI_IDCODE) {
-
-		*RegData = ((*RegData << 16) |
-						(XHwIcap_FifoRead(InstancePtr)));
-	}
-
-#endif
 	return XST_SUCCESS;
 }