From 1c9f00c076aa3f98ea11a0a33a12baa112cc02f7 Mon Sep 17 00:00:00 2001 From: Andrei-Liviu Simion Date: Wed, 7 Jan 2015 12:07:51 -0800 Subject: [PATCH] dptx: Reduced the RX capability read to 16 bytes. No need to read and store unused capability information by the driver. Signed-off-by: Andrei-Liviu Simion --- XilinxProcessorIPLib/drivers/dptx/src/xdptx.c | 2 +- XilinxProcessorIPLib/drivers/dptx/src/xdptx.h | 27 +++++++++---------- 2 files changed, 13 insertions(+), 16 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c index 24ff4054..f7202995 100644 --- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c +++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c @@ -325,7 +325,7 @@ u32 XDptx_GetRxCapabilities(XDptx *InstancePtr) } Status = XDptx_AuxRead(InstancePtr, XDPTX_DPCD_RECEIVER_CAP_FIELD_START, - XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE, Dpcd); + 16, Dpcd); if (Status != XST_SUCCESS) { return XST_FAILURE; } diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.h b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.h index c8fda98b..247c3876 100644 --- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.h +++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.h @@ -351,21 +351,18 @@ typedef struct { * This typedef contains configuration information about the RX device. */ typedef struct { - u8 DpcdRxCapsField[XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE]; - /**< The raw capabilities field - of the RX device's DisplayPort - Configuration Data (DPCD). */ - u8 LaneStatusAdjReqs[6]; /**< This is a raw read of the - RX device's status registers. - The first 4 bytes correspond to - the lane status associated with - clock recovery, channel - equalization, symbol lock, and - interlane alignment. The - remaining 2 bytes represent the - pre-emphasis and voltage swing - level adjustments requested by - the RX device. */ + u8 DpcdRxCapsField[16]; /**< The first 16 bytes of the raw capabilities + field of the RX device's DisplayPort + Configuration Data (DPCD). */ + u8 LaneStatusAdjReqs[6];/**< This is a raw read of the RX device's + status registers. The first 4 bytes + correspond to the lane status associated + with clock recovery, channel + equalization, symbol lock, and interlane + alignment. The remaining 2 bytes + represent the pre-emphasis and voltage + swing level adjustments requested by the + RX device. */ } XDptx_SinkConfig; /**