diff --git a/XilinxProcessorIPLib/drivers/dptxss/examples/index.html b/XilinxProcessorIPLib/drivers/dptxss/examples/index.html index 432934b5..e9a7dc0c 100644 --- a/XilinxProcessorIPLib/drivers/dptxss/examples/index.html +++ b/XilinxProcessorIPLib/drivers/dptxss/examples/index.html @@ -7,10 +7,11 @@
-+* MODIFICATION HISTORY: +* +* Ver Who Date Changes +* ---- --- -------- -------------------------------------------------- +* 1.00 sha 09/28/15 Added modification header +* Added HDCP example. +*+* +******************************************************************************/ There are 4 DisplayPort Transmitter Subsystem examples include in this directory: 1) xdptxss_selftest_example.c : This self test example will call self test functions of each DisplayPort TX Subsystem's sub-cores to verify that the sub-cores @@ -16,6 +27,9 @@ There are 4 DisplayPort Transmitter Subsystem examples include in this directory and prints debug information at the end. This example check whether DisplayPort TX Subsystem is programmed in SST/MST. Upon MST/SST, reads EDID information and prints. +5) xdptxss_hdcp_example.c : The HDCP example setup SST mode and enables the HDCP after + RX has started. + Additionally, in order to be able to use the interrupt, MST/SST, and debug examples, the user will need to implement following functions: 1) DpTxSs_PlatformInit : This function needs to do all hardware system diff --git a/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_debug_example.c b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_debug_example.c index 11f15384..c22cf0d7 100644 --- a/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_debug_example.c +++ b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_debug_example.c @@ -52,6 +52,7 @@ * Ver Who Date Changes * ---- --- -------- -------------------------------------------------- * 1.00 sha 07/01/15 Initial release. +* 1.00 sha 09/28/15 Added HDCP debug info function call. * * ******************************************************************************/ @@ -303,6 +304,9 @@ u32 DpTxSs_DebugExample(u16 DeviceId) /* Print EDID info of RX device(s) */ DpTxSs_ReportEdidInfo(&DpTxSsInst); + /* Print HDCP debug info */ + XDpTxSs_ReportHdcpInfo(&DpTxSsInst); + /* Enable interrupts. */ Xil_ExceptionEnable(); diff --git a/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_hdcp_example.c b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_hdcp_example.c new file mode 100644 index 00000000..b7f16b6c --- /dev/null +++ b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_hdcp_example.c @@ -0,0 +1,348 @@ +/****************************************************************************** +* +* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xdptxss_hdcp_example.c +* +* This file contains a design example using the XDpTxSs driver in single stream +* (SST) transport or multi-stream transport (MST) mode and enables HDCP. +* +* @note For this example to display output, the user need to implement +* initialization of the system (DpTxSs_PlatformInit) and after +* DisplayPort TX subsystem start (XDpTxSs_Start) is complete, +* implement configuration of the video stream source in order to +* provide the DisplayPort TX Subsystem HIP input. +* The functions DpTxSs_PlatformInit and DpTxSs_StreamSrc are +* declared and are left up to the user implement. +* +*
+* MODIFICATION HISTORY: +* +* Ver Who Date Changes +* ---- --- -------- -------------------------------------------------- +* 1.00 sha 09/28/15 Initial release. +*+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xdptxss.h" +#include "xil_printf.h" +#include "xil_types.h" +#include "xparameters.h" +#include "xstatus.h" +#include "string.h" + +/************************** Constant Definitions *****************************/ + +/* The unique device ID of the DisplayPort Transmitter Subsystem HIP instance + * to be used + */ +#define XDPTXSS_DEVICE_ID XPAR_DPTXSS_0_DEVICE_ID + +/* If set to 1, example will run in MST mode. Otherwise, in SST mode. + * In MST mode, this example reads the EDID of RX devices if connected in + * daisy-chain. + */ +#define DPTXSS_MST 1 +#define DPTXSS_LINK_RATE XDPTXSS_LINK_BW_SET_540GBPS +#define DPTXSS_LANE_COUNT XDPTXSS_LANE_COUNT_SET_4 + +/* The video resolution from the display mode timings (DMT) table to use for + * DisplayPort TX Subsystem. It can be set to use preferred video mode for + * EDID of RX device. + */ +#define DPTXSS_VID_MODE XVIDC_VM_USE_EDID_PREFERRED + +/* The color depth (bits per color component) to use DisplayPort TX + * Subsystem. + */ +#define DPTXSS_BPC 8 + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + +u32 DpTxSs_HdcpExample(u16 DeviceId); +u32 DpTxSs_PlatformInit(void); +u32 DpTxSs_StreamSrc(u8 VerticalSplit); + +/************************** Variable Definitions *****************************/ + +XDpTxSs DpTxSsInst; /* The DPTX Subsystem instance.*/ + +/************************** Function Definitions *****************************/ + + +/*****************************************************************************/ +/** +* +* This is the main function for XDpTxSs SST/MST example. +* +* @param None. +* +* @return +* - XST_SUCCESS if the MST/SST example passed. +* - XST_FAILURE if the MST/SST example was unsuccessful. +* +* @note None. +* +******************************************************************************/ +int main() +{ + u32 Status; + + xil_printf("-------------------------------------------\n\r"); + xil_printf("DisplayPort TX Subsystem HDCP example\n\r"); + xil_printf("(c) 2015 by Xilinx\n\r"); + xil_printf("-------------------------------------------\n\r\n\r"); + + Status = DpTxSs_HdcpExample(XDPTXSS_DEVICE_ID); + if (Status != XST_SUCCESS) { + xil_printf("DisplayPort TX Subsystem HDCP example failed." + "\n\r"); + return XST_FAILURE; + } + + xil_printf("DisplayPort TX Subsystem HDCP example passed\n\r"); + + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* +* This function is the main entry point for the HDCP example using the +* XDpTxSs driver. This function will enable HDCP during DisplayPort TX +* Subsystem set up to work in MST/SST mode. +* +* @param DeviceId is the unique device ID of the DisplayPort TX +* Subsystem core. +* +* @return +* - XST_SUCCESS if DisplayPort TX Subsystem HDCP enabled +* successfully. +* - XST_FAILURE, otherwise. +* +* @note None. +* +******************************************************************************/ +u32 DpTxSs_HdcpExample(u16 DeviceId) +{ + u32 Status; + u8 VSplitMode = 0; + XDpTxSs_Config *ConfigPtr; + + /* Do platform initialization in this function. This is hardware + * system specific. It is up to the user to implement this function. + */ + xil_printf("PlatformInit\n\r"); + Status = DpTxSs_PlatformInit(); + if (Status != XST_SUCCESS) { + xil_printf("Platform init failed!\n\r"); + } + xil_printf("Platform initialization done.\n\r"); + + /* Obtain the device configuration for the DisplayPort TX Subsystem */ + ConfigPtr = XDpTxSs_LookupConfig(DeviceId); + if (!ConfigPtr) { + return XST_FAILURE; + } + /* Copy the device configuration into the DpTxSsInst's Config + * structure. */ + Status = XDpTxSs_CfgInitialize(&DpTxSsInst, ConfigPtr, + ConfigPtr->BaseAddress); + if (Status != XST_SUCCESS) { + xil_printf("DPTXSS config initialization failed.\n\r"); + return XST_FAILURE; + } + + /* Check for SST/MST support */ + if (DpTxSsInst.UsrOpt.MstSupport) { + xil_printf("\n\rINFO:DPTXSS is MST enabled. DPTXSS can be " + "switched to SST/MST\n\r\n\r"); + } + else { + xil_printf("\n\rINFO:DPTXSS is SST enabled. DPTXSS works " + "only in SST mode.\n\r\n\r"); + } + + /* Read capabilities of RX device */ + Status = XDpTxSs_GetRxCapabilities(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR: RX device is not connected.\r\n"); + + /* Enable interrupts. */ + Xil_ExceptionEnable(); + + return XST_FAILURE; + } + + /* Set Link rate and lane count to maximum */ + XDpTxSs_SetLinkRate(&DpTxSsInst, DPTXSS_LINK_RATE); + XDpTxSs_SetLaneCount(&DpTxSsInst, DPTXSS_LANE_COUNT); + + /* Set video mode */ + XDpTxSs_SetVidMode(&DpTxSsInst, DPTXSS_VID_MODE); + + /* Set BPC */ + XDpTxSs_SetBpc(&DpTxSsInst, DPTXSS_BPC); + + /* Check whether DPTXSS and RX device is in MST */ + Status = XDpTxSs_IsMstCapable(&DpTxSsInst); + if (DpTxSsInst.UsrOpt.MstSupport && DPTXSS_MST && + (Status == XST_SUCCESS)) { + /* Set DPTXSS in MST mode */ + XDpTxSs_SetTransportMode(&DpTxSsInst, 1); + } + else { + /* Set DPTXSS in SST mode */ + XDpTxSs_SetTransportMode(&DpTxSsInst, 0); + } + +#if (XPAR_XHDCP_NUM_INSTANCES > 0) + /* Enable HDCP */ + Status = XDpTxSs_HdcpEnable(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS HDCP enable failed\n\r"); + return XST_FAILURE; + } + + /* Execute HDCP TX state machine */ + Status = XDpTxSs_Poll(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS HDCP poll failed\n\r"); + return XST_FAILURE; + } +#endif + + /* Start DPTXSS parameters set */ + Status = XDpTxSs_Start(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS start failed\n\r"); + + /* Enable interrupts. */ + Xil_ExceptionEnable(); + + return XST_FAILURE; + } + + if ((DpTxSsInst.UsrOpt.VmId == (XVIDC_VM_UHD2_60_P)) && + (DpTxSsInst.UsrOpt.MstSupport)) { + VSplitMode = 1; + } + else { + VSplitMode = 0; + } + +#if (XPAR_XHDCP_NUM_INSTANCES > 0) + /* Set authenticate */ + Status = XDpTxSs_Authenticate(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS HDCP AUTH failed\n\r"); + return XST_FAILURE; + } + + /* Enable encryption for stream 1 */ + XDpTxSs_EnableEncryption(&DpTxSsInst, 0); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS HDCP encrypt failed\n\r"); + return XST_FAILURE; + } + + /* Execute HDCP TX state machine */ + Status = XDpTxSs_Poll(&DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR:DPTX SS HDCP poll failed\n\r"); + return XST_FAILURE; + } +#endif + + /* Do stream setup in this function. It is up to the user to implement + * this function. + */ + DpTxSs_StreamSrc(VSplitMode); + + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* +* This function initialize required platform-specifc peripherals. +* +* @param None. +* +* @return +* - XST_SUCCESS if required peripherals are initialized and +* configured successfully. +* - XST_FAILURE, otherwise. +* +* @note None. +* +******************************************************************************/ +u32 DpTxSs_PlatformInit(void) +{ + /* User is responsible to setup platform specific initialization */ + + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* +* This function setup stream source to input DisplayPort TX Subsystem. +* +* @param VerticalSplit specifies whether to split video frame +* vertically into two different vertical halves. +* - 1 = Vertically split input frame +* - 0 = No vertically split input frame. +* +* @return +* - XST_SUCCESS if stream source is configured successfully. +* - XST_FAILURE, otherwise. +* +* @note None. +* +******************************************************************************/ +u32 DpTxSs_StreamSrc(u8 VerticalSplit) +{ + /* User is responsible to setup stream source to input DPTXSS */ + + return XST_SUCCESS; +} diff --git a/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_intr_example.c b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_intr_example.c index a22fecb3..50b0382b 100644 --- a/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_intr_example.c +++ b/XilinxProcessorIPLib/drivers/dptxss/examples/xdptxss_intr_example.c @@ -56,6 +56,9 @@ * Ver Who Date Changes * ---- --- -------- -------------------------------------------------- * 1.00 sha 07/01/15 Initial release. +* 2.00 sha 09/28/15 Added HDCP, Timer Counter interrupt handier registration. +* Added set MSA callback. +* * * ******************************************************************************/ @@ -85,12 +88,26 @@ * INTC. INTC selection is based on INTC parameters defined xparameters.h file. */ #ifdef XPAR_INTC_0_DEVICE_ID -#define XINTC_DPTXSS_DP_INTERRUPT_ID XPAR_INTC_0_DPTXSS_0_VEC_ID +#define XINTC_DPTXSS_DP_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_DP_IRQ_VEC_ID +#if (XPAR_XHDCP_NUM_INSTANCES > 0) +#define XINTC_DPTXSS_HDCP_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_HDCP_IRQ_VEC_ID +#define XINTC_DPTXSS_TMR_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_TIMER_IRQ_VEC_ID +#endif #define XINTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID #define XINTC XIntc #define XINTC_HANDLER XIntc_InterruptHandler #else /* Else part */ -#define XINTC_DPTXSS_DP_INTERRUPT_ID XPAR_INTC_0_DPTXSS_0_VEC_ID +#define XINTC_DPTXSS_DP_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_DP_IRQ_VEC_ID +#if (XPAR_XHDCP_NUM_INSTANCES > 0) +#define XINTC_DPTXSS_HDCP_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_HDCP_IRQ_VEC_ID +#define XINTC_DPTXSS_TMR_INTERRUPT_ID \ + XPAR_INTC_0_DPTXSS_0_DPTXSS_TIMER_IRQ_VEC_ID +#endif #define XINTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID #define XINTC XScuGic #define XINTC_HANDLER XScuGic_InterruptHandler @@ -136,6 +153,10 @@ u32 DpTxSs_StreamSrc(u8 VerticalSplit); u32 DpTxSs_SetupIntrSystem(void); void DpTxSs_HpdEventHandler(void *InstancePtr); void DpTxSs_HpdPulseHandler(void *InstancePtr); +void DpTxSs_LaneCountChangeHandler(void *InstancePtr); +void DpTxSs_LinkRateChangeHandler(void *InstancePtr); +void DpTxSs_PeVsAdjustHandler(void *InstancePtr); +void DpTxSs_MsaHandler(void *InstancePtr); static void DpTxSs_HpdEventCommon(XDpTxSs *InstancePtr, u8 Mode); /************************** Variable Definitions *****************************/ @@ -329,11 +350,19 @@ u32 DpTxSs_SetupIntrSystem(void) u32 Status; XINTC *IntcInstPtr = &IntcInst; - /* Set the HPD interrupt handlers. */ + /* Set interrupt handlers. */ XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_HPD_EVENT, DpTxSs_HpdEventHandler, &DpTxSsInst); XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_HPD_PULSE, DpTxSs_HpdPulseHandler, &DpTxSsInst); + XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_LANE_COUNT_CHG, + DpTxSs_LaneCountChangeHandler, &DpTxSsInst); + XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_LINK_RATE_CHG, + DpTxSs_LinkRateChangeHandler, &DpTxSsInst); + XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_PE_VS_ADJUST, + DpTxSs_PeVsAdjustHandler, &DpTxSsInst); + XDpTxSs_SetCallBack(&DpTxSsInst, XDPTXSS_HANDLER_DP_SET_MSA, + DpTxSs_MsaHandler, &DpTxSsInst); #ifdef XPAR_INTC_0_DEVICE_ID @@ -358,6 +387,28 @@ u32 DpTxSs_SetupIntrSystem(void) /* Enable the interrupt vector at the interrupt controller */ XIntc_Enable(IntcInstPtr, XINTC_DPTXSS_DP_INTERRUPT_ID); +#if (XPAR_XHDCP_NUM_INSTANCES > 0) + /* Hook up interrupt service routine */ + Status = XIntc_Connect(IntcInstPtr, XINTC_DPTXSS_HDCP_INTERRUPT_ID, + (XInterruptHandler)XDpTxSs_HdcpIntrHandler, + &DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR: DP TX SS DP interrupt connect failed!\n\r"); + return XST_FAILURE; + } + /* Hook up interrupt service routine */ + Status = XIntc_Connect(IntcInstPtr, XINTC_DPTXSS_TMR_INTERRUPT_ID, + (XInterruptHandler)XDpTxSs_TmrCtrIntrHandler, + &DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR: DP TX SS DP interrupt connect failed!\n\r"); + return XST_FAILURE; + } + /* Enable the interrupt vector at the interrupt controller */ + XIntc_Enable(IntcInstPtr, XINTC_DPTXSS_HDCP_INTERRUPT_ID); + XIntc_Enable(IntcInstPtr, XINTC_DPTXSS_TMR_INTERRUPT_ID); +#endif + /* Start the interrupt controller such that interrupts are recognized * and handled by the processor */ @@ -397,6 +448,28 @@ u32 DpTxSs_SetupIntrSystem(void) /* Enable the interrupt for the Pixel Splitter device */ XScuGic_Enable(IntcInstance, XINTC_DPTXSS_DP_INTERRUPT_ID); + +#if (XPAR_XHDCP_NUM_INSTANCES > 0) + /* Hook up interrupt service routine */ + Status = XIntc_Connect(IntcInstPtr, XINTC_DPTXSS_HDCP_INTERRUPT_ID, + (XInterruptHandler)XDpTxSs_HdcpIntrHandler, + &DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR: DP TX SS DP interrupt connect failed!\n\r"); + return XST_FAILURE; + } + /* Hook up interrupt service routine */ + Status = XIntc_Connect(IntcInstPtr, XINTC_DPTXSS_TMR_INTERRUPT_ID, + (XInterruptHandler)XDpTxSs_TmrCtrIntrHandler, + &DpTxSsInst); + if (Status != XST_SUCCESS) { + xil_printf("ERR: DP TX SS DP interrupt connect failed!\n\r"); + return XST_FAILURE; + } + /* Enable the interrupt vector at the interrupt controller */ + XIntc_Enable(IntcInstPtr, XINTC_DPTXSS_HDCP_INTERRUPT_ID); + XIntc_Enable(IntcInstPtr, XINTC_DPTXSS_TMR_INTERRUPT_ID); +#endif #endif /* Initialize the exception table. */ Xil_ExceptionInit(); @@ -496,6 +569,80 @@ void DpTxSs_HpdPulseHandler(void *InstancePtr) } } +/*****************************************************************************/ +/** +* +* This function is called when the lane count change interrupt occurs. +* +* @param InstancePtr is a pointer to the XDpTxSs instance. +* +* @return None. +* +* @note Use the XDpTxSs_SetCallback driver function to set this +* function as the handler for lane count change. +* +******************************************************************************/ +void DpTxSs_LaneCountChangeHandler(void *InstancePtr) +{ + xil_printf("Interrupt: lane count change.\n\r"); +} + +/*****************************************************************************/ +/** +* +* This function is called when the link rate change interrupt occurs. +* +* @param InstancePtr is a pointer to the XDpTxSs instance. +* +* @return None. +* +* @note Use the XDpTxSs_SetCallback driver function to set this +* function as the handler for link rate change. +* +******************************************************************************/ +void DpTxSs_LinkRateChangeHandler(void *InstancePtr) +{ + xil_printf("Interrupt: link rate change.\n\r"); +} + +/*****************************************************************************/ +/** +* +* This function is called when the pre-emphasis and voltage swing adjustment +* interrupt occurs. +* +* @param InstancePtr is a pointer to the XDpTxSs instance. +* +* @return None. +* +* @note Use the XDpTxSs_SetCallback driver function to set this +* function as the handler for pre-emphasis and voltage swing +* adjust. +* +******************************************************************************/ +void DpTxSs_PeVsAdjustHandler(void *InstancePtr) +{ + xil_printf("Interrupt: pre-emphasis and voltage swing adjust.\n\r"); +} + +/*****************************************************************************/ +/** +* +* This callback is called when RX MSA values to be copied into TX MSA. +* +* @param InstancePtr is a pointer to the XDpTxSs instance. +* +* @return None. +* +* @note Use the XDpTxSs_SetCallback driver function to set this +* function as the handler MSA copy. +* +******************************************************************************/ +void DpTxSs_MsaHandler(void *InstancePtr) +{ + xil_printf("Interrupt: MSA handler.\n\r"); +} + /*****************************************************************************/ /** *