diff --git a/lib/sw_apps/zynqmp_fsbl/src/xfsbl_hw.h b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_hw.h
index b79bde85..65af9ddd 100644
--- a/lib/sw_apps/zynqmp_fsbl/src/xfsbl_hw.h
+++ b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_hw.h
@@ -455,7 +455,7 @@ extern "C" {
 /**
  * Definition for QSPI to be included
  */
-#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPS_0_DEVICE_ID))
+#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPSU_0_DEVICE_ID))
 #define XFSBL_QSPI
 #define XFSBL_QSPI_BASEADDRESS	XPAR_XQSPIPS_0_BASEADDR
 #endif
diff --git a/lib/sw_apps/zynqmp_fsbl/src/xfsbl_qspi.c b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_qspi.c
index 2be3fed0..79d1b92f 100644
--- a/lib/sw_apps/zynqmp_fsbl/src/xfsbl_qspi.c
+++ b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_qspi.c
@@ -918,17 +918,13 @@ u32 XFsbl_Qspi32Copy(u32 SrcAddress, PTRSIZE DestAddress, u32 Length)
 				(ReadCommand == QUAD_READ_CMD_32BIT)) {
 
 			/* Update Dummy cycles as per flash specs for QUAD IO */
-			if (ReadCommand == FAST_READ_CMD_32BIT) {
-				FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
-			}
 
-			if (ReadCommand == DUAL_READ_CMD_32BIT) {
-				FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
-			}
-
-			if (ReadCommand == QUAD_READ_CMD_32BIT){
-				FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
-			}
+			/*
+			 * Silicon and REMUS do not care what the SPI mode is
+			 * for dummies, but QEMU expects it to match the address
+			 * phase. Make it so.
+			 */
+			FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
 
 			FlashMsg[1].TxBfrPtr = NULL;
 			FlashMsg[1].RxBfrPtr = NULL;