From 20398c29dc2b3b92811c2ca20e9694cff1b4ac10 Mon Sep 17 00:00:00 2001 From: P L Sai Krishna Date: Tue, 18 Aug 2015 14:58:31 +0530 Subject: [PATCH] bsp: Corrected interrupt ID's of TTC. This patch correct the interrupt ID's of TTC which will be used by TEST APP. Signed-off-by: P L Sai Krishna Reviewed-by: Harini Katakam --- .../standalone/src/cortexa53/32bit/xparameters_ps.h | 11 +++++++---- .../standalone/src/cortexa53/64bit/xparameters_ps.h | 10 ++++++---- lib/bsp/standalone/src/cortexr5/xparameters_ps.h | 10 ++++++---- 3 files changed, 19 insertions(+), 12 deletions(-) diff --git a/lib/bsp/standalone/src/cortexa53/32bit/xparameters_ps.h b/lib/bsp/standalone/src/cortexa53/32bit/xparameters_ps.h index 2ab2b6a4..84c79c90 100644 --- a/lib/bsp/standalone/src/cortexa53/32bit/xparameters_ps.h +++ b/lib/bsp/standalone/src/cortexa53/32bit/xparameters_ps.h @@ -313,10 +313,13 @@ extern "C" { #define XPAR_PSU_TTC_3_INTR XPS_TTC1_0_INT_ID #define XPAR_PSU_TTC_4_INTR XPS_TTC1_1_INT_ID #define XPAR_PSU_TTC_5_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_6_INTR XPS_TTC1_0_INT_ID -#define XPAR_PSU_TTC_7_INTR XPS_TTC1_1_INT_ID -#define XPAR_PSU_TTC_8_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_9_INTR XPS_TTC1_0_INT_ID +#define XPAR_PSU_TTC_6_INTR XPS_TTC2_0_INT_ID +#define XPAR_PSU_TTC_7_INTR XPS_TTC2_1_INT_ID +#define XPAR_PSU_TTC_8_INTR XPS_TTC2_2_INT_ID +#define XPAR_PSU_TTC_9_INTR XPS_TTC3_0_INT_ID +#define XPAR_PSU_TTC_10_INTR XPS_TTC3_1_INT_ID +#define XPAR_PSU_TTC_11_INTR XPS_TTC3_2_INT_ID + #define XPAR_XADCPS_NUM_INSTANCES 1U #define XPAR_XADCPS_0_DEVICE_ID 0U diff --git a/lib/bsp/standalone/src/cortexa53/64bit/xparameters_ps.h b/lib/bsp/standalone/src/cortexa53/64bit/xparameters_ps.h index 687ca14d..965dcdfe 100644 --- a/lib/bsp/standalone/src/cortexa53/64bit/xparameters_ps.h +++ b/lib/bsp/standalone/src/cortexa53/64bit/xparameters_ps.h @@ -313,10 +313,12 @@ extern "C" { #define XPAR_PSU_TTC_3_INTR XPS_TTC1_0_INT_ID #define XPAR_PSU_TTC_4_INTR XPS_TTC1_1_INT_ID #define XPAR_PSU_TTC_5_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_6_INTR XPS_TTC1_0_INT_ID -#define XPAR_PSU_TTC_7_INTR XPS_TTC1_1_INT_ID -#define XPAR_PSU_TTC_8_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_9_INTR XPS_TTC1_0_INT_ID +#define XPAR_PSU_TTC_6_INTR XPS_TTC2_0_INT_ID +#define XPAR_PSU_TTC_7_INTR XPS_TTC2_1_INT_ID +#define XPAR_PSU_TTC_8_INTR XPS_TTC2_2_INT_ID +#define XPAR_PSU_TTC_9_INTR XPS_TTC3_0_INT_ID +#define XPAR_PSU_TTC_10_INTR XPS_TTC3_1_INT_ID +#define XPAR_PSU_TTC_11_INTR XPS_TTC3_2_INT_ID #define XPAR_XADCPS_NUM_INSTANCES 1U #define XPAR_XADCPS_0_DEVICE_ID 0U diff --git a/lib/bsp/standalone/src/cortexr5/xparameters_ps.h b/lib/bsp/standalone/src/cortexr5/xparameters_ps.h index 91b14f3d..50fe77dd 100644 --- a/lib/bsp/standalone/src/cortexr5/xparameters_ps.h +++ b/lib/bsp/standalone/src/cortexr5/xparameters_ps.h @@ -311,10 +311,12 @@ extern "C" { #define XPAR_PSU_TTC_3_INTR XPS_TTC1_0_INT_ID #define XPAR_PSU_TTC_4_INTR XPS_TTC1_1_INT_ID #define XPAR_PSU_TTC_5_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_6_INTR XPS_TTC1_0_INT_ID -#define XPAR_PSU_TTC_7_INTR XPS_TTC1_1_INT_ID -#define XPAR_PSU_TTC_8_INTR XPS_TTC1_2_INT_ID -#define XPAR_PSU_TTC_9_INTR XPS_TTC1_0_INT_ID +#define XPAR_PSU_TTC_6_INTR XPS_TTC2_0_INT_ID +#define XPAR_PSU_TTC_7_INTR XPS_TTC2_1_INT_ID +#define XPAR_PSU_TTC_8_INTR XPS_TTC2_2_INT_ID +#define XPAR_PSU_TTC_9_INTR XPS_TTC3_0_INT_ID +#define XPAR_PSU_TTC_10_INTR XPS_TTC3_1_INT_ID +#define XPAR_PSU_TTC_11_INTR XPS_TTC3_2_INT_ID #define XPAR_XADCPS_NUM_INSTANCES 1U #define XPAR_XADCPS_0_DEVICE_ID 0U