diff --git a/XilinxProcessorIPLib/drivers/qspips/src/xqspips.c b/XilinxProcessorIPLib/drivers/qspips/src/xqspips.c
index b2606345..e3b7d796 100755
--- a/XilinxProcessorIPLib/drivers/qspips/src/xqspips.c
+++ b/XilinxProcessorIPLib/drivers/qspips/src/xqspips.c
@@ -1057,7 +1057,9 @@ int XQspiPs_LqspiRead(XQspiPs *InstancePtr, u8 *RecvBufPtr,
 	Xil_AssertNonvoid(ByteCount > 0);
 	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-#ifdef XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR
+#ifndef XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR
+#define	XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000
+#endif
 	/*
 	 * Enable the controller
 	 */
@@ -1079,10 +1081,6 @@ int XQspiPs_LqspiRead(XQspiPs *InstancePtr, u8 *RecvBufPtr,
 	 */
 	XQspiPs_Disable(InstancePtr);
 
-#else
-	return XST_FAILURE;
-#endif
-
 }
 
 /*****************************************************************************/
diff --git a/XilinxProcessorIPLib/drivers/qspips/src/xqspips_hw.c b/XilinxProcessorIPLib/drivers/qspips/src/xqspips_hw.c
index ef0b9f28..ae375c93 100755
--- a/XilinxProcessorIPLib/drivers/qspips/src/xqspips_hw.c
+++ b/XilinxProcessorIPLib/drivers/qspips/src/xqspips_hw.c
@@ -188,17 +188,17 @@ void XQspiPs_LinearInit(u32 BaseAddress)
 	 * enable linear mode and use fast read.
 	 */
 
-	if(XPAR_PS7_QSPI_0_QSPI_MODE == XQSPIPS_CONNECTION_MODE_SINGLE){
+	if(XPAR_XQSPIPS_0_QSPI_MODE == XQSPIPS_CONNECTION_MODE_SINGLE){
 
 		LinearCfg = XQSPIPS_LQSPI_CR_RST_STATE;
 
-	}else if(XPAR_PS7_QSPI_0_QSPI_MODE ==
+	}else if(XPAR_XQSPIPS_0_QSPI_MODE ==
 			XQSPIPS_CONNECTION_MODE_STACKED){
 
 		LinearCfg = XQSPIPS_LQSPI_CR_RST_STATE |
 				XQSPIPS_LQSPI_CR_TWO_MEM_MASK;
 
-	}else if(XPAR_PS7_QSPI_0_QSPI_MODE ==
+	}else if(XPAR_XQSPIPS_0_QSPI_MODE ==
 	 		XQSPIPS_CONNECTION_MODE_PARALLEL){
 
 		LinearCfg = XQSPIPS_LQSPI_CR_RST_STATE |