diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/annotated.html index 71f6ed08..8bbcf5f1 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/annotated.html @@ -2,25 +2,31 @@ - Class List + Xilinx Driver trafgen v3_2: Class List - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
+ + + +

Class List

Here are the classes, structs, unions and interfaces with brief descriptions: @@ -30,4 +36,9 @@
XTrafGen
XTrafGen_Cmd
XTrafGen_CRamCmd
XTrafGen_PRamCmd
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/classes.html new file mode 100755 index 00000000..279b7aad --- /dev/null +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/classes.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver trafgen v3_2: Alphabetical List + + + +

Xilinx Processor IP Library

+Software Drivers +
+ + + +
+

Class Index

X
+ +
  X  
+		XTrafGen_Cmd   XTrafGen_CmdInfo   XTrafGen_CRamCmd   XTrafGen_PRamCmd   
XTrafGen   XTrafGen_CmdEntry   XTrafGen_Config   
X
+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/files.html index c1fdc884..22af1679 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/files.html @@ -2,29 +2,41 @@ - File Index + Xilinx Driver trafgen v3_2: File Index - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-

File List

Here is a list of all documented files with brief descriptions: + + + +
+

File List

Here is a list of all files with brief descriptions:
+
xtrafgen.c
xtrafgen.h
xtrafgen_g.c
xtrafgen_hw.h
xtrafgen_sinit.c
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + +

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions.html index 18b4e358..9633bd9e 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions.html @@ -2,129 +2,262 @@ - Class Members + Xilinx Driver trafgen v3_2: Class Members - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-
- -
-
- -
-

-Here is a list of all documented class members with links to the class documentation for each member: -

-

- a -

+ +

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions_vars.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions_vars.html index f95832e5..78e68157 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions_vars.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/functions_vars.html @@ -2,129 +2,262 @@ - Class Members - Variables + Xilinx Driver trafgen v3_2: Class Members - Variables - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-
- -
-
- -
-

+ +

+
  -

-

- a -

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals.html index 7810dc09..662bc40c 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals.html @@ -2,181 +2,57 @@ - Class Members + Xilinx Driver trafgen v3_2: Class Members - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-
- -
-
- -
-

-Here is a list of all documented file members with links to the documentation: -

-

- x -

-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +
+Here is a list of all file members with links to the files they belong to: + +

- m -

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x6e.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x6e.html new file mode 100755 index 00000000..5fda9a2b --- /dev/null +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x6e.html @@ -0,0 +1,57 @@ + + + + + Xilinx Driver trafgen v3_2: Class Members + + + +

Xilinx Processor IP Library

+Software Drivers +
+ + + +
+Here is a list of all file members with links to the files they belong to: + +

- n -

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x78.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x78.html new file mode 100755 index 00000000..f6efdfed --- /dev/null +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_0x78.html @@ -0,0 +1,659 @@ + + + + + Xilinx Driver trafgen v3_2: Class Members + + + +

Xilinx Processor IP Library

+Software Drivers +
+ + + +
+Here is a list of all file members with links to the files they belong to: + +

- x -

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_defs.html index eddfe6e2..7b5fc25f 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_defs.html @@ -2,173 +2,637 @@ - Class Members + Xilinx Driver trafgen v3_2: Class Members - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-
- -
-
- -
-

+ +

+
  -

-

- x -

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_func.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_func.html index 37141c96..1ef9b065 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_func.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_func.html @@ -2,42 +2,76 @@ - Class Members + Xilinx Driver trafgen v3_2: Class Members - +

Xilinx Processor IP Library

Software Drivers
- -
-
-
-
-
- + + + -  -

-

+
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_vars.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_vars.html new file mode 100755 index 00000000..f68720a7 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/globals_vars.html @@ -0,0 +1,48 @@ + + + + + Xilinx Driver trafgen v3_2: Class Members + + + +

Xilinx Processor IP Library

+Software Drivers +
+ + + +
+  +
+

+Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

+ + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/index.html index 021c1da4..475b7759 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/index.html @@ -2,98 +2,109 @@ - trafgen v3_1 + Xilinx Driver trafgen v3_2: trafgen v3_2 - +

Xilinx Processor IP Library

Software Drivers
- -
-
-

trafgen v3_1

-

-This file contains the implementation of the AXI Traffic Generator driver. User documentation for the driver functions is contained in this file in the form of comment blocks at the front of each function.

-The AXI Traffic Generator IP is designed to generate AXI4 traffic which can be used to stress different modules/interconnect connected in the system. Different configurable options allow the user to generate a wide variety of traffic based on their requirements. The core is broadly separated into a master and slave block, each of which contains the write block and read block. Other support features are provided by the Control registers and Internal RAMs.

-The commands to be issued by the AXI traffic generator are loaded in a 128-bit wide, 512 deep command RAM through AXI Slave interface. After the core is enabled, control logic issues the write/read commands based on the command settings programmed. The core updates the Status registers and asserts interrupts on the completion of issuing programmed commands.

-The Axi Traffic Genrator has five different modes:

+ + +

+
+

trafgen v3_2

This file contains the implementation of the AXI Traffic Generator driver. User documentation for the driver functions is contained in this file in the form of comment blocks at the front of each function.

+

The AXI Traffic Generator IP is designed to generate AXI4 traffic which can be used to stress different modules/interconnect connected in the system. Different configurable options allow the user to generate a wide variety of traffic based on their requirements. The core is broadly separated into a master and slave block, each of which contains the write block and read block. Other support features are provided by the Control registers and Internal RAMs.

+

The commands to be issued by the AXI traffic generator are loaded in a 128-bit wide, 512 deep command RAM through AXI Slave interface. After the core is enabled, control logic issues the write/read commands based on the command settings programmed. The core updates the Status registers and asserts interrupts on the completion of issuing programmed commands.

+

The Axi Traffic Genrator has five different modes:

-

+

  • Advanced Mode: Advanced Mode allows full control over the traffic genration Control registers are provided to you to program the core to genrate different AXI4 transactions.
    • + -

    +

  • Basic Mode: Basic Mode allows basic AXI4 traffic genration with less resource overhead.
    • + -

    +

  • Static Mode: Static Mode allows you to genrate a simple AXI4 traffic with very less resource and minimum processor intervention.In this Mode the core continuously genrates fixed address and fixed length INCR type read and write transfers.
    • + -

    +

  • System Init Mode: System Init Mode is a special Mode where core provides only AXI4-Lite Master write interface.This mode can be used in a system without a processor to initialize the system peripherals with preconfigured values on system reset.
    • + -

    -Initialization & Configuration

    -The XTrafGen_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    -To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in the following way:

    +

  • Streaming Mode: In Streaming Mode the core can be configured to generate traffic based on the register configuration.
    • + +

    Initialization & Configuration

    +

    The XTrafGen_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    +

    To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in the following way:

    -

    +

  • XTrafGen_LookupConfig(DeviceId) - Use the devide identifier to find the static configuration structure defined in xtrafgen_g.c. This is setup by the tools. For some operating systems the config structure will be initialized by the software and this call is not needed.
    • + -

    -Command Handling

    -AXI Traffic Generator core operates based on the commands programmed into Command and Parameter RAMs. The CMDRAM and PARAMRAM is divided into two regions: write and read. Each region can hold 256 entries. Once the core is enabled, the internal control logic issues write/read commands. To handle command programming efficiently, we are maintaining a software list of commands. Following APIs are provided to handle this mechanism:

    +

  • XTrafGen_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the provided virtual memory base address replaces the physical address present in the configuration structure.
    • + +

    Command Handling

    +

    AXI Traffic Generator core operates based on the commands programmed into Command and Parameter RAMs. The CMDRAM and PARAMRAM is divided into two regions: write and read. Each region can hold 256 entries. Once the core is enabled, the internal control logic issues write/read commands. To handle command programming efficiently, we are maintaining a software list of commands. Following APIs are provided to handle this mechanism:

    -

    +

  • XTrafGen_AddCommand(): This function prepares the Command Words and Parameter Word from the Command structure passed from the user application. It then adds to a software list of commands.
    • + -

    +

  • XTrafGen_WriteCmdsToHw(): This function writes the prepared list of Command and Parameter Words prepared to CMDRAM and PARAMRAM.
    • + -

    +

  • XTrafGen_GetLastValidIndex(): This function gets last Valid Command Index of Write/Read region. The last valid command index is used to set 'my_depend' and 'other_depend' fields of the Command RAM.
    • + -

    +

  • XTrafGen_EraseAllCommands(): This function clears the list of commands maintained in software and also updates the respective RAMs.
    • + -

    -Master RAM Handling

    -AXI Traffic Generator uses MSTRAM to

    -

    +

  • XTrafGen_PrintAllCmds(): This function displays the list of commands.
    • + +

    Master RAM Handling

    +

    AXI Traffic Generator uses MSTRAM to

    -

    -Interrupts

    -The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for one of the following conditions:

    -

    -The application can control which interrupts are enabled using these functions:

    -

    -The interrupt system has to be set up and if the interrupts are enabled, Traffic Generator notifies the software either about the completion or an error in transfer through interrupts.

    - Examples

    -We provided two examples to show how to use the driver API:

    -

    - Asserts

    -Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that users leave asserts on during development.

    -RTOS Independence

    -This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.

    +

  • Take data from this RAM for write transactions
    • +
  • Store data to this RAM for read transaction User need to call this API to write/read to/from Master RAM,
    • + + +

    Interrupts

    +

    The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for one of the following conditions:

    + +

    The application can control which interrupts are enabled using these functions:

    + +

    The interrupt system has to be set up and if the interrupts are enabled, Traffic Generator notifies the software either about the completion or an error in transfer through interrupts.

    +

    Examples

    +

    We provided two examples to show how to use the driver API:

    + +

    Asserts

    +

    Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that users leave asserts on during development.

    +

    RTOS Independence

    +

    This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a srt  01/24/13 First release
  1.01a adk  03/09/13 Updated Driver to Support Streaming and Static Mode
  2.00a adk  16/09/13 Fixed CR:737291
- 2.01a adk  21/10/13 Fixed CR:740522 Updated the MasterRam offset as per latest 
+ 2.01a adk  21/10/13 Fixed CR:740522 Updated the MasterRam offset as per latest
 		      IP.This driver is valid only for IP(v2.0) onwards. The 
 		      XTG_MASTER_RAM_OFFSET has been changed from 
 		      0x10000 to 0xc000.
@@ -102,4 +113,12 @@ This driver is intended to be RTOS and processor independent. It works with phys
  3.0   adk  12/10/13 Updated as per the New Tcl API's
  3.1   adk  28/04/14 Fixed CR:782131 Incorrect mask value for the
 		      loopenable bit.
-
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 3.2 adk 05/08/14 Fixed CR:798742 The last word of 8KB Master RAM in + axi traffic generator can't access and CR:799554 + Some incorrect parameter in axi traffic generator driver. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen-members.html index d4db8e9a..96c35833 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen-members.html @@ -2,29 +2,41 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen Member List

    This is the complete list of members for XTrafGen, including all inherited members.

    - - - - - -
    CmdInfoXTrafGen
    ConfigXTrafGen
    MasterWidthXTrafGen
    OperatingModeXTrafGen
    SlaveWidthXTrafGen
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen Member List

    This is the complete list of members for XTrafGen, including all inherited members. + + + + + + +
    CmdInfoXTrafGen
    ConfigXTrafGen
    IsReadyXTrafGen
    MasterWidthXTrafGen
    OperatingModeXTrafGen
    SlaveWidthXTrafGen
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen.html index 8e0146c2..d1a35edd 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen.html @@ -2,160 +2,137 @@ - XTrafGen Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -The XTrafGen driver instance data. An instance must be allocated for each Traffic Generator device in use. -

    + + +

    +
    +

    XTrafGen Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - - - - - + + + + + + +

    Public Attributes

    XTrafGen_Config Config
    u8 OperatingMode
    u8 MasterWidth
    u8 SlaveWidth
    XTrafGen_CmdInfo CmdInfo

    Public Attributes

    XTrafGen_Config Config
    u8 OperatingMode
    u8 MasterWidth
    u8 SlaveWidth
    XTrafGen_CmdInfo CmdInfo
    int IsReady
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    The XTrafGen driver instance data. An instance must be allocated for each Traffic Generator device in use.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    XTrafGen_CmdInfo XTrafGen::CmdInfo XTrafGen_CmdInfo XTrafGen::CmdInfo
    -
    - - - - - -
    -   - + +
    +

    Command Info structure

    -

    -Command Info structure

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XTrafGen_Config XTrafGen::Config XTrafGen_Config XTrafGen::Config
    -
    - - - - - -
    -   - + +
    +

    Config Structure

    -

    -Config Structure

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen::MasterWidth int XTrafGen::IsReady
    -
    - - - - - -
    -   - + +
    -

    -Master Width

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen::OperatingMode u8 XTrafGen::MasterWidth
    -
    - - - - - -
    -   - + +
    +

    Master Width

    -

    -Operating mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen::SlaveWidth u8 XTrafGen::OperatingMode
    -
    - - - - - -
    -   - + +
    +

    Operating mode

    + +
    + + +
    +
    + + + + +
    u8 XTrafGen::SlaveWidth
    +
    +
    +

    Slave Width

    + +
    +
    +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Slave Width

    -

    The documentation for this struct was generated from the following file: -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd-members.html index 16185e15..0feb1061 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd-members.html @@ -2,39 +2,51 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CRamCmd Member List

    This is the complete list of members for XTrafGen_CRamCmd, including all inherited members.

    - - - - - - - - - - - - - - - -
    AddressXTrafGen_CRamCmd
    BurstXTrafGen_CRamCmd
    CacheXTrafGen_CRamCmd
    ExpectedRespXTrafGen_CRamCmd
    IdXTrafGen_CRamCmd
    LastAddressXTrafGen_CRamCmd
    LengthXTrafGen_CRamCmd
    MasterRamIndexXTrafGen_CRamCmd
    MyDependXTrafGen_CRamCmd
    OtherDependXTrafGen_CRamCmd
    ProtXTrafGen_CRamCmd
    QosXTrafGen_CRamCmd
    SizeXTrafGen_CRamCmd
    UserXTrafGen_CRamCmd
    ValidCmdXTrafGen_CRamCmd
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_CRamCmd Member List

    This is the complete list of members for XTrafGen_CRamCmd, including all inherited members. + + + + + + + + + + + + + + + + +
    AddressXTrafGen_CRamCmd
    BurstXTrafGen_CRamCmd
    CacheXTrafGen_CRamCmd
    ExpectedRespXTrafGen_CRamCmd
    IdXTrafGen_CRamCmd
    LastAddressXTrafGen_CRamCmd
    LengthXTrafGen_CRamCmd
    LockXTrafGen_CRamCmd
    MasterRamIndexXTrafGen_CRamCmd
    MyDependXTrafGen_CRamCmd
    OtherDependXTrafGen_CRamCmd
    ProtXTrafGen_CRamCmd
    QosXTrafGen_CRamCmd
    SizeXTrafGen_CRamCmd
    UserXTrafGen_CRamCmd
    ValidCmdXTrafGen_CRamCmd
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd.html index eccd9b81..5446a2d8 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___c_ram_cmd.html @@ -2,410 +2,287 @@ - XTrafGen_CRamCmd Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_CRamCmd Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CRamCmd Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -Command Ram word fields -

    + + +

    +
    +

    XTrafGen_CRamCmd Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + +

    Public Attributes

    u32 Address
    u32 ValidCmd
    u32 LastAddress
    u32 Prot
    u32 Id
    u32 Size
    u32 Burst
    u32 Length
    u32 MyDepend
    u32 OtherDepend
    u32 MasterRamIndex
    u32 Qos
    u32 User
    u32 Cache
    u32 ExpectedResp

    Public Attributes

    u32 Address
    u32 ValidCmd
    u32 LastAddress
    u32 Prot
    u32 Id
    u32 Size
    u32 Burst
    u32 Lock
    u32 Length
    u32 MyDepend
    u32 OtherDepend
    u32 MasterRamIndex
    u32 Qos
    u32 User
    u32 Cache
    u32 ExpectedResp
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Command Ram word fields

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Address u32 XTrafGen_CRamCmd::Address
    -
    - - - - - -
    -   - + +
    +

    Address Driven to a*_addr line

    -

    -Address Driven to a*_addr line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Burst u32 XTrafGen_CRamCmd::Burst
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_burst line

    -

    -Driven to a*_burst line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Cache u32 XTrafGen_CRamCmd::Cache
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_cache line

    -

    -Driven to a*_cache line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::ExpectedResp u32 XTrafGen_CRamCmd::ExpectedResp
    -
    - - - - - -
    -   - + +
    +

    Expected response

    -

    -Expected response

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Id u32 XTrafGen_CRamCmd::Id
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_id line

    -

    -Driven to a*_id line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::LastAddress u32 XTrafGen_CRamCmd::LastAddress
    -
    - - - - - -
    -   - + +
    +

    Last address

    -

    -Last address

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Length u32 XTrafGen_CRamCmd::Length
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_lock line Driven to a*_len line

    -

    -Driven to a*_lock line Driven to a*_len line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::MasterRamIndex u32 XTrafGen_CRamCmd::Lock
    -
    - - - - - -
    -   - + +
    -

    -Master Ram Index

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::MyDepend u32 XTrafGen_CRamCmd::MasterRamIndex
    -
    - - - - - -
    -   - + +
    +

    Master Ram Index

    -

    -My depend command no

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::OtherDepend u32 XTrafGen_CRamCmd::MyDepend
    -
    - - - - - -
    -   - + +
    +

    My depend command no

    -

    -Other depend Command no

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Prot u32 XTrafGen_CRamCmd::OtherDepend
    -
    - - - - - -
    -   - + +
    +

    Other depend Command no

    -

    -Driven to a*_prot line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Qos u32 XTrafGen_CRamCmd::Prot
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_prot line

    -

    -Driven to a*_qos line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::Size u32 XTrafGen_CRamCmd::Qos
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_qos line

    -

    -Driven to a*_size line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::User u32 XTrafGen_CRamCmd::Size
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_size line

    -

    -Driven to a*_user line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CRamCmd::ValidCmd u32 XTrafGen_CRamCmd::User
    -
    - - - - - -
    -   - + +
    +

    Driven to a*_user line

    + +
    + + +
    +
    + + + + +
    u32 XTrafGen_CRamCmd::ValidCmd
    +
    +
    +

    Valid Command

    + +
    +
    +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Valid Command

    -

    The documentation for this struct was generated from the following file: -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd-members.html index 3d26b1ad..07f5ba54 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd-members.html @@ -2,27 +2,38 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_Cmd Member List

    This is the complete list of members for XTrafGen_Cmd, including all inherited members.

    - - - -
    CRamCmdXTrafGen_Cmd
    PRamCmdXTrafGen_Cmd
    RdWrFlagXTrafGen_Cmd
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_Cmd Member List

    This is the complete list of members for XTrafGen_Cmd, including all inherited members. + + + +
    CRamCmdXTrafGen_Cmd
    PRamCmdXTrafGen_Cmd
    RdWrFlagXTrafGen_Cmd
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd.html index 7a9c9a6b..cedb543e 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd.html @@ -2,111 +2,94 @@ - XTrafGen_Cmd Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_Cmd Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_Cmd Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -Command structure exposed to user

    -This structure should be updated by user with required configuration -

    + + +

    +
    +

    XTrafGen_Cmd Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - + + + +

    Public Attributes

    XTrafGen_CRamCmd CRamCmd
    XTrafGen_PRamCmd PRamCmd
    u8 RdWrFlag

    Public Attributes

    XTrafGen_CRamCmd CRamCmd
    XTrafGen_PRamCmd PRamCmd
    u8 RdWrFlag
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Command structure exposed to user

    +

    This structure should be updated by user with required configuration

    +

    Member Data Documentation

    + +
    +
    +
    - +
    XTrafGen_CRamCmd XTrafGen_Cmd::CRamCmd XTrafGen_CRamCmd XTrafGen_Cmd::CRamCmd
    -
    - - - - - -
    -   - + +
    +

    Command RAM struct

    -

    -Command RAM struct

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XTrafGen_PRamCmd XTrafGen_Cmd::PRamCmd XTrafGen_PRamCmd XTrafGen_Cmd::PRamCmd
    -
    - - - - - -
    -   - + +
    +

    Param RAM struct

    -

    -Param RAM struct

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen_Cmd::RdWrFlag u8 XTrafGen_Cmd::RdWrFlag
    -
    - - - - - -
    -   - + +
    +

    Write/Read region?

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Write/Read region?

    -

    The documentation for this struct was generated from the following file:
      -
    • xtrafgen.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry-members.html index 69080124..0de642ab 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry-members.html @@ -2,26 +2,37 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CmdEntry Member List

    This is the complete list of members for XTrafGen_CmdEntry, including all inherited members.

    - - -
    CmdWordsXTrafGen_CmdEntry
    ParamWordXTrafGen_CmdEntry
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_CmdEntry Member List

    This is the complete list of members for XTrafGen_CmdEntry, including all inherited members. + + +
    CmdWordsXTrafGen_CmdEntry
    ParamWordXTrafGen_CmdEntry
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry.html index 187b3312..94643efc 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_entry.html @@ -2,86 +2,79 @@ - XTrafGen_CmdEntry Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_CmdEntry Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CmdEntry Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -Command Entry structure

    -This structure denotes each entry of 256 commands. -

    + + +

    +
    +

    XTrafGen_CmdEntry Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - + + +

    Public Attributes

    u32 CmdWords [4]
    u32 ParamWord

    Public Attributes

    u32 CmdWords [4]
    u32 ParamWord
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Command Entry structure

    +

    This structure denotes each entry of 256 commands.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XTrafGen_CmdEntry::CmdWords[4] u32 XTrafGen_CmdEntry::CmdWords[4]
    -
    - - - - - -
    -   - + +
    +

    Command Ram words

    -

    -Command Ram words

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CmdEntry::ParamWord u32 XTrafGen_CmdEntry::ParamWord
    -
    - - - - - -
    -   - + +
    +

    Parameter Ram word

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Parameter Ram word

    -

    The documentation for this struct was generated from the following file:
      -
    • xtrafgen.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info-members.html index 7f7fed10..e34a65c3 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info-members.html @@ -2,31 +2,42 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CmdInfo Member List

    This is the complete list of members for XTrafGen_CmdInfo, including all inherited members.

    - - - - - - - -
    CmdEntryXTrafGen_CmdInfo
    LastRdValidIndexXTrafGen_CmdInfo
    LastWrValidIndexXTrafGen_CmdInfo
    RdIndexXTrafGen_CmdInfo
    RdIndexEndXTrafGen_CmdInfo
    WrIndexXTrafGen_CmdInfo
    WrIndexEndXTrafGen_CmdInfo
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_CmdInfo Member List

    This is the complete list of members for XTrafGen_CmdInfo, including all inherited members. + + + + + + + +
    CmdEntryXTrafGen_CmdInfo
    LastRdValidIndexXTrafGen_CmdInfo
    LastWrValidIndexXTrafGen_CmdInfo
    RdIndexXTrafGen_CmdInfo
    RdIndexEndXTrafGen_CmdInfo
    WrIndexXTrafGen_CmdInfo
    WrIndexEndXTrafGen_CmdInfo
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info.html index a2ad51f0..4b7f8a8e 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___cmd_info.html @@ -2,211 +2,154 @@ - XTrafGen_CmdInfo Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_CmdInfo Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_CmdInfo Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -Command Information Structure

    -This structure is maintained by the driver -

    + + +

    +
    +

    XTrafGen_CmdInfo Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - + + + + + + + +

    Public Attributes

    u32 WrIndex
    u32 RdIndex
    u8 WrIndexEnd
    u8 RdIndexEnd
    int LastWrValidIndex
    int LastRdValidIndex
    XTrafGen_CmdEntry CmdEntry [2][MAX_NUM_ENTRIES]

    Public Attributes

    u32 WrIndex
    u32 RdIndex
    u8 WrIndexEnd
    u8 RdIndexEnd
    int LastWrValidIndex
    int LastRdValidIndex
    XTrafGen_CmdEntry CmdEntry [2][MAX_NUM_ENTRIES]
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Command Information Structure

    +

    This structure is maintained by the driver

    +

    Member Data Documentation

    + +
    +
    +
    - +
    XTrafGen_CmdEntry XTrafGen_CmdInfo::CmdEntry[2][MAX_NUM_ENTRIES] XTrafGen_CmdEntry XTrafGen_CmdInfo::CmdEntry[2][MAX_NUM_ENTRIES]
    -
    - - - - - -
    -   - + +
    +

    Software array of Commands

    -

    -Software array of Commands

    -

    - - - - -
    - + + + +
    +
    +
    - +
    int XTrafGen_CmdInfo::LastRdValidIndex int XTrafGen_CmdInfo::LastRdValidIndex
    -
    - - - - - -
    -   - + +
    +

    Read Last Valid Command Index

    -

    -Read Last Valid Command Index

    -

    - - - - -
    - + + + +
    +
    +
    - +
    int XTrafGen_CmdInfo::LastWrValidIndex int XTrafGen_CmdInfo::LastWrValidIndex
    -
    - - - - - -
    -   - + +
    +

    Write Last Valid Command Index

    -

    -Write Last Valid Command Index

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CmdInfo::RdIndex u32 XTrafGen_CmdInfo::RdIndex
    -
    - - - - - -
    -   - + +
    +

    Read Region Command Index

    -

    -Read Region Command Index

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen_CmdInfo::RdIndexEnd u8 XTrafGen_CmdInfo::RdIndexEnd
    -
    - - - - - -
    -   - + +
    +

    Read Index End

    -

    -Read Index End

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_CmdInfo::WrIndex u32 XTrafGen_CmdInfo::WrIndex
    -
    - - - - - -
    -   - + +
    +

    Write Region Command Index

    -

    -Write Region Command Index

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XTrafGen_CmdInfo::WrIndexEnd u8 XTrafGen_CmdInfo::WrIndexEnd
    -
    - - - - - -
    -   - + +
    +

    Write Index End

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Write Index End

    -

    The documentation for this struct was generated from the following file:
      -
    • xtrafgen.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config-members.html index ca5ea263..a1918d2d 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config-members.html @@ -2,29 +2,40 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_Config Member List

    This is the complete list of members for XTrafGen_Config, including all inherited members.

    - - - - - -
    BaseAddressXTrafGen_Config
    BusTypeXTrafGen_Config
    DeviceIdXTrafGen_Config
    ModeXTrafGen_Config
    ModeTypeXTrafGen_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_Config Member List

    This is the complete list of members for XTrafGen_Config, including all inherited members. + + + + + +
    BaseAddressXTrafGen_Config
    BusTypeXTrafGen_Config
    DeviceIdXTrafGen_Config
    ModeXTrafGen_Config
    ModeTypeXTrafGen_Config
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config.html index 36c79520..414f2c7f 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___config.html @@ -2,161 +2,124 @@ - XTrafGen_Config Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_Config Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_Config Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -The configuration structure for Traffic Generator device

    -This structure passes the hardware building information to the driver -

    + + +

    +
    +

    XTrafGen_Config Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - - - - - + + + + + +

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 BusType
    u32 Mode
    u32 ModeType

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 BusType
    u32 Mode
    u32 ModeType
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    The configuration structure for Traffic Generator device

    +

    This structure passes the hardware building information to the driver

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XTrafGen_Config::BaseAddress u32 XTrafGen_Config::BaseAddress
    -
    - - - - - -
    -   - + +
    +

    Base Address

    -

    -Base Address

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_Config::BusType u32 XTrafGen_Config::BusType
    -
    - - - - - -
    -   - + +
    +

    Atgmode

    -

    -Atgmode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XTrafGen_Config::DeviceId u16 XTrafGen_Config::DeviceId
    -
    - - - - - -
    -   - + +
    +

    Device Id

    -

    -Device Id

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_Config::Mode u32 XTrafGen_Config::Mode
    -
    - - - - - -
    -   - + +
    +

    Atgmode_l2

    -

    -Atgmode_l2

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_Config::ModeType u32 XTrafGen_Config::ModeType
    -
    - - - - - -
    -   - + +
    +

    Axismode

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Axismode

    -

    The documentation for this struct was generated from the following file:
      -
    • xtrafgen.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd-members.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd-members.html index 79ede33a..35b34c48 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd-members.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd-members.html @@ -2,31 +2,42 @@ - Member List + Xilinx Driver trafgen v3_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_PRamCmd Member List

    This is the complete list of members for XTrafGen_PRamCmd, including all inherited members.

    - - - - - - - -
    AddrModeXTrafGen_PRamCmd
    IdModeXTrafGen_PRamCmd
    IntervalModeXTrafGen_PRamCmd
    OpCntl0XTrafGen_PRamCmd
    OpCntl1XTrafGen_PRamCmd
    OpCntl2XTrafGen_PRamCmd
    OpcodeXTrafGen_PRamCmd
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTrafGen_PRamCmd Member List

    This is the complete list of members for XTrafGen_PRamCmd, including all inherited members. + + + + + + + +
    AddrModeXTrafGen_PRamCmd
    IdModeXTrafGen_PRamCmd
    IntervalModeXTrafGen_PRamCmd
    OpCntl0XTrafGen_PRamCmd
    OpCntl1XTrafGen_PRamCmd
    OpCntl2XTrafGen_PRamCmd
    OpcodeXTrafGen_PRamCmd
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd.html index 349d5aa0..971b8b1a 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/struct_x_traf_gen___p_ram_cmd.html @@ -2,210 +2,153 @@ - XTrafGen_PRamCmd Struct Reference + Xilinx Driver trafgen v3_2: XTrafGen_PRamCmd Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTrafGen_PRamCmd Struct Reference

    #include <xtrafgen.h> -

    -List of all members.

    Detailed Description

    -Parameter Ram word fields -

    + + +

    +
    +

    XTrafGen_PRamCmd Struct Reference

    +

    #include <xtrafgen.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - + + + + + + + +

    Public Attributes

    u32 OpCntl0
    u32 OpCntl1
    u32 OpCntl2
    u32 AddrMode
    u32 IntervalMode
    u32 IdMode
    u32 Opcode

    Public Attributes

    u32 OpCntl0
    u32 OpCntl1
    u32 OpCntl2
    u32 AddrMode
    u32 IntervalMode
    u32 IdMode
    u32 Opcode
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Parameter Ram word fields

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::AddrMode u32 XTrafGen_PRamCmd::AddrMode
    -
    - - - - - -
    -   - + +
    +

    Address mode

    -

    -Address mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::IdMode u32 XTrafGen_PRamCmd::IdMode
    -
    - - - - - -
    -   - + +
    +

    Id mode

    -

    -Id mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::IntervalMode u32 XTrafGen_PRamCmd::IntervalMode
    -
    - - - - - -
    -   - + +
    +

    Interval mode

    -

    -Interval mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::OpCntl0 u32 XTrafGen_PRamCmd::OpCntl0
    -
    - - - - - -
    -   - + +
    +

    Control field 0

    -

    -Control field 0

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::OpCntl1 u32 XTrafGen_PRamCmd::OpCntl1
    -
    - - - - - -
    -   - + +
    +

    Control field 1

    -

    -Control field 1

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::OpCntl2 u32 XTrafGen_PRamCmd::OpCntl2
    -
    - - - - - -
    -   - + +
    +

    Control field 2

    -

    -Control field 2

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTrafGen_PRamCmd::Opcode u32 XTrafGen_PRamCmd::Opcode
    -
    - - - - - -
    -   - + +
    +

    Opcode

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Opcode

    -

    The documentation for this struct was generated from the following file:
      -
    • xtrafgen.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/tabs.css index a61552a6..a4441634 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs INPUT +DIV.tabs #MSearchBox { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs INPUT DIV.tabs TD { - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -82,21 +82,24 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI#current A +DIV.tabs LI.current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI#current SPAN +DIV.tabs LI.current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.nav +DIV.navpath { background : none; border : none; border-bottom : 1px solid #84B0C7; + text-align : center; + margin : 2px; + padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8c.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8c.html index 7a2f3a27..ff5be128 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8c.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8c.html @@ -2,153 +2,130 @@ - xtrafgen.c File Reference + Xilinx Driver trafgen v3_2: xtrafgen.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xtrafgen.c File Reference

    Detailed Description

    -This file implements AXI Traffic Generator device-wise initialization and control functions. For more information on the implementation of this driver, see xtrafgen.h.

    + + +

    +
    +

    xtrafgen.c File Reference

    #include "xtrafgen.h"
    + + + + + + + + + + + +

    Defines

    #define XTrafGen_GetCmdInfo(InstancePtr)   (&((InstancePtr)->CmdInfo))

    Functions

    int XTrafGen_CfgInitialize (XTrafGen *InstancePtr, XTrafGen_Config *Config, u32 EffectiveAddress)
    int XTrafGen_AddCommand (XTrafGen *InstancePtr, XTrafGen_Cmd *CmdPtr)
    int XTrafGen_GetLastValidIndex (XTrafGen *InstancePtr, u32 RdWrFlag)
    int XTrafGen_WriteCmdsToHw (XTrafGen *InstancePtr)
    int XTrafGen_EraseAllCommands (XTrafGen *InstancePtr)
    void XTrafGen_AccessMasterRam (XTrafGen *InstancePtr, u32 Offset, int Length, u8 RdWrFlag, u32 *Data)
    void XTrafGen_PrintCmds (XTrafGen *InstancePtr)
    +

    Detailed Description

    +

    This file implements AXI Traffic Generator device-wise initialization and control functions. For more information on the implementation of this driver, see xtrafgen.h.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a srt  01/24/13 First release
  1.01a adk  03/09/13 Updated driver to Support Static and Streaming mode.
  2.00a adk  16/09/13 Fixed CR:737291
-
    -

    -#include "xtrafgen.h"
    - - - - - - - - - - - - - - - - - - - - -

    Defines

    #define XTrafGen_GetCmdInfo(InstancePtr)   (&((InstancePtr)->CmdInfo))

    Functions

    int XTrafGen_CfgInitialize (XTrafGen *InstancePtr, XTrafGen_Config *Config, u32 EffectiveAddress)
    int XTrafGen_AddCommand (XTrafGen *InstancePtr, XTrafGen_Cmd *CmdPtr)
    int XTrafGen_GetLastValidIndex (XTrafGen *InstancePtr, u32 RdWrFlag)
    int XTrafGen_WriteCmdsToHw (XTrafGen *InstancePtr)
    int XTrafGen_EraseAllCommands (XTrafGen *InstancePtr)
    void XTrafGen_AccessMasterRam (XTrafGen *InstancePtr, u32 Offset, int Length, u8 RdWrFlag, u32 *Data)
    void XTrafGen_PrintCmds (XTrafGen *InstancePtr)
    -

    Define Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    #define XTrafGen_GetCmdInfo ( InstancePtr   )    (&((InstancePtr)->CmdInfo))#define XTrafGen_GetCmdInfo(InstancePtr  )    (&((InstancePtr)->CmdInfo))
    -
    - - - - - -
    -   - - -

    -Get Command Info pointer

    -

    Parameters:
    + +
    +

    Get Command Info pointer

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    -
    Returns:
    Pointer to the Command Info structure
    -
    Note:
    C-style signature: XTrafGen_CmdInfo *XTrafGen_GetCmdInfo(XTrafGen *InstancePtr)
    -
    -

    Function Documentation

    -

    - - - - -
    - +
    Returns:
    Pointer to the Command Info structure
    +
    Note:
    C-style signature: XTrafGen_CmdInfo *XTrafGen_GetCmdInfo(XTrafGen *InstancePtr)
    + + + +

    Function Documentation

    + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XTrafGen_AccessMasterRam ( XTrafGen *  InstancePtr, void XTrafGen_AccessMasterRam (XTrafGen *  InstancePtr,
    u32  Offset, u32  Offset,
    int  Length, int  Length,
    u8  RdWrFlag, u8  RdWrFlag,
    u32 *  Datau32 *  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -Write or Read Master RAM

    -The MSTRAM has 8 KB of internal RAM used for the following:

      -
    • Take data from this RAM for write transactions
    • Store data to this RAM for read transaction
    -

    -

    Parameters:
    + +
    +

    Write or Read Master RAM

    +

    The MSTRAM has 8 KB of internal RAM used for the following:

    +
      +
    • Take data from this RAM for write transactions
      • +
    • Store data to this RAM for read transaction
      • +
    +
    Parameters:
    @@ -156,269 +133,230 @@ The MSTRAM has 8 KB of internal RAM used for the following:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Offset is the offset value in Master RAM.
    RdWrFlag specifies whether to write or read
    Data is the pointer to array which contains data to write or reads data into.
    +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XTrafGen_AddCommand ( XTrafGen *  InstancePtr, int XTrafGen_AddCommand (XTrafGen *  InstancePtr,
    XTrafGen_Cmd *  CmdPtrXTrafGen_Cmd *  CmdPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -Add a command to the software list of commands.

    -This function prepares the four Command Words and one Parameter Word from the Command structure passed from the user application. It then adds to a list of commands (maintained in the software). Both CMDRAM and PARAMRAM are divided into two regions, one for reads and one for writes. Each region can hold 256 commands with each entry containing four Command RAM words and one Parameter RAM word.

    -

    Parameters:
    + +
    +

    Add a command to the software list of commands.

    +

    This function prepares the four Command Words and one Parameter Word from the Command structure passed from the user application. It then adds to a list of commands (maintained in the software). Both CMDRAM and PARAMRAM are divided into two regions, one for reads and one for writes. Each region can hold 256 commands with each entry containing four Command RAM words and one Parameter RAM word.

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    CmdPtr is a pointer to Command structure.
    +
    -
    Returns:
      -
    • XST_SUCCESS if successful
    • XST_FAILURE if reached max number of command entries
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if reached max number of command entries
      • +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    int XTrafGen_CfgInitialize ( XTrafGen *  InstancePtr, int XTrafGen_CfgInitialize (XTrafGen *  InstancePtr,
    XTrafGen_Config *  Config, XTrafGen_Config *  Config,
    u32  EffectiveAddressu32  EffectiveAddress 
    ) )
    -
    - - - - - -
    -   - - -

    -This function initializes a AXI Traffic Generator device. This function must be called prior to using a AXI Traffic Generator Device. Initializing a engine includes setting up the register base address, setting up the instance data, and ensuring the hardware is in a quiescent state.

    -

    Parameters:
    + +
    +

    This function initializes a AXI Traffic Generator device. This function must be called prior to using a AXI Traffic Generator Device. Initializing a engine includes setting up the register base address, setting up the instance data, and ensuring the hardware is in a quiescent state.

    +
    Parameters:
    InstancePtr is a pointer to the Axi Traffic Generator instance to be worked on.
    CfgPtr references the structure holding the hardware configuration for the Axi Traffic Generator core to initialize.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    -
    Returns:
      -
    • XST_SUCCESS for successful initialization
    • XST_INVALID_PARAM if pointer to the configuration structure is NULL
    +
    Returns:
      +
    • XST_SUCCESS for successful initialization
      • +
    • XST_INVALID_PARAM if pointer to the configuration structure is NULL
      • +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - - - + + + + + +
    int XTrafGen_EraseAllCommands ( XTrafGen *  InstancePtr  ) int XTrafGen_EraseAllCommands (XTrafGen *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -Erase all Command Entry values

    -This function erases all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    -

    Parameters:
    + +
    +

    Erase all Command Entry values

    +

    This function erases all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    -
    Returns:
      -
    • XST_SUCCESS if successful
    • XST_FAILURE if programming internal RAMs failed
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if programming internal RAMs failed
      • +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XTrafGen_GetLastValidIndex ( XTrafGen *  InstancePtr, int XTrafGen_GetLastValidIndex (XTrafGen *  InstancePtr,
    u32  RdWrFlagu32  RdWrFlag 
    ) )
    -
    - - - - - -
    -   - - -

    -Get last Valid Command Index of Write/Read region

    -The last valid command index is used to set 'my_depend' and 'other_depend' fields of the Command RAM (Word 2).

    -

    Parameters:
    + +
    +

    Get last Valid Command Index of Write/Read region

    +

    The last valid command index is used to set 'my_depend' and 'other_depend' fields of the Command RAM (Word 2).

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    RdWrFlag specifies a Read or Write Region
    +
    -
    Returns:
      -
    • Last Valid Command Index
    +
    Returns:
      +
    • Last Valid Command Index
      • +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - - - + + + + + +
    void XTrafGen_PrintCmds ( XTrafGen *  InstancePtr  ) void XTrafGen_PrintCmds (XTrafGen *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -Display Command Entry values

    -This function prints all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    -

    Parameters:
    + +
    +

    Display Command Entry values

    +

    This function prints all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    -
    -

    - - - - -
    - + + + + +
    +
    +
    - - - - - - + + + + + +
    int XTrafGen_WriteCmdsToHw ( XTrafGen *  InstancePtr  ) int XTrafGen_WriteCmdsToHw (XTrafGen *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -Write Commands to internal Command and Parameter RAMs

    -This function writes all the prepared commands to hardware.

    -

    Parameters:
    + +
    +

    Write Commands to internal Command and Parameter RAMs

    +

    This function writes all the prepared commands to hardware.

    +
    Parameters:
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    -
    Returns:
      -
    • XST_SUCCESS if successful
    • XST_FAILURE if programming internal RAMs failed
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if programming internal RAMs failed
      • +
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + +

    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8h.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8h.html new file mode 100755 index 00000000..69171a3a --- /dev/null +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen_8h.html @@ -0,0 +1,1969 @@ + + + + + Xilinx Driver trafgen v3_2: xtrafgen.h File Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    xtrafgen.h File Reference

    #include <string.h>
    +#include "xstatus.h"
    +#include "xil_assert.h"
    +#include "xtrafgen_hw.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XTrafGen_CRamCmd
    struct  XTrafGen_PRamCmd
    struct  XTrafGen_Cmd
    struct  XTrafGen_CmdEntry
    struct  XTrafGen_Config
    struct  XTrafGen_CmdInfo
    struct  XTrafGen

    Defines

    #define XTRAFGEN_H
    #define MAX_NUM_ENTRIES   256
    #define NUM_BLOCKS   2
    #define XTG_WRITE   1
    #define XTG_READ   0
    #define XTG_MODE_FULL   0
    #define XTG_MODE_BASIC   1
    #define XTG_MODE_STATIC   2
    #define XTG_MODE_STREAMING   3
    #define XTG_MODE_SYS_INIT   4
    #define XTG_MWIDTH_32   0
    #define XTG_MWIDTH_64   1
    #define XTG_SWIDTH_32   0
    #define XTG_SWIDTH_64   1
    #define XTG_PRM_RAM_BLOCK_SIZE   0x400
    #define XTG_CMD_RAM_BLOCK_SIZE   0x1000
    #define XTG_PARAM_RAM_SIZE   0x800
    #define XTG_COMMAND_RAM_SIZE   0x2000
    #define XTG_MASTER_RAM_SIZE   0x2000
    #define XTrafGen_ReadCoreRevision(InstancePtr)
    #define XTrafGen_ReadIdWidth(InstancePtr)
    #define XTrafGen_StartMasterLogic(InstancePtr)
    #define XTrafGen_IsMasterLogicDone(InstancePtr)
    #define XTrafGen_LoopEnable(InstancePtr)
    #define XTrafGen_LoopDisable(InstancePtr)
    #define XTrafGen_WriteSlaveControlReg(InstancePtr, Value)
    #define XTrafGen_CheckforMasterComplete(InstancePtr)
    #define XTrafGen_ReadErrors(InstancePtr)
    #define XTrafGen_EnableMasterCmpInterrupt(InstancePtr)
    #define XTrafGen_ClearMasterCmpInterrupt(InstancePtr)
    #define XTrafGen_ClearErrors(InstancePtr, Mask)
    #define XTrafGen_EnableErrors(InstancePtr, Mask)
    #define XTrafGen_MasterErrIntrEnable(InstancePtr)
    #define XTrafGen_MasterErrIntrDisable(InstancePtr)
    #define XTrafGen_SlaveErrIntrEnable(InstancePtr)
    #define XTrafGen_SlaveErrIntrDisable(InstancePtr)
    #define XTrafGen_ReadConfigStatus(InstancePtr)
    #define XTrafGen_StaticEnable(InstancePtr)
    #define XTrafGen_StaticDisable(InstancePtr)
    #define XTrafGen_StaticVersion(InstancePtr)
    #define XTrafGen_SetStaticBurstLen(InstancePtr, Value)
    #define XTrafGen_GetStaticBurstLen(InstancePtr)
    #define XTrafGen_GetStaticTransferDone(InstancePtr)
    #define XTrafGen_SetStaticTransferDone(InstancePtr)
    #define XTrafGen_IsStaticTransferDone(InstancePtr)
    #define XTrafGen_StreamEnable(InstancePtr)
    #define XTrafGen_StreamDisable(InstancePtr)
    #define XTrafGen_StreamVersion(InstancePtr)
    #define XTrafGen_SetStreamingTransLen(InstancePtr, Value)
    #define XTrafGen_GetStreamingTransLen(InstancePtr)
    #define XTrafGen_GetStreamingTransCnt(InstancePtr)
    #define XTrafGen_SetStreamingRandomLen(InstancePtr, Value)
    #define XTrafGen_GetStreamingProgDelay(InstancePtr)
    #define XTrafGen_SetStreamingTransCnt(InstancePtr, Value)
    #define XTrafGen_SetStreamingProgDelay(InstancePtr, Value)
    #define XTrafGen_SetStreamingTdestPort(InstancePtr, Value)
    #define XTrafGen_SetStreamingTransferDone(InstancePtr)
    #define XTrafGen_IsStreamingTransferDone(InstancePtr)
    #define XTrafGen_ResetStreamingRandomLen(InstancePtr)

    Functions

    int XTrafGen_CfgInitialize (XTrafGen *InstancePtr, XTrafGen_Config *Config, u32 EffectiveAddress)
    XTrafGen_Config * XTrafGen_LookupConfig (u32 DeviceId)
    int XTrafGen_AddCommand (XTrafGen *InstancePtr, XTrafGen_Cmd *CmdPtr)
    int XTrafGen_GetLastValidIndex (XTrafGen *InstancePtr, u32 RdWrFlag)
    int XTrafGen_WriteCmdsToHw (XTrafGen *InstancePtr)
    void XTrafGen_AccessMasterRam (XTrafGen *InstancePtr, u32 Offset, int Length, u8 Write, u32 *Data)
    void XTrafGen_PrintCmds (XTrafGen *InstancePtr)
    int XTrafGen_EraseAllCommands (XTrafGen *InstancePtr)
    +

    Detailed Description

    +

    Define Documentation

    + +
    +
    + + + + +
    #define MAX_NUM_ENTRIES   256
    +
    +
    +

    Number of command entries per region

    + +
    +
    + +
    +
    + + + + +
    #define NUM_BLOCKS   2
    +
    +
    +

    Number of Read and write regions

    + +
    +
    + +
    +
    + + + + +
    #define XTG_CMD_RAM_BLOCK_SIZE   0x1000
    +
    +
    +

    Cmd RAM Block Size (4KB)

    + +
    +
    + +
    +
    + + + + +
    #define XTG_COMMAND_RAM_SIZE   0x2000
    +
    +
    +

    Command RAM (8KB)

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MASTER_RAM_SIZE   0x2000
    +
    +
    +

    Master RAM (8KB)

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MODE_BASIC   1
    +
    +
    +

    Basic Mode

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MODE_FULL   0
    +
    +
    +

    Full Mode

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MODE_STATIC   2
    +
    +
    +

    Static Mode

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MODE_STREAMING   3
    +
    +
    +

    Streaming Mode

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MODE_SYS_INIT   4
    +
    +
    +

    System Init Mode

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MWIDTH_32   0
    +
    +
    +

    Master Width - 32

    + +
    +
    + +
    +
    + + + + +
    #define XTG_MWIDTH_64   1
    +
    +
    +

    Master Width - 64

    + +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_RAM_SIZE   0x800
    +
    +
    +

    Parameter RAM (2KB)

    + +
    +
    + +
    +
    + + + + +
    #define XTG_PRM_RAM_BLOCK_SIZE   0x400
    +
    +
    +

    PARAM Block Size (1KB)

    + +
    +
    + +
    +
    + + + + +
    #define XTG_READ   0
    +
    +
    +

    Read Direction Flag

    + +
    +
    + +
    +
    + + + + +
    #define XTG_SWIDTH_32   0
    +
    +
    +

    Slave Width - 32

    + +
    +
    + +
    +
    + + + + +
    #define XTG_SWIDTH_64   1
    +
    +
    +

    Slave Width - 64

    + +
    +
    + +
    +
    + + + + +
    #define XTG_WRITE   1
    +
    +
    +

    Write Direction Flag

    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_CheckforMasterComplete(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_ERR_STS_OFFSET) & XTG_ERR_MSTCMP_MASK) ? TRUE : FALSE)
+

    XTrafGen_CheckforMasterComplete checks for master complete.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    TRUE if master complete bit is set. FALSE if master complete bit is not set.
    +
    Note:
    C-style signature: u8 XTrafGen_CheckforMasterComplete(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_ClearErrors(InstancePtr,
    Mask  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_ERR_STS_OFFSET,     \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_ERR_STS_OFFSET) | Mask))
+

    XTrafGen_ClearErrors clear errors specified in Mask. The corresponding error for each bit set to 1 in Mask, will be enabled.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Mask contains a bit mask of the errors to clear. The mask can be formed using a set of bit wise or'd values from the definitions in xtrafgen_hw.h file.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_ClearErrors(XTrafGen *InstancePtr, u32 Mask)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ClearMasterCmpInterrupt(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_ERR_STS_OFFSET,     \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_ERR_STS_OFFSET) |   \
+                        XTG_ERR_MSTCMP_MASK))
+

    XTrafGen_ClearMasterCmpInterrupt clear Master logic complete interrupt bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: u8 XTrafGen_ClearMasterCmpInterrupt(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_EnableErrors(InstancePtr,
    Mask  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_ERR_EN_OFFSET,      \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_ERR_EN_OFFSET) | Mask))
+

    XTrafGen_EnableErrors enable errors specified in Mask. The corresponding error for each bit set to 1 in Mask, will be enabled.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Mask contains a bit mask of the errors to enable. The mask can be formed using a set of bit wise or'd values from the definitions in xtrafgen_hw.h file.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_EnableErrors(XTrafGen *InstancePtr, u32 Mask)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_EnableMasterCmpInterrupt(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_ERR_EN_OFFSET,      \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_ERR_EN_OFFSET) |    \
+                        XTG_ERR_MSTCMP_MASK))
+

    XTrafGen_EnableMasterCmpInterrupt enables Master logic complete bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_EnableMasterCmpInterrupt(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_GetStaticBurstLen(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STATIC_LEN_OFFSET))
+

    XTrafGen_GetStaticBurstLen Gets the Burst Length for AxiTrafGen in StaticMode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Burst length value.
    +
    Note:
    C-style signature: u32 XTrafGen_GetStaticBurstLen(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_GetStaticTransferDone(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                        XTG_STATIC_CNTL_OFFSET)) & XTG_STATIC_CNTL_TD_MASK)
+

    XTrafGen_GetStaticTransferDone gets the state of Transfer done bit in Control register When the TraficGen is configured in Static Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Value of the Tranfer Done bit.
    +
    Note:
    C-style signature: u32 XTrafGen_GetStaticTransferDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_GetStreamingProgDelay(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                XTG_STREAM_TL_OFFSET ) \
+                & XTG_STREAM_CFG_PDLY_MASK) >> XTG_STREAM_CFG_PDLY_SHIFT)
+

    XTrafGen_GetStreamingProgDelay Gets the Programmable Delay for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Propagation Delay Value
    +
    Note:
    C-style signature: u16 XTrafGen_GetProgDelay(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_GetStreamingTransCnt(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                XTG_STREAM_TL_OFFSET ) & XTG_STREAM_TL_TCNT_MASK) \
+                >> XTG_STREAM_TL_TCNT_SHIFT)
+

    XTrafGen_GetStreamingTransCnt Gets the transfer count for AxiTrafGen in Streaming Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Transfer Count value.
    +
    Note:
    C-style signature: u16 XTrafGen_GetStreamingTransCnt(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_GetStreamingTransLen(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_ReadReg(InstancePtr->Config.BaseAddress,      \
+                XTG_STREAM_TL_OFFSET)& XTG_STREAM_TL_TLEN_MASK)
+

    XTrafGen_GetStreamingTransLen Gets the length of transaction for AxiTrafGen in Streaming Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Transfer Length value.
    +
    Note:
    C-style signature: u16 XTrafGen_GetStreamingTransLen(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XTRAFGEN_H
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_IsMasterLogicDone(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTEN_MASK) ? \
+                FALSE : TRUE)
+

    XTrafGen_IsMasterLogicDone checks for traffic generator master logic completed bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    TRUE if master logic completed. FALSE if master logic not completed.
    +
    Note:
    C-style signature: u8 XTrafGen_IsMasterLogicDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_IsStaticTransferDone(InstancePtr  ) 
    +
    +
    +Value:
    (((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_TD_MASK) == \
+                XTG_STATIC_CNTL_RESET_MASK) ? \
+                TRUE : FALSE)
+

    XTrafGen_IsStaticTransferDone checks for reset value When Static Traffic genration Completed by reading Control Register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    TRUE if reset Success full FALSE if failed to reset
    +
    Note:
    C-style signature: u8 XTrafGen_IsStaticTransferDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_IsStreamingTransferDone(InstancePtr  ) 
    +
    +
    +Value:
    (((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_TD_MASK) == \
+                XTG_STREAM_CNTL_RESET_MASK) ? \
+                TRUE : FALSE)
+

    XTrafGen_IsStreamingTransferDone checks for reset value When Streaming Traffic genration is Completed by reading Stream Control Register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    TRUE if reset Success full FALSE if failed to reset
    +
    Note:
    C-style signature: u8 XTrafGen_IsStreamingTransferDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_LoopDisable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_MCNTL_OFFSET,       \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_MCNTL_OFFSET) & ~XTG_MCNTL_LOOPEN_MASK))
+

    XTrafGen_LoopDisable Disbales the loop bit in Master control regiset in Advanced mode/Basic mode of ATG.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_LoopDisable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_LoopEnable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_MCNTL_OFFSET,       \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_MCNTL_OFFSET) | XTG_MCNTL_LOOPEN_MASK))
+

    XTrafGen_LoopEnable loops through the command set created using CMDRAM and PARAMRAM indefinitely in Advanced mode/Basic mode of ATG.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_LoopEnable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_MasterErrIntrDisable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_MSTERR_INTR_OFFSET, \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                        XTG_MSTERR_INTR_OFFSET) &       \
+                        ~XTG_MSTERR_INTR_MINTREN_MASK))
+

    XTrafGen_MasterErrIntrDisable disables Global Master error bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_MasterErrIntrDisable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_MasterErrIntrEnable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_MSTERR_INTR_OFFSET, \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                        XTG_MSTERR_INTR_OFFSET) |       \
+                        XTG_MSTERR_INTR_MINTREN_MASK))
+

    XTrafGen_MasterErrIntrEnable enables Global Master error bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_MasterErrIntrEnable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ReadConfigStatus(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,  \
+        XTG_CFG_STS_OFFSET))
+

    XTrafGen_ReadConfigStatus reads Config status register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Config Status Register value
    +
    Note:
    C-style signature: u32 XTrafGen_ReadConfigStatus(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ReadCoreRevision(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_MCNTL_OFFSET) & XTG_MCNTL_REV_MASK) >> \
+                XTG_MCNTL_REV_SHIFT)
+

    XTrafGen_ReadCoreRevision reads revision of core.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Core Revision Value
    +
    Note:
    C-style signature: u8 XTrafGen_ReadCoreRevision(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ReadErrors(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_ERR_STS_OFFSET) & XTG_ERR_ALL_ERR_MASK)
+

    XTrafGen_ReadErrors read master and slave errors.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Both Master and Slave error value.
    +
    Note:
    C-style signature: u32 XTrafGen_ReadErrors(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ReadIdWidth(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTID_MASK) >>    \
+                XTG_MCNTL_MSTID_SHIFT)
+

    XTrafGen_ReadIdWidth reads M_ID_WIDTH.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Value of M_ID_WIDTH
    +
    Note:
    C-style signature: u8 XTrafGen_ReadIdWidth(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_ResetStreamingRandomLen(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STREAM_CFG_OFFSET,                                  \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STREAM_CFG_OFFSET) & ~XTG_STREAM_CFG_RANDL_MASK)))
+

    XTrafGen_ResetStreamingRandomLen resets the random transaction length for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_ResetStreamingRandomLen(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStaticBurstLen(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_STATIC_LEN_OFFSET,Value))
+

    XTrafGen_SetStaticBurstLen Configures the Burst Length for AxiTrafGen In Static Mode

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the Burst length to set in the Static length register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStaticBurstLen(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_SetStaticTransferDone(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg(InstancePtr->Config.BaseAddress,              \
+                XTG_STATIC_CNTL_OFFSET,                                 \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_TD_MASK))
+

    XTrafGen_SetStaticTransferDone sets the Transfer done bit in Control register When AxiTrafGen is Configured in Static Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStaticTransferDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStreamingProgDelay(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_STREAM_CFG_OFFSET,  \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                 XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_PDLY_SHIFT)) \
+                 & XTG_STREAM_CFG_PDLY_MASK))
+

    XTrafGen_SetStreamingProgDelay Configures the Programmable Delay for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the value that's need to be configure in the Stream Config Register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingProgDelay(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStreamingRandomLen(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STREAM_CFG_OFFSET,                                  \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STREAM_CFG_OFFSET) | Value)))
+

    XTrafGen_SetStreamingRandomLen Configures the random transaction length for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the random length that's need to be Configure in the Streaming Config register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingRandomLen(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStreamingTdestPort(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_STREAM_CFG_OFFSET,  \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_TDEST_SHIFT)) \
+                & XTG_STREAM_CFG_TDEST_MASK))
+

    XTrafGen_SetStreamingTdestPort Configures the Value to drive on TDEST port for Axi TrafGen in Streaming Mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the Port value that's need to be set.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingTdestPort(XTrafGen *InstancePtr, u8 Value)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStreamingTransCnt(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_STREAM_TL_OFFSET,   \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                 XTG_STREAM_TL_OFFSET) |((Value << XTG_STREAM_TL_TCNT_SHIFT) \
+                 & XTG_STREAM_TL_TCNT_MASK))))
+

    XTrafGen_SetStreamingTransCnt Configures the transfer count for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the transfer length that needs to be configured in Transfer length register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingTransCnt(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_SetStreamingTransferDone(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg(InstancePtr->Config.BaseAddress,   \
+                XTG_STREAM_CNTL_OFFSET,                         \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_TD_MASK))
+

    XTrafGen_SetTransferDone sets the Transfer done bit in Control register When AxiTrafGen is Configured in Streaming Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingTransferDone(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_SetStreamingTransLen(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STREAM_TL_OFFSET,                                   \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STREAM_TL_OFFSET) | Value)))
+

    XTrafGen_SetStreamingTransLen Configures the length of transaction for AxiTrafGen in Streaming Mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the transfer length to set in the transfer length Register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_SetStreamingTransLen(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_SlaveErrIntrDisable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_SCNTL_OFFSET, \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                        XTG_SCNTL_OFFSET) &     \
+                        ~XTG_SCNTL_ERREN_MASK))
+

    XTrafGen_SlaveErrIntrDisable disables Global Slave error bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_SlaveErrIntrDisable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_SlaveErrIntrEnable(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,  \
+                XTG_SCNTL_OFFSET, \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
+                        XTG_SCNTL_OFFSET) | XTG_SCNTL_ERREN_MASK))
+

    XTrafGen_SlaveErrIntrEnable enables Global Slave error bit.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_SlaveErrIntrEnable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StartMasterLogic(InstancePtr  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_MCNTL_OFFSET,       \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                        XTG_MCNTL_OFFSET) | XTG_MCNTL_MSTEN_MASK))
+

    XTrafGen_StartMasterLogic starts traffic generator master logic.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_StartMasterLogic(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StaticDisable(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STATIC_CNTL_OFFSET,                                 \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                 XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_RESET_MASK)))
+

    XTrafGen_StaticDisable disables the traffic genration on the Axi TrafGen when the core is configured in Static Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_StaticDisable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StaticEnable(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STATIC_CNTL_OFFSET,                                 \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                 XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_STEN_MASK)))
+

    XTrafGen_StaticEnable enable the traffic genration when the core is configured Static Mode.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_StaticEnable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StaticVersion(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_VER_MASK) >>  \
+                XTG_STATIC_CNTL_VER_SHIFT )
+

    XTrafGen_StaticVersion returns the version value for the Axi TrafGen When configured in Static Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Static version value.
    +
    Note:
    C-style signature: u32 XTrafGen_StaticVersion(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StreamDisable(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_STREAM_CNTL_OFFSET,                         \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_RESET_MASK)))
+

    XTrafGen_StreamDisable Disable the traffic genration on the Axi TrafGen When core is configured in Streaming Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_StreamDisable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StreamEnable(InstancePtr  ) 
    +
    +
    +Value:
    (XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,           \
+                XTG_STREAM_CNTL_OFFSET,                                 \
+                (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_STEN_MASK)))
+

    XTrafGen_StreamEnable enable the traffic genration on the Axi TrafGen When the core is configured in Streaming Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_StreamEnable(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTrafGen_StreamVersion(InstancePtr  ) 
    +
    +
    +Value:
    ((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress,   \
+                XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_VER_MASK) \
+                >> XTG_STREAM_CNTL_VER_SHIFT )
+

    XTrafGen_StreamVersion returns the version value for the Axi TrafGen When configured in Streaming Mode

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
    Streaming Version Value.
    +
    Note:
    C-style signature: u8 XTrafGen_StreamVersion(XTrafGen *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTrafGen_WriteSlaveControlReg(InstancePtr,
    Value  ) 
    +
    +
    +Value:
    XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress,    \
+                XTG_SCNTL_OFFSET, Value)
+

    XTrafGen_WriteSlaveControlReg enables control bits of Slave Control Register. This API will write the value passed from the user.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Value is the Slave Control Register value to set
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTrafGen_WriteSlaveControlReg(XTrafGen *InstancePtr, u32 Value)
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void XTrafGen_AccessMasterRam (XTrafGen *  InstancePtr,
    u32  Offset,
    int  Length,
    u8  RdWrFlag,
    u32 *  Data 
    )
    +
    +
    +

    Write or Read Master RAM

    +

    The MSTRAM has 8 KB of internal RAM used for the following:

    +
      +
    • Take data from this RAM for write transactions
      • +
    • Store data to this RAM for read transaction
      • +
    +
    Parameters:
    + + + + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    Offset is the offset value in Master RAM.
    Length is the size of data to write/read.
    RdWrFlag specifies whether to write or read
    Data is the pointer to array which contains data to write or reads data into.
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XTrafGen_AddCommand (XTrafGen *  InstancePtr,
    XTrafGen_Cmd *  CmdPtr 
    )
    +
    +
    +

    Add a command to the software list of commands.

    +

    This function prepares the four Command Words and one Parameter Word from the Command structure passed from the user application. It then adds to a list of commands (maintained in the software). Both CMDRAM and PARAMRAM are divided into two regions, one for reads and one for writes. Each region can hold 256 commands with each entry containing four Command RAM words and one Parameter RAM word.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    CmdPtr is a pointer to Command structure.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if reached max number of command entries
      • +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XTrafGen_CfgInitialize (XTrafGen *  InstancePtr,
    XTrafGen_Config *  Config,
    u32  EffectiveAddress 
    )
    +
    +
    +

    This function initializes a AXI Traffic Generator device. This function must be called prior to using a AXI Traffic Generator Device. Initializing a engine includes setting up the register base address, setting up the instance data, and ensuring the hardware is in a quiescent state.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the Axi Traffic Generator instance to be worked on.
    CfgPtr references the structure holding the hardware configuration for the Axi Traffic Generator core to initialize.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS for successful initialization
      • +
    • XST_INVALID_PARAM if pointer to the configuration structure is NULL
      • +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XTrafGen_EraseAllCommands (XTrafGen *  InstancePtr ) 
    +
    +
    +

    Erase all Command Entry values

    +

    This function erases all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if programming internal RAMs failed
      • +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XTrafGen_GetLastValidIndex (XTrafGen *  InstancePtr,
    u32  RdWrFlag 
    )
    +
    +
    +

    Get last Valid Command Index of Write/Read region

    +

    The last valid command index is used to set 'my_depend' and 'other_depend' fields of the Command RAM (Word 2).

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    RdWrFlag specifies a Read or Write Region
    +
    +
    +
    Returns:
      +
    • Last Valid Command Index
      • +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    XTrafGen_Config* XTrafGen_LookupConfig (u32  DeviceId ) 
    +
    +
    +

    Look up the hardware configuration for a device instance

    +
    Parameters:
    + + +
    DeviceId is the unique device ID of the device to lookup for
    +
    +
    +
    Returns:
    The configuration structure for the device. If the device ID is not found,a NULL pointer is returned.
    +
    Note:
    None
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XTrafGen_PrintCmds (XTrafGen *  InstancePtr ) 
    +
    +
    +

    Display Command Entry values

    +

    This function prints all the 256 entries of both write and read regions with each entry containing four command words and parameter word.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XTrafGen_WriteCmdsToHw (XTrafGen *  InstancePtr ) 
    +
    +
    +

    Write Commands to internal Command and Parameter RAMs

    +

    This function writes all the prepared commands to hardware.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the Axi TrafGen instance to be worked on.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE if programming internal RAMs failed
      • +
    +
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__g_8c.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__g_8c.html index ccd14527..22a9e54b 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__g_8c.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__g_8c.html @@ -2,40 +2,72 @@ - xtrafgen_g.c File Reference + Xilinx Driver trafgen v3_2: xtrafgen_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xtrafgen_g.c File Reference

    Detailed Description

    -Provide a template for user to define their own hardware settings.

    -If using XPS, this file will be automatically generated.

    + + +

    +
    +

    xtrafgen_g.c File Reference

    #include "xtrafgen.h"
    +#include "xparameters.h"
    + + + +

    Variables

    XTrafGen_Config XTrafGen_ConfigTable []
    +

    Detailed Description

    +

    Provide a template for user to define their own hardware settings.

    +

    If using XPS, this file will be automatically generated.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a srt  01/24/13 First release
  1.01a adk  03/09/13 Updated driver to Support Static and Streaming mode.
- 2.00a adk  16/09/13 Fixed CR:737291

    -
    -

    -#include "xtrafgen.h"
    -#include "xparameters.h"
    - - -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 2.00a adk 16/09/13 Fixed CR:737291

    Variable Documentation

    + +
    +
    + + + + +
    XTrafGen_Config XTrafGen_ConfigTable[]
    +
    +
    +Initial value:
    +{
+        {
+                XPAR_XTRAFGEN_0_DEVICE_ID,
+                XPAR_XTRAFGEN_0_BASEADDR,
+                XPAR_XTRAFGEN_0_ATG_MODE,
+                XPAR_XTRAFGEN_0_ATG_MODE_L2,
+                XPAR_XTRAFGEN_0_AXIS_MODE
+        }
+}
+
    +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__hw_8h.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__hw_8h.html index acc56c40..5a87848a 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__hw_8h.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__hw_8h.html @@ -2,31 +2,215 @@ - xtrafgen_hw.h File Reference + Xilinx Driver trafgen v3_2: xtrafgen_hw.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xtrafgen_hw.h File Reference

    Detailed Description

    -This header file contains identifiers and macros that can be used to access the Axi Traffic Generator device. The driver APIs/functions are defined in xtrafgen.h.

    -

    Note:
    + + + +
    +

    xtrafgen_hw.h File Reference

    #include "xil_types.h"
    +#include "xil_io.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XTRAFGEN_HW_H
    #define XTrafGen_ReadReg(BaseAddress, RegOffset)   (Xil_In32(((BaseAddress) + (RegOffset))))
    #define XTrafGen_WriteReg(BaseAddress, RegOffset, Data)   Xil_Out32(((BaseAddress) + (RegOffset)), (Data))
    #define XTrafGen_ReadParamRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset))))
    #define XTrafGen_WriteParamRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset)), (Data))
    #define XTrafGen_ReadCmdRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset))))
    #define XTrafGen_WriteCmdRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset)), (Data))
    #define XTrafGen_ReadMasterRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset))))
    #define XTrafGen_WriteMasterRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset)), (Data))
    Device registers

    +

    #define XTG_MCNTL_OFFSET   0x00
    #define XTG_SCNTL_OFFSET   0x04
    #define XTG_ERR_STS_OFFSET   0x08
    #define XTG_ERR_EN_OFFSET   0x0C
    #define XTG_MSTERR_INTR_OFFSET   0x10
    #define XTG_CFG_STS_OFFSET   0x14
    #define XTG_STREAM_CNTL_OFFSET   0x30
    #define XTG_STREAM_CFG_OFFSET   0x34
    #define XTG_STREAM_TL_OFFSET   0x38
    #define XTG_STATIC_CNTL_OFFSET   0x60
    #define XTG_STATIC_LEN_OFFSET   0x64
    Internal RAM Offsets

    +

    #define XTG_PARAM_RAM_OFFSET   0x1000
    #define XTG_COMMAND_RAM_OFFSET   0x8000
    #define XTG_MASTER_RAM_OFFSET   0xC000
    Master Control Register bit definitions.

    These bits are associated with the XTG_MCNTL_OFFSET register.

    +

    #define XTG_MCNTL_REV_MASK   0xFF000000
    #define XTG_MCNTL_MSTID_MASK   0x00E00000
    #define XTG_MCNTL_MSTEN_MASK   0x00100000
    #define XTG_MCNTL_LOOPEN_MASK   0x00080000
    #define XTG_MCNTL_REV_SHIFT   24
    #define XTG_MCNTL_MSTID_SHIFT   21
    Slave Control Register bit definitions.

    These bits are associated with the XTG_SCNTL_OFFSET register.

    +

    #define XTG_SCNTL_BLKRD_MASK   0x00080000
    #define XTG_SCNTL_DISEXCL_MASK   0x00040000
    #define XTG_SCNTL_WORDR_MASK   0x00020000
    #define XTG_SCNTL_RORDR_MASK   0x00010000
    #define XTG_SCNTL_ERREN_MASK   0x00008000
    Error bitmasks

    These bits are shared with the XTG_ERR_STS_OFFSET and XTG_ERR_EN_OFFSET register.

    +

    #define XTG_ERR_ALL_MSTERR_MASK   0x001F0000
    #define XTG_ERR_ALL_SLVERR_MASK   0x00000003
    #define XTG_ERR_ALL_ERR_MASK   0x001F0003
    #define XTG_ERR_MSTCMP_MASK   0x80000000
    #define XTG_ERR_RIDER_MASK   0x00100000
    #define XTG_ERR_WIDER_MASK   0x00080000
    #define XTG_ERR_WRSPER_MASK   0x00040000
    #define XTG_ERR_RERRSP_MASK   0x00020000
    #define XTG_ERR_RLENER_MASK   0x00010000
    #define XTG_ERR_SWSTRB_MASK   0x00000002
    #define XTG_ERR_SWLENER_MASK   0x00000001
    Master Error Interrupt Enable Register bit definitions.

    These bits are associated with the XTG_MSTERR_INTR_OFFSET register.

    +

    #define XTG_MSTERR_INTR_MINTREN_MASK   0x00008000
    Config Status Register bit definitions.

    These bits are associated with the XTG_CFG_STS_OFFSET register.

    +

    #define XTG_CFG_STS_MWIDTH_SHIFT   28
    #define XTG_CFG_STS_MWIDTH_MASK   0x70000000
    #define XTG_CFG_STS_SWIDTH_SHIFT   25
    #define XTG_CFG_STS_SWIDTH_MASK   0x0E000000
    #define XTG_CFG_STS_MFULL_MASK   0x01000000
    #define XTG_CFG_STS_MBASIC_MASK   0x00800000
    Streaming Control Register bit definitions.

    These bits are associated with the XTG_STR_CFG_OFFSET register.

    +

    #define XTG_STREAM_CNTL_VER_SHIFT   24
    #define XTG_STREAM_CNTL_VER_MASK   0xFF000000
    #define XTG_STREAM_CNTL_TD_SHIFT   1
    #define XTG_STREAM_CNTL_TD_MASK   0x00000002
    #define XTG_STREAM_CNTL_STEN_MASK   0x00000001
    #define XTG_STREAM_CNTL_RESET_MASK   0x00000000
    Streaming Config Register bit definitions.

    These bits are associated with the XTG_STR_CFG_OFFSET register.

    +

    #define XTG_STREAM_CFG_PDLY_SHIFT   16
    #define XTG_STREAM_CFG_PDLY_MASK   0xFFFF0000
    #define XTG_STREAM_CFG_TDEST_SHIFT   8
    #define XTG_STREAM_CFG_TDEST_MASK   0x0000FF00
    #define XTG_STREAM_CFG_RANDLY_SHIFT   1
    #define XTG_STREAM_CFG_RANDLY_MASK   0x00000002
    #define XTG_STREAM_CFG_RANDL_MASK   0x00000001
    Streaming Transfer Length Register bit definitions.

    These bits are associated with the XTG_STR_TL_OFFSET register.

    +

    #define XTG_STREAM_TL_TCNT_SHIFT   16
    #define XTG_STREAM_TL_TCNT_MASK   0xFFFF0000
    #define XTG_STREAM_TL_TLEN_MASK   0x0000FFFF
    Static Control Register bit definitions.

    These bits are associated with the XTG_STATIC_CNTL_OFFSET register.

    +

    #define XTG_STATIC_CNTL_VER_SHIFT   24
    #define XTG_STATIC_CNTL_VER_MASK   0xFF000000
    #define XTG_STATIC_CNTL_TD_SHIFT   1
    #define XTG_STATIC_CNTL_TD_MASK   0x00000002
    #define XTG_STATIC_CNTL_STEN_MASK   0x00000001
    #define XTG_STATIC_CNTL_RESET_MASK   0x00000000
    Static Length Register bit definitions.

    These bits are associated with the XTG_STATIC_LEN_OFFSET register.

    +

    #define XTG_STATIC_LEN_BLEN_MASK   0x000000FF
    Axi Traffic Generator Command Entry field mask/shifts

    +

    #define XTG_ADDR_MASK   0xFFFFFFFF
    #define XTG_LEN_MASK   0xFF
    #define XTG_LOCK_MASK   0x1
    #define XTG_BURST_MASK   0x3
    #define XTG_SIZE_MASK   0x7
    #define XTG_ID_MASK   0x2F
    #define XTG_PROT_MASK   0x7
    #define XTG_LAST_ADDR_MASK   0x7
    #define XTG_VALID_CMD_MASK   0x1
    #define XTG_MSTRAM_INDEX_MASK   0x1FFF
    #define XTG_OTHER_DEPEND_MASK   0x1FF
    #define XTG_MY_DEPEND_MASK   0x1FF
    #define XTG_QOS_MASK   0xF
    #define XTG_USER_MASK   0xFF
    #define XTG_CACHE_MASK   0xF
    #define XTG_EXPECTED_RESP_MASK   0x7
    #define XTG_ADDR_SHIFT   0
    #define XTG_LEN_SHIFT   0
    #define XTG_LOCK_SHIFT   8
    #define XTG_BURST_SHIFT   10
    #define XTG_SIZE_SHIFT   12
    #define XTG_ID_SHIFT   15
    #define XTG_PROT_SHIFT   21
    #define XTG_LAST_ADDR_SHIFT   28
    #define XTG_VALID_CMD_SHIFT   31
    #define XTG_MSTRAM_INDEX_SHIFT   0
    #define XTG_OTHER_DEPEND_SHIFT   13
    #define XTG_MY_DEPEND_SHIFT   22
    #define XTG_QOS_SHIFT   16
    #define XTG_USER_SHIFT   8
    #define XTG_CACHE_SHIFT   4
    #define XTG_EXPECTED_RESP_SHIFT   0
    Axi Traffic Generator Parameter Entry field mask/shifts

    +

    #define XTG_PARAM_ADDRMODE_SHIFT   24
    #define XTG_PARAM_INTERVALMODE_SHIFT   26
    #define XTG_PARAM_IDMODE_SHIFT   28
    #define XTG_PARAM_OP_SHIFT   29
    #define XTG_PARAM_COUNT_SHIFT   0
    #define XTG_PARAM_DELAYRANGE_SHIFT   0
    #define XTG_PARAM_DELAY_SHIFT   8
    #define XTG_PARAM_ADDRRANGE_SHIFT   20
    #define XTG_PARAM_ADDRMODE_MASK   0x3
    #define XTG_PARAM_INTERVALMODE_MASK   0x3
    #define XTG_PARAM_IDMODE_MASK   0x1
    #define XTG_PARAM_OP_MASK   0x7
    #define XTG_PARAM_COUNT_MASK   0xFFFFFF
    #define XTG_PARAM_DELAYRANGE_MASK   0xFF
    #define XTG_PARAM_DELAY_MASK   0xFFF
    #define XTG_PARAM_ADDRRANGE_MASK   0xF
    #define XTG_PARAM_OP_NOP   0
    #define XTG_PARAM_OP_RPT   1
    #define XTG_PARAM_OP_DELAY   2
    #define XTG_PARAM_OP_FIXEDRPT   3
    #define XTG_PARAM_OP_ADDRMODE_CONST   0
    #define XTG_PARAM_OP_ADDRMODE_INCR   1
    #define XTG_PARAM_OP_ADDRMODE_RAND   2
    #define XTG_PARAMOP_INTERVALMODE_CONST   0
    #define XTG_PARAMOP_INTERVALMODE_RAND   1
    +

    Detailed Description

    +

    This header file contains identifiers and macros that can be used to access the Axi Traffic Generator device. The driver APIs/functions are defined in xtrafgen.h.

    +
    Note:
    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- ---------------------------------------------------------
  1.00a srt  1/12/13  First release
  1.01a adk  03/09/13 Updated Driver to Support Static and Streaming Mode
@@ -38,3465 +222,2033 @@ This header file contains identifiers and macros that can be used to access the
  2.01a adk  15/11/13 Fixed CR:760808 Added Mask for the New bit field added
 		      (XTG_MCNTL_LOOPEN_MASK).
  3.1   adk  28/04/14 Fixed CR:782131 Incorrect Mask value for the loopenable
-		      bit.

    -
    -

    -#include "xil_types.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - - - - - - - - - - + bit.

    Define Documentation

    + +
    +
    +

    Device registers

    #define XTG_MCNTL_OFFSET   0x00
    #define XTG_SCNTL_OFFSET   0x04
    #define XTG_ERR_STS_OFFSET   0x08
    #define XTG_ERR_EN_OFFSET   0x0C
    #define XTG_MSTERR_INTR_OFFSET   0x10
    #define XTG_CFG_STS_OFFSET   0x14
    #define XTG_STREAM_CNTL_OFFSET   0x30
    #define XTG_STREAM_CFG_OFFSET   0x34
    #define XTG_STREAM_TL_OFFSET   0x38
    #define XTG_STATIC_CNTL_OFFSET   0x60
    + + + +
    #define XTG_ADDR_MASK   0xFFFFFFFF
    +

    +
    +

    Driven to a*_addr line

    -#define XTG_STATIC_LEN_OFFSET   0x64 +
    +
    + +
    +
    + + + + +
    #define XTG_ADDR_SHIFT   0
    +
    +
    +

    Driven to a*_addr line

    -

    Internal RAM Offsets

    -#define XTG_PARAM_RAM_OFFSET   0x1000 +
    +
    + +
    +
    + + + + +
    #define XTG_BURST_MASK   0x3
    +
    +
    +

    Driven to a*_burst line

    -#define XTG_COMMAND_RAM_OFFSET   0x8000 +
    +
    + +
    +
    + + + + +
    #define XTG_BURST_SHIFT   10
    +
    +
    +

    Driven to a*_burst line

    -#define XTG_MASTER_RAM_OFFSET   0xC000 +
    +
    + +
    +
    + + + + +
    #define XTG_CACHE_MASK   0xF
    +
    +
    +

    Driven to a*_cache line

    -

    Master Control Register bit definitions.

    -These bits are associated with the XTG_MCNTL_OFFSET register.

    -#define XTG_MCNTL_REV_MASK   0xFF000000 +
    +
    + +
    +
    + + + + +
    #define XTG_CACHE_SHIFT   4
    +
    +
    +

    Driven to a*_cache line

    -#define XTG_MCNTL_MSTID_MASK   0x00E00000 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_MBASIC_MASK   0x00800000
    +
    +
    +

    Basic Mode

    -#define XTG_MCNTL_MSTEN_MASK   0x00100000 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_MFULL_MASK   0x01000000
    +
    +
    +

    Full Mode

    -#define XTG_MCNTL_LOOPEN_MASK   0x00080000 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_MWIDTH_MASK   0x70000000
    +
    +
    +

    Master Width Mask

    -#define XTG_MCNTL_REV_SHIFT   24 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_MWIDTH_SHIFT   28
    +
    +
    +

    Master Width Shift

    -#define XTG_MCNTL_MSTID_SHIFT   21 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_OFFSET   0x14
    +
    +
    +

    Config Status

    -

    Slave Control Register bit definitions.

    -These bits are associated with the XTG_SCNTL_OFFSET register.

    -#define XTG_SCNTL_BLKRD_MASK   0x00080000 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_SWIDTH_MASK   0x0E000000
    +
    +
    +

    Slave Width Mask

    -#define XTG_SCNTL_DISEXCL_MASK   0x00040000 +
    +
    + +
    +
    + + + + +
    #define XTG_CFG_STS_SWIDTH_SHIFT   25
    +
    +
    +

    Slave Width Shift

    -#define XTG_SCNTL_WORDR_MASK   0x00020000 +
    +
    + +
    +
    + + + + +
    #define XTG_COMMAND_RAM_OFFSET   0x8000
    +
    +
    +

    Command RAM Offset

    -#define XTG_SCNTL_RORDR_MASK   0x00010000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_ALL_ERR_MASK   0x001F0003
    +
    +
    +

    All Errors Mask

    -#define XTG_SCNTL_ERREN_MASK   0x00008000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_ALL_MSTERR_MASK   0x001F0000
    +
    +
    +

    Master Errors Mask

    -

    Error bitmasks

    -These bits are shared with the XTG_ERR_STS_OFFSET and XTG_ERR_EN_OFFSET register.

    -#define XTG_ERR_ALL_MSTERR_MASK   0x001F0000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_ALL_SLVERR_MASK   0x00000003
    +
    +
    +

    Slave Errors Mask

    -#define XTG_ERR_ALL_SLVERR_MASK   0x00000003 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_EN_OFFSET   0x0C
    +
    +
    +

    Error Enable

    -#define XTG_ERR_ALL_ERR_MASK   0x001F0003 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_MSTCMP_MASK   0x80000000
    +
    +
    +

    Master Complete Mask

    -#define XTG_ERR_MSTCMP_MASK   0x80000000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_RERRSP_MASK   0x00020000
    +
    +
    +

    MR Invalid RESP Mask

    -#define XTG_ERR_RIDER_MASK   0x00100000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_RIDER_MASK   0x00100000
    +
    +
    +

    Master Invalid RVALID Mask

    -#define XTG_ERR_WIDER_MASK   0x00080000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_RLENER_MASK   0x00010000
    +
    +
    +

    Master Read Length Mask

    -#define XTG_ERR_WRSPER_MASK   0x00040000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_STS_OFFSET   0x08
    +
    +
    +

    Error Status

    -#define XTG_ERR_RERRSP_MASK   0x00020000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_SWLENER_MASK   0x00000001
    +
    +
    +

    Slave Read Length Mask

    -#define XTG_ERR_RLENER_MASK   0x00010000 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_SWSTRB_MASK   0x00000002
    +
    +
    +

    Slave WSTRB Illegal Mask

    -#define XTG_ERR_SWSTRB_MASK   0x00000002 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_WIDER_MASK   0x00080000
    +
    +
    +

    Master Invalid BVALID Mask

    -#define XTG_ERR_SWLENER_MASK   0x00000001 +
    +
    + +
    +
    + + + + +
    #define XTG_ERR_WRSPER_MASK   0x00040000
    +
    +
    +

    MW Invalid RESP Mask

    -

    Master Error Interrupt Enable Register bit definitions.

    -These bits are associated with the XTG_MSTERR_INTR_OFFSET register.

    -#define XTG_MSTERR_INTR_MINTREN_MASK   0x00008000 +
    +
    + +
    +
    + + + + +
    #define XTG_EXPECTED_RESP_MASK   0x7
    +
    +
    +

    Expected response

    -

    Config Status Register bit definitions.

    -These bits are associated with the XTG_CFG_STS_OFFSET register.

    -#define XTG_CFG_STS_MWIDTH_SHIFT   28 +
    +
    + +
    +
    + + + + +
    #define XTG_EXPECTED_RESP_SHIFT   0
    +
    +
    +

    Expected response

    -#define XTG_CFG_STS_MWIDTH_MASK   0x70000000 +
    +
    + +
    +
    + + + + +
    #define XTG_ID_MASK   0x2F
    +
    +
    +

    Driven to a*_id line

    -#define XTG_CFG_STS_SWIDTH_SHIFT   25 +
    +
    + +
    +
    + + + + +
    #define XTG_ID_SHIFT   15
    +
    +
    +

    Driven to a*_id line

    -#define XTG_CFG_STS_SWIDTH_MASK   0x0E000000 +
    +
    + +
    +
    + + + + +
    #define XTG_LAST_ADDR_MASK   0x7
    +
    +
    +

    Last address

    -#define XTG_CFG_STS_MFULL_MASK   0x01000000 +
    +
    + +
    +
    + + + + +
    #define XTG_LAST_ADDR_SHIFT   28
    +
    +
    +

    Last address

    -#define XTG_CFG_STS_MBASIC_MASK   0x00800000 +
    +
    + +
    +
    + + + + +
    #define XTG_LEN_MASK   0xFF
    +
    +
    +

    Driven to a*_len line

    -

    Streaming Control Register bit definitions.

    -These bits are associated with the XTG_STR_CFG_OFFSET register.

    -#define XTG_STREAM_CNTL_VER_SHIFT   24 +
    +
    + +
    +
    + + + + +
    #define XTG_LEN_SHIFT   0
    +
    +
    +

    Driven to a*_len line

    -#define XTG_STREAM_CNTL_VER_MASK   0xFE000000 +
    +
    + +
    +
    + + + + +
    #define XTG_LOCK_MASK   0x1
    +
    +
    +

    Driven to a*_lock line

    -#define XTG_STREAM_CNTL_TD_SHIFT   1 +
    +
    + +
    +
    + + + + +
    #define XTG_LOCK_SHIFT   8
    +
    +
    +

    Driven to a*_lock line

    -#define XTG_STREAM_CNTL_TD_MASK   0x00000002 +
    +
    + +
    +
    + + + + +
    #define XTG_MASTER_RAM_OFFSET   0xC000
    +
    +
    +

    Master RAM Offset

    -#define XTG_STREAM_CNTL_STEN_MASK   0x00000001 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_LOOPEN_MASK   0x00080000
    +
    +
    +

    Loop enable Mask

    -#define XTG_STREAM_CNTL_RESET_MASK   0x00000000 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_MSTEN_MASK   0x00100000
    +
    +
    +

    Master Logic Enable Mask

    -

    Streaming Config Register bit definitions.

    -These bits are associated with the XTG_STR_CFG_OFFSET register.

    -#define XTG_STREAM_CFG_PDLY_SHIFT   16 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_MSTID_MASK   0x00E00000
    +
    +
    +

    M_ID_WIDTH Mask

    -#define XTG_STREAM_CFG_PDLY_MASK   0xFFFF0000 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_MSTID_SHIFT   21
    +
    +
    +

    M_ID_WIDTH shift

    -#define XTG_STREAM_CFG_TDEST_SHIFT   8 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_OFFSET   0x00
    +
    +
    +

    Master Control

    -#define XTG_STREAM_CFG_TDEST_MASK   0x0000FF00 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_REV_MASK   0xFF000000
    +
    +
    +

    Core Revision Mask

    -#define XTG_STREAM_CFG_RANDLY_SHIFT   1 +
    +
    + +
    +
    + + + + +
    #define XTG_MCNTL_REV_SHIFT   24
    +
    +
    +

    Core Rev shift

    -#define XTG_STREAM_CFG_RANDLY_MASK   0x00000002 +
    +
    + +
    +
    + + + + +
    #define XTG_MSTERR_INTR_MINTREN_MASK   0x00008000
    +
    +
    +

    Master Err Interrupt Enable

    -#define XTG_STREAM_CFG_RANDL_MASK   0x00000001 +
    +
    + +
    +
    + + + + +
    #define XTG_MSTERR_INTR_OFFSET   0x10
    +
    +
    +

    Master Err Interrupt Enable

    -

    Streaming Transfer Length Register bit definitions.

    -These bits are associated with the XTG_STR_TL_OFFSET register.

    -#define XTG_STREAM_TL_TCNT_SHIFT   16 +
    +
    + +
    +
    + + + + +
    #define XTG_MSTRAM_INDEX_MASK   0x1FFF
    +
    +
    +

    Master RAM Index

    -#define XTG_STREAM_TL_TCNT_MASK   0xFFFF0000 +
    +
    + +
    +
    + + + + +
    #define XTG_MSTRAM_INDEX_SHIFT   0
    +
    +
    +

    Master RAM Index

    -#define XTG_STREAM_TL_TLEN_MASK   0x0000FFFF +
    +
    + +
    +
    + + + + +
    #define XTG_MY_DEPEND_MASK   0x1FF
    +
    +
    +

    My depend command no

    -

    Static Control Register bit definitions.

    -These bits are associated with the XTG_STATIC_CNTL_OFFSET register.

    -#define XTG_STATIC_CNTL_VER_SHIFT   24 +
    +
    + +
    +
    + + + + +
    #define XTG_MY_DEPEND_SHIFT   22
    +
    +
    +

    My depend cmd num

    -#define XTG_STATIC_CNTL_VER_MASK   0xFE000000 +
    +
    + +
    +
    + + + + +
    #define XTG_OTHER_DEPEND_MASK   0x1FF
    +
    +
    +

    Other depend Command no

    -#define XTG_STATIC_CNTL_TD_SHIFT   1 +
    +
    + +
    +
    + + + + +
    #define XTG_OTHER_DEPEND_SHIFT   13
    +
    +
    +

    Other depend cmd num

    -#define XTG_STATIC_CNTL_TD_MASK   0x00000002 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_ADDRMODE_MASK   0x3
    +
    +
    +

    Address mode

    -#define XTG_STATIC_CNTL_STEN_MASK   0x00000001 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_ADDRMODE_SHIFT   24
    +
    +
    +

    Address mode

    -#define XTG_STATIC_CNTL_RESET_MASK   0x00000000 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_ADDRRANGE_MASK   0xF
    +
    +
    +

    Address Range

    -

    Static Length Register bit definitions.

    -These bits are associated with the XTG_STATIC_LEN_OFFSET register.

    -#define XTG_STATIC_LEN_BLEN_MASK   0x000000FF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_ADDRRANGE_SHIFT   20
    +
    +
    +

    Address Range

    -

    Axi Traffic Generator Command Entry field mask/shifts

    -#define XTG_ADDR_MASK   0xFFFFFFFF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_COUNT_MASK   0xFFFFFF
    +
    +
    +

    Repeat/Delay count

    -#define XTG_LEN_MASK   0xFF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_COUNT_SHIFT   0
    +
    +
    +

    Repeat/Delay count

    -#define XTG_LOCK_MASK   0x1 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_DELAY_MASK   0xFFF
    +
    +
    +

    FIXED RPT Delay count

    -#define XTG_BURST_MASK   0x3 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_DELAY_SHIFT   8
    +
    +
    +

    FIXED RPT Delay count

    -#define XTG_SIZE_MASK   0x7 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_DELAYRANGE_MASK   0xFF
    +
    +
    +

    Delay Range

    -#define XTG_ID_MASK   0x1F +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_DELAYRANGE_SHIFT   0
    +
    +
    +

    Delay Range

    -#define XTG_PROT_MASK   0x7 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_IDMODE_MASK   0x1
    +
    +
    +

    Id mode

    -#define XTG_LAST_ADDR_MASK   0x7 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_IDMODE_SHIFT   28
    +
    +
    +

    Id mode

    -#define XTG_VALID_CMD_MASK   0x1 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_INTERVALMODE_MASK   0x3
    +
    +
    +

    Interval mode

    -#define XTG_MSTRAM_INDEX_MASK   0x1FFF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_INTERVALMODE_SHIFT   26
    +
    +
    +

    Interval mode

    -#define XTG_OTHER_DEPEND_MASK   0x1FF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_ADDRMODE_CONST   0
    +
    +
    +

    Constant Addr mode

    -#define XTG_MY_DEPEND_MASK   0x1FF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_ADDRMODE_INCR   1
    +
    +
    +

    Increment Addr mode

    -#define XTG_QOS_MASK   0xF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_ADDRMODE_RAND   2
    +
    +
    +

    Random Addr mode

    -#define XTG_USER_MASK   0xFF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_DELAY   2
    +
    +
    +

    Delay mode

    -#define XTG_CACHE_MASK   0xF +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_FIXEDRPT   3
    +
    +
    +

    Fixed Repeat Delay

    -#define XTG_EXPECTED_RESP_MASK   0x7 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_MASK   0x7
    +
    +
    +

    Opcode

    -#define XTG_ADDR_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_NOP   0
    +
    +
    +

    NOP mode

    -#define XTG_LEN_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_RPT   1
    +
    +
    +

    Repeat mode

    -#define XTG_LOCK_SHIFT   8 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_OP_SHIFT   29
    +
    +
    +

    Opcode

    -#define XTG_BURST_SHIFT   10 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAM_RAM_OFFSET   0x1000
    +
    +
    +

    Parameter RAM Offset

    -#define XTG_SIZE_SHIFT   12 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAMOP_INTERVALMODE_CONST   0
    +
    +
    +

    Constant Interval mode

    -#define XTG_ID_SHIFT   15 +
    +
    + +
    +
    + + + + +
    #define XTG_PARAMOP_INTERVALMODE_RAND   1
    +
    +
    +

    Random Interval mode

    -#define XTG_PROT_SHIFT   21 +
    +
    + +
    +
    + + + + +
    #define XTG_PROT_MASK   0x7
    +
    +
    +

    Driven to a*_prot line

    -#define XTG_LAST_ADDR_SHIFT   28 +
    +
    + +
    +
    + + + + +
    #define XTG_PROT_SHIFT   21
    +
    +
    +

    Driven to a*_prot line

    -#define XTG_VALID_CMD_SHIFT   31 +
    +
    + +
    +
    + + + + +
    #define XTG_QOS_MASK   0xF
    +
    +
    +

    Driven to a*_qos line

    -#define XTG_MSTRAM_INDEX_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_QOS_SHIFT   16
    +
    +
    +

    Driven to a*_qos line

    -#define XTG_OTHER_DEPEND_SHIFT   13 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_BLKRD_MASK   0x00080000
    +
    +
    +

    Enable Block Read

    -#define XTG_MY_DEPEND_SHIFT   22 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_DISEXCL_MASK   0x00040000
    +
    +
    +

    Disable Exclusive Access

    -#define XTG_QOS_SHIFT   16 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_ERREN_MASK   0x00008000
    +
    +
    +

    Slv Error Interrupt Enable

    -#define XTG_USER_SHIFT   5 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_OFFSET   0x04
    +
    +
    +

    Slave Control

    -#define XTG_CACHE_SHIFT   4 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_RORDR_MASK   0x00010000
    +
    +
    +

    Read Response Order Enable

    -#define XTG_EXPECTED_RESP_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_SCNTL_WORDR_MASK   0x00020000
    +
    +
    +

    Write Response Order Enable

    -

    Axi Traffic Generator Parameter Entry field mask/shifts

    -#define XTG_PARAM_ADDRMODE_SHIFT   24 +
    +
    + +
    +
    + + + + +
    #define XTG_SIZE_MASK   0x7
    +
    +
    +

    Driven to a*_size line

    -#define XTG_PARAM_INTERVALMODE_SHIFT   26 +
    +
    + +
    +
    + + + + +
    #define XTG_SIZE_SHIFT   12
    +
    +
    +

    Driven to a*_size line

    -#define XTG_PARAM_IDMODE_SHIFT   28 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_OFFSET   0x60
    +
    +
    +

    Static Mode Register Descrptions Static Control

    -#define XTG_PARAM_OP_SHIFT   29 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_RESET_MASK   0x00000000
    +
    +
    +

    Static Disable Mask

    -#define XTG_PARAM_COUNT_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_STEN_MASK   0x00000001
    +
    +
    +

    Static enable Mask

    -#define XTG_PARAM_DELAYRANGE_SHIFT   0 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_TD_MASK   0x00000002
    +
    +
    +

    Transfer Done Mask

    -#define XTG_PARAM_DELAY_SHIFT   8 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_TD_SHIFT   1
    +
    +
    +

    Transfer Done Shift

    -#define XTG_PARAM_ADDRRANGE_SHIFT   20 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_VER_MASK   0xFF000000
    +
    +
    +

    Version Mask

    -#define XTG_PARAM_ADDRMODE_MASK   0x3 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_CNTL_VER_SHIFT   24
    +
    +
    +

    Version Shift

    -#define XTG_PARAM_INTERVALMODE_MASK   0x3 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_LEN_BLEN_MASK   0x000000FF
    +
    +
    +

    Burst length Mask

    -#define XTG_PARAM_IDMODE_MASK   0x1 +
    +
    + +
    +
    + + + + +
    #define XTG_STATIC_LEN_OFFSET   0x64
    +
    +
    +

    Static Length

    -#define XTG_PARAM_OP_MASK   0x7 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_OFFSET   0x34
    +
    +
    +

    Streaming Config

    -#define XTG_PARAM_COUNT_MASK   0xFFFFFF +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_PDLY_MASK   0xFFFF0000
    +
    +
    +

    Programmable Delay Mask

    -#define XTG_PARAM_DELAYRANGE_MASK   0xFF +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_PDLY_SHIFT   16
    +
    +
    +

    Programmable Delay Shift

    -#define XTG_PARAM_DELAY_MASK   0xFFF +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_RANDL_MASK   0x00000001
    +
    +
    +

    Random Length Mask

    -#define XTG_PARAM_ADDRRANGE_MASK   0xF +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_RANDLY_MASK   0x00000002
    +
    +
    +

    Random Delay Mask

    -#define XTG_PARAM_OP_NOP   0 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_RANDLY_SHIFT   1
    +
    +
    +

    Random Delay Shift

    -#define XTG_PARAM_OP_RPT   1 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_TDEST_MASK   0x0000FF00
    +
    +
    +

    TDEST PORT Mask

    -#define XTG_PARAM_OP_DELAY   2 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CFG_TDEST_SHIFT   8
    +
    +
    +

    TDEST PORT Shift

    -#define XTG_PARAM_OP_FIXEDRPT   3 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_OFFSET   0x30
    +
    +
    +

    Streaming Control

    -#define XTG_PARAM_OP_ADDRMODE_CONST   0 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_RESET_MASK   0x00000000
    +
    +
    +

    Streaming Disable Mask

    -#define XTG_PARAM_OP_ADDRMODE_INCR   1 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_STEN_MASK   0x00000001
    +
    +
    +

    Streaming Enable Mask

    -#define XTG_PARAM_OP_ADDRMODE_RAND   2 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_TD_MASK   0x00000002
    +
    +
    +

    Transfer Done Mask

    -#define XTG_PARAMOP_INTERVALMODE_CONST   0 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_TD_SHIFT   1
    +
    +
    +

    Transfer Done Shift

    -#define XTG_PARAMOP_INTERVALMODE_RAND   1 +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_VER_MASK   0xFF000000
    +
    +
    +

    Version Mask

    -

    Defines

    -#define XTrafGen_ReadReg(BaseAddress, RegOffset)   (Xil_In32(((BaseAddress) + (RegOffset)))) +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_CNTL_VER_SHIFT   24
    +
    +
    +

    Version Shift

    -#define XTrafGen_WriteReg(BaseAddress, RegOffset, Data)   Xil_Out32(((BaseAddress) + (RegOffset)), (Data)) +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_TL_OFFSET   0x38
    +
    +
    +

    Streaming Transfer Length

    -#define XTrafGen_ReadParamRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset)))) +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_TL_TCNT_MASK   0xFFFF0000
    +
    +
    +

    Transfer Count Mask

    -#define XTrafGen_WriteParamRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset)), (Data)) +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_TL_TCNT_SHIFT   16
    +
    +
    +

    Transfer Count Shift

    -#define XTrafGen_ReadCmdRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset)))) +
    +
    + +
    +
    + + + + +
    #define XTG_STREAM_TL_TLEN_MASK   0x0000FFFF
    +
    +
    +

    Transfer Length Mask

    -#define XTrafGen_WriteCmdRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset)), (Data)) +
    +
    + +
    +
    + + + + +
    #define XTG_USER_MASK   0xFF
    +
    +
    +

    Driven to a*_user line

    -#define XTrafGen_ReadMasterRam(BaseAddress, Offset)   (Xil_In32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset)))) +
    +
    + +
    +
    + + + + +
    #define XTG_USER_SHIFT   8
    +
    +
    +

    Driven to a*_user line

    -#define XTrafGen_WriteMasterRam(BaseAddress, Offset, Data)   Xil_Out32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset)), (Data)) +
    +
    + +
    +
    + + + + +
    #define XTG_VALID_CMD_MASK   0x1
    +
    +
    +

    Valid Command

    - -

    Define Documentation

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTG_ADDR_MASK   0xFFFFFFFF #define XTG_VALID_CMD_SHIFT   31
    -
    - - - - - -
    -   - + +
    +

    Valid Command

    -

    -Driven to a*_addr line

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTG_ADDR_SHIFT   0 #define XTRAFGEN_HW_H
    -
    - - - - - -
    -   - + +
    -

    -Driven to a*_addr line

    -

    - - - - -
    - + + + +
    +
    +
    + + + + + - - -
    #define XTrafGen_ReadCmdRam(BaseAddress,
    #define XTG_BURST_MASK   0x3
    -
    - - - - - -
    -   - - -

    -Driven to a*_burst line

    -

    - - - - -
    - - - - -
    #define XTG_BURST_SHIFT   10
    -
    - - - - - -
    -   - - -

    -Driven to a*_burst line

    -

    - - - - -
    - - - - -
    #define XTG_CACHE_MASK   0xF
    -
    - - - - - -
    -   - - -

    -Driven to a*_cache line

    -

    - - - - -
    - - - - -
    #define XTG_CACHE_SHIFT   4
    -
    - - - - - -
    -   - - -

    -Driven to a*_cache line

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_MBASIC_MASK   0x00800000
    -
    - - - - - -
    -   - - -

    -Basic Mode

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_MFULL_MASK   0x01000000
    -
    - - - - - -
    -   - - -

    -Full Mode

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_MWIDTH_MASK   0x70000000
    -
    - - - - - -
    -   - - -

    -Master Width Mask

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_MWIDTH_SHIFT   28
    -
    - - - - - -
    -   - - -

    -Master Width Shift

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_OFFSET   0x14
    -
    - - - - - -
    -   - - -

    -Config Status

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_SWIDTH_MASK   0x0E000000
    -
    - - - - - -
    -   - - -

    -Slave Width Mask

    -

    - - - - -
    - - - - -
    #define XTG_CFG_STS_SWIDTH_SHIFT   25
    -
    - - - - - -
    -   - - -

    -Slave Width Shift

    -

    - - - - -
    - - - - -
    #define XTG_COMMAND_RAM_OFFSET   0x8000
    -
    - - - - - -
    -   - - -

    -Command RAM Offset

    -

    - - - - -
    - - - - -
    #define XTG_ERR_ALL_ERR_MASK   0x001F0003
    -
    - - - - - -
    -   - - -

    -All Errors Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_ALL_MSTERR_MASK   0x001F0000
    -
    - - - - - -
    -   - - -

    -Master Errors Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_ALL_SLVERR_MASK   0x00000003
    -
    - - - - - -
    -   - - -

    -Slave Errors Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_EN_OFFSET   0x0C
    -
    - - - - - -
    -   - - -

    -Error Enable

    -

    - - - - -
    - - - - -
    #define XTG_ERR_MSTCMP_MASK   0x80000000
    -
    - - - - - -
    -   - - -

    -Master Complete Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_RERRSP_MASK   0x00020000
    -
    - - - - - -
    -   - - -

    -MR Invalid RESP Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_RIDER_MASK   0x00100000
    -
    - - - - - -
    -   - - -

    -Master Invalid RVALID Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_RLENER_MASK   0x00010000
    -
    - - - - - -
    -   - - -

    -Master Read Length Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_STS_OFFSET   0x08
    -
    - - - - - -
    -   - - -

    -Error Status

    -

    - - - - -
    - - - - -
    #define XTG_ERR_SWLENER_MASK   0x00000001
    -
    - - - - - -
    -   - - -

    -Slave Read Length Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_SWSTRB_MASK   0x00000002
    -
    - - - - - -
    -   - - -

    -Slave WSTRB Illegal Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_WIDER_MASK   0x00080000
    -
    - - - - - -
    -   - - -

    -Master Invalid BVALID Mask

    -

    - - - - -
    - - - - -
    #define XTG_ERR_WRSPER_MASK   0x00040000
    -
    - - - - - -
    -   - - -

    -MW Invalid RESP Mask

    -

    - - - - -
    - - - - -
    #define XTG_EXPECTED_RESP_MASK   0x7
    -
    - - - - - -
    -   - - -

    -Expected response

    -

    - - - - -
    - - - - -
    #define XTG_EXPECTED_RESP_SHIFT   0
    -
    - - - - - -
    -   - - -

    -Expected response

    -

    - - - - -
    - - - - -
    #define XTG_ID_MASK   0x1F
    -
    - - - - - -
    -   - - -

    -Driven to a*_id line

    -

    - - - - -
    - - - - -
    #define XTG_ID_SHIFT   15
    -
    - - - - - -
    -   - - -

    -Driven to a*_id line

    -

    - - - - -
    - - - - -
    #define XTG_LAST_ADDR_MASK   0x7
    -
    - - - - - -
    -   - - -

    -Last address

    -

    - - - - -
    - - - - -
    #define XTG_LAST_ADDR_SHIFT   28
    -
    - - - - - -
    -   - - -

    -Last address

    -

    - - - - -
    - - - - -
    #define XTG_LEN_MASK   0xFF
    -
    - - - - - -
    -   - - -

    -Driven to a*_len line

    -

    - - - - -
    - - - - -
    #define XTG_LEN_SHIFT   0
    -
    - - - - - -
    -   - - -

    -Driven to a*_len line

    -

    - - - - -
    - - - - -
    #define XTG_LOCK_MASK   0x1
    -
    - - - - - -
    -   - - -

    -Driven to a*_lock line

    -

    - - - - -
    - - - - -
    #define XTG_LOCK_SHIFT   8
    -
    - - - - - -
    -   - - -

    -Driven to a*_lock line

    -

    - - - - -
    - - - - -
    #define XTG_MASTER_RAM_OFFSET   0xC000
    -
    - - - - - -
    -   - - -

    -Master RAM Offset

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_LOOPEN_MASK   0x00080000
    -
    - - - - - -
    -   - - -

    -Loop enable Mask

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_MSTEN_MASK   0x00100000
    -
    - - - - - -
    -   - - -

    -Master Logic Enable Mask

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_MSTID_MASK   0x00E00000
    -
    - - - - - -
    -   - - -

    -M_ID_WIDTH Mask

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_MSTID_SHIFT   21
    -
    - - - - - -
    -   - - -

    -M_ID_WIDTH shift

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_OFFSET   0x00
    -
    - - - - - -
    -   - - -

    -Master Control

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_REV_MASK   0xFF000000
    -
    - - - - - -
    -   - - -

    -Core Revision Mask

    -

    - - - - -
    - - - - -
    #define XTG_MCNTL_REV_SHIFT   24
    -
    - - - - - -
    -   - - -

    -Core Rev shift

    -

    - - - - -
    - - - - -
    #define XTG_MSTERR_INTR_MINTREN_MASK   0x00008000
    -
    - - - - - -
    -   - - -

    -Master Err Interrupt Enable

    -

    - - - - -
    - - - - -
    #define XTG_MSTERR_INTR_OFFSET   0x10
    -
    - - - - - -
    -   - - -

    -Master Err Interrupt Enable

    -

    - - - - -
    - - - - -
    #define XTG_MSTRAM_INDEX_MASK   0x1FFF
    -
    - - - - - -
    -   - - -

    -Master RAM Index

    -

    - - - - -
    - - - - -
    #define XTG_MSTRAM_INDEX_SHIFT   0
    -
    - - - - - -
    -   - - -

    -Master RAM Index

    -

    - - - - -
    - - - - -
    #define XTG_MY_DEPEND_MASK   0x1FF
    -
    - - - - - -
    -   - - -

    -My depend command no

    -

    - - - - -
    - - - - -
    #define XTG_MY_DEPEND_SHIFT   22
    -
    - - - - - -
    -   - - -

    -My depend cmd num

    -

    - - - - -
    - - - - -
    #define XTG_OTHER_DEPEND_MASK   0x1FF
    -
    - - - - - -
    -   - - -

    -Other depend Command no

    -

    - - - - -
    - - - - -
    #define XTG_OTHER_DEPEND_SHIFT   13
    -
    - - - - - -
    -   - - -

    -Other depend cmd num

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_ADDRMODE_MASK   0x3
    -
    - - - - - -
    -   - - -

    -Address mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_ADDRMODE_SHIFT   24
    -
    - - - - - -
    -   - - -

    -Address mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_ADDRRANGE_MASK   0xF
    -
    - - - - - -
    -   - - -

    -Address Range

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_ADDRRANGE_SHIFT   20
    -
    - - - - - -
    -   - - -

    -Address Range

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_COUNT_MASK   0xFFFFFF
    -
    - - - - - -
    -   - - -

    -Repeat/Delay count

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_COUNT_SHIFT   0
    -
    - - - - - -
    -   - - -

    -Repeat/Delay count

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_DELAY_MASK   0xFFF
    -
    - - - - - -
    -   - - -

    -FIXED RPT Delay count

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_DELAY_SHIFT   8
    -
    - - - - - -
    -   - - -

    -FIXED RPT Delay count

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_DELAYRANGE_MASK   0xFF
    -
    - - - - - -
    -   - - -

    -Delay Range

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_DELAYRANGE_SHIFT   0
    -
    - - - - - -
    -   - - -

    -Delay Range

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_IDMODE_MASK   0x1
    -
    - - - - - -
    -   - - -

    -Id mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_IDMODE_SHIFT   28
    -
    - - - - - -
    -   - - -

    -Id mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_INTERVALMODE_MASK   0x3
    -
    - - - - - -
    -   - - -

    -Interval mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_INTERVALMODE_SHIFT   26
    -
    - - - - - -
    -   - - -

    -Interval mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_ADDRMODE_CONST   0
    -
    - - - - - -
    -   - - -

    -Constant Addr mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_ADDRMODE_INCR   1
    -
    - - - - - -
    -   - - -

    -Increment Addr mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_ADDRMODE_RAND   2
    -
    - - - - - -
    -   - - -

    -Random Addr mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_DELAY   2
    -
    - - - - - -
    -   - - -

    -Delay mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_FIXEDRPT   3
    -
    - - - - - -
    -   - - -

    -Fixed Repeat Delay

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_MASK   0x7
    -
    - - - - - -
    -   - - -

    -Opcode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_NOP   0
    -
    - - - - - -
    -   - - -

    -NOP mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_RPT   1
    -
    - - - - - -
    -   - - -

    -Repeat mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_OP_SHIFT   29
    -
    - - - - - -
    -   - - -

    -Opcode

    -

    - - - - -
    - - - - -
    #define XTG_PARAM_RAM_OFFSET   0x1000
    -
    - - - - - -
    -   - - -

    -Parameter RAM Offset

    -

    - - - - -
    - - - - -
    #define XTG_PARAMOP_INTERVALMODE_CONST   0
    -
    - - - - - -
    -   - - -

    -Constant Interval mode

    -

    - - - - -
    - - - - -
    #define XTG_PARAMOP_INTERVALMODE_RAND   1
    -
    - - - - - -
    -   - - -

    -Random Interval mode

    -

    - - - - -
    - - - - -
    #define XTG_PROT_MASK   0x7
    -
    - - - - - -
    -   - - -

    -Driven to a*_prot line

    -

    - - - - -
    - - - - -
    #define XTG_PROT_SHIFT   21
    -
    - - - - - -
    -   - - -

    -Driven to a*_prot line

    -

    - - - - -
    - - - - -
    #define XTG_QOS_MASK   0xF
    -
    - - - - - -
    -   - - -

    -Driven to a*_qos line

    -

    - - - - -
    - - - - -
    #define XTG_QOS_SHIFT   16
    -
    - - - - - -
    -   - - -

    -Driven to a*_qos line

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_BLKRD_MASK   0x00080000
    -
    - - - - - -
    -   - - -

    -Enable Block Read

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_DISEXCL_MASK   0x00040000
    -
    - - - - - -
    -   - - -

    -Disable Exclusive Access

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_ERREN_MASK   0x00008000
    -
    - - - - - -
    -   - - -

    -Slv Error Interrupt Enable

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_OFFSET   0x04
    -
    - - - - - -
    -   - - -

    -Slave Control

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_RORDR_MASK   0x00010000
    -
    - - - - - -
    -   - - -

    -Read Response Order Enable

    -

    - - - - -
    - - - - -
    #define XTG_SCNTL_WORDR_MASK   0x00020000
    -
    - - - - - -
    -   - - -

    -Write Response Order Enable

    -

    - - - - -
    - - - - -
    #define XTG_SIZE_MASK   0x7
    -
    - - - - - -
    -   - - -

    -Driven to a*_size line

    -

    - - - - -
    - - - - -
    #define XTG_SIZE_SHIFT   12
    -
    - - - - - -
    -   - - -

    -Driven to a*_size line

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_OFFSET   0x60
    -
    - - - - - -
    -   - - -

    -Static Mode Register Descrptions Static Control

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_RESET_MASK   0x00000000
    -
    - - - - - -
    -   - - -

    -Static Disable Mask

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_STEN_MASK   0x00000001
    -
    - - - - - -
    -   - - -

    -Static enable Mask

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_TD_MASK   0x00000002
    -
    - - - - - -
    -   - - -

    -Transfer Done Mask

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_TD_SHIFT   1
    -
    - - - - - -
    -   - - -

    -Transfer Done Shift

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_VER_MASK   0xFE000000
    -
    - - - - - -
    -   - - -

    -Version Mask

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_CNTL_VER_SHIFT   24
    -
    - - - - - -
    -   - - -

    -Version Shift

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_LEN_BLEN_MASK   0x000000FF
    -
    - - - - - -
    -   - - -

    -Burst length Mask

    -

    - - - - -
    - - - - -
    #define XTG_STATIC_LEN_OFFSET   0x64
    -
    - - - - - -
    -   - - -

    -Static Length

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_OFFSET   0x34
    -
    - - - - - -
    -   - - -

    -Streaming Config

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_PDLY_MASK   0xFFFF0000
    -
    - - - - - -
    -   - - -

    -Programmable Delay Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_PDLY_SHIFT   16
    -
    - - - - - -
    -   - - -

    -Programmable Delay Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_RANDL_MASK   0x00000001
    -
    - - - - - -
    -   - - -

    -Random Length Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_RANDLY_MASK   0x00000002
    -
    - - - - - -
    -   - - -

    -Random Delay Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_RANDLY_SHIFT   1
    -
    - - - - - -
    -   - - -

    -Random Delay Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_TDEST_MASK   0x0000FF00
    -
    - - - - - -
    -   - - -

    -TDEST PORT Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CFG_TDEST_SHIFT   8
    -
    - - - - - -
    -   - - -

    -TDEST PORT Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_OFFSET   0x30
    -
    - - - - - -
    -   - - -

    -Streaming Control

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_RESET_MASK   0x00000000
    -
    - - - - - -
    -   - - -

    -Streaming Disable Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_STEN_MASK   0x00000001
    -
    - - - - - -
    -   - - -

    -Streaming Enable Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_TD_MASK   0x00000002
    -
    - - - - - -
    -   - - -

    -Transfer Done Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_TD_SHIFT   1
    -
    - - - - - -
    -   - - -

    -Transfer Done Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_VER_MASK   0xFE000000
    -
    - - - - - -
    -   - - -

    -Version Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_CNTL_VER_SHIFT   24
    -
    - - - - - -
    -   - - -

    -Version Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_TL_OFFSET   0x38
    -
    - - - - - -
    -   - - -

    -Streaming Transfer Length

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_TL_TCNT_MASK   0xFFFF0000
    -
    - - - - - -
    -   - - -

    -Transfer Count Mask

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_TL_TCNT_SHIFT   16
    -
    - - - - - -
    -   - - -

    -Transfer Count Shift

    -

    - - - - -
    - - - - -
    #define XTG_STREAM_TL_TLEN_MASK   0x0000FFFF
    -
    - - - - - -
    -   - - -

    -Transfer Length Mask

    -

    - - - - -
    - - - - -
    #define XTG_USER_MASK   0xFF
    -
    - - - - - -
    -   - - -

    -Driven to a*_user line

    -

    - - - - -
    - - - - -
    #define XTG_USER_SHIFT   5
    -
    - - - - - -
    -   - - -

    -Driven to a*_user line

    -

    - - - - -
    - - - - -
    #define XTG_VALID_CMD_MASK   0x1
    -
    - - - - - -
    -   - - -

    -Valid Command

    -

    - - - - -
    - - - - -
    #define XTG_VALID_CMD_SHIFT   31
    -
    - - - - - -
    -   - - -

    -Valid Command

    -

    - - - - -
    - - - - - - - - - - - - -
    #define XTrafGen_ReadCmdRam ( BaseAddress,
    Offset   )    (Xil_In32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset))))
    -
    - - - - + + + + + + +
    -   - - -

    -XTrafGen_ReadCmdRam returns the value read from the Command RAM specified by Offset.

    -

    Parameters:
    +
    		Offset  )    (Xil_In32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset))))
    +

    +
    +

    XTrafGen_ReadCmdRam returns the value read from the Command RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the Command RAM to be read.
    +
    -
    Returns:
    Returns the 32-bit value of the memory location.
    -
    Note:
    C-style signature: u32 XTrafGen_ReadCmdRam(u32 BaseAddress, u32 Offset)
    - - - -

    - - - - -
    - +
    Returns:
    Returns the 32-bit value of the memory location.
    +
    Note:
    C-style signature: u32 XTrafGen_ReadCmdRam(u32 BaseAddress, u32 Offset)
    + + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XTrafGen_ReadMasterRam ( BaseAddress,
    Offset   )    (Xil_In32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset))))#define XTrafGen_ReadMasterRam(BaseAddress,
    Offset  )    (Xil_In32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset))))
    -
    - - - - - -
    -   - - -

    -XTrafGen_ReadMasterRam returns the value read from the Master RAM specified by Offset.

    -

    Parameters:
    + +
    +

    XTrafGen_ReadMasterRam returns the value read from the Master RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the Master RAM to be read.
    +
    -
    Returns:
    Returns the 32-bit value of the memory location.
    -
    Note:
    C-style signature: u32 XTrafGen_ReadMasterRam(u32 BaseAddress, u32 Offset)
    -
    -

    - - - - -
    - +
    Returns:
    Returns the 32-bit value of the memory location.
    +
    Note:
    C-style signature: u32 XTrafGen_ReadMasterRam(u32 BaseAddress, u32 Offset)
    + + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XTrafGen_ReadParamRam ( BaseAddress,
    Offset   )    (Xil_In32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset))))#define XTrafGen_ReadParamRam(BaseAddress,
    Offset  )    (Xil_In32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset))))
    -
    - - - - - -
    -   - - -

    -XTrafGen_ReadParamRam returns the value read from the Parameter RAM specified by Offset.

    -

    Parameters:
    + +
    +

    XTrafGen_ReadParamRam returns the value read from the Parameter RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the Parameter RAM to be read.
    +
    -
    Returns:
    Returns the 32-bit value of the memory location.
    -
    Note:
    C-style signature: u32 XTrafGen_ReadParamRam(u32 BaseAddress, u32 Offset)
    -
    -

    - - - - -
    - +
    Returns:
    Returns the 32-bit value of the memory location.
    +
    Note:
    C-style signature: u32 XTrafGen_ReadParamRam(u32 BaseAddress, u32 Offset)
    + + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XTrafGen_ReadReg ( BaseAddress,
    RegOffset   )    (Xil_In32(((BaseAddress) + (RegOffset))))#define XTrafGen_ReadReg(BaseAddress,
    RegOffset  )    (Xil_In32(((BaseAddress) + (RegOffset))))
    -
    - - - - - -
    -   - - -

    -XTrafGen_ReadReg returns the value read from the register specified by RegOffset.

    -

    Parameters:
    + +
    +

    XTrafGen_ReadReg returns the value read from the register specified by RegOffset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    RegOffset is the offset of the register to be read.
    +
    -
    Returns:
    Returns the 32-bit value of the register.
    -
    Note:
    C-style signature: u32 XTrafGen_ReadReg(u32 BaseAddress, u32 RegOffset)
    -
    -

    - - - - -
    - +
    Returns:
    Returns the 32-bit value of the register.
    +
    Note:
    C-style signature: u32 XTrafGen_ReadReg(u32 BaseAddress, u32 RegOffset)
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XTrafGen_WriteCmdRam ( BaseAddress,
    Offset,
    Data   )    Xil_Out32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset)), (Data))#define XTrafGen_WriteCmdRam(BaseAddress,
    Offset,
    Data  )    Xil_Out32(((BaseAddress) + XTG_COMMAND_RAM_OFFSET + (Offset)), (Data))
    -
    - - - - - -
    -   - - -

    -XTrafGen_WriteCmdRam, writes Data to the Command RAM specified by Offset.

    -

    Parameters:
    + +
    +

    XTrafGen_WriteCmdRam, writes Data to the Command RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the location in Command RAM to be written.
    Data is the 32-bit value to write to the Command RAM.
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XTrafGen_WriteCmdRam(u32 BaseAddress, u32 Offset, u32 Data)
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_WriteCmdRam(u32 BaseAddress, u32 Offset, u32 Data)
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XTrafGen_WriteMasterRam ( BaseAddress,
    Offset,
    Data   )    Xil_Out32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset)), (Data))#define XTrafGen_WriteMasterRam(BaseAddress,
    Offset,
    Data  )    Xil_Out32(((BaseAddress) + XTG_MASTER_RAM_OFFSET + (Offset)), (Data))
    -
    - - - - - -
    -   - - -

    -XTrafGen_WriteMasterRam, writes Data to the Master RAM specified by Offset.

    -

    Parameters:
    + +
    +

    XTrafGen_WriteMasterRam, writes Data to the Master RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the location in Master RAM to be written.
    Data is the 32-bit value to write to the Master RAM.
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XTrafGen_WriteMasterRam(u32 BaseAddress, u32 Offset, u32 Data)
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_WriteMasterRam(u32 BaseAddress, u32 Offset, u32 Data)
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XTrafGen_WriteParamRam ( BaseAddress,
    Offset,
    Data   )    Xil_Out32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset)), (Data))#define XTrafGen_WriteParamRam(BaseAddress,
    Offset,
    Data  )    Xil_Out32(((BaseAddress) + XTG_PARAM_RAM_OFFSET + (Offset)), (Data))
    -
    - - - - - -
    -   - - -

    -XTrafGen_WriteParamRam, writes Data to the Parameter RAM specified by Offset.

    -

    Parameters:
    + +
    +

    XTrafGen_WriteParamRam, writes Data to the Parameter RAM specified by Offset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    Offset is the offset of the location in Parameter RAM to be written.
    Data is the 32-bit value to write to the Parameter RAM.
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XTrafGen_WriteParamRam(u32 BaseAddress, u32 Offset, u32 Data)
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_WriteParamRam(u32 BaseAddress, u32 Offset, u32 Data)
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XTrafGen_WriteReg ( BaseAddress,
    RegOffset,
    Data   )    Xil_Out32(((BaseAddress) + (RegOffset)), (Data))#define XTrafGen_WriteReg(BaseAddress,
    RegOffset,
    Data  )    Xil_Out32(((BaseAddress) + (RegOffset)), (Data))
    -
    - - - - - -
    -   - - -

    -XTrafGen_WriteReg, writes Data to the register specified by RegOffset.

    -

    Parameters:
    + +
    +

    XTrafGen_WriteReg, writes Data to the register specified by RegOffset.

    +
    Parameters:
    BaseAddress is the base address of the Axi TrafGen device.
    RegOffset is the offset of the register to be written.
    Data is the 32-bit value to write to the register.
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XTrafGen_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    C-style signature: void XTrafGen_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__sinit_8c.html b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__sinit_8c.html index bf046e7a..0c40f5e6 100755 --- a/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/trafgen/doc/html/api/xtrafgen__sinit_8c.html @@ -2,77 +2,73 @@ - xtrafgen_sinit.c File Reference + Xilinx Driver trafgen v3_2: xtrafgen_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xtrafgen_sinit.c File Reference

    Detailed Description

    -This file contains static initialzation functionality for Axi Traffic Generator driver.

    -

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
- ----- ---- -------- -------------------------------------------------------
- 1.00a srt  01/24/13 First release

    -
    -

    -#include "xparameters.h"
    -#include "xtrafgen.h"
    - - - - + + +
    +

    xtrafgen_sinit.c File Reference

    #include "xparameters.h"
    +#include "xtrafgen.h"
    +

    Functions

    XTrafGen_Config * XTrafGen_LookupConfig (u32 DeviceId)
    + +

    Functions

    XTrafGen_Config * XTrafGen_LookupConfig (u32 DeviceId)
    -

    Function Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This file contains static initialzation functionality for Axi Traffic Generator driver.

    +
    + MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ ----- ---- -------- -------------------------------------------------------
+ 1.00a srt  01/24/13 First release

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    XTrafGen_Config* XTrafGen_LookupConfig ( u32  DeviceId  ) XTrafGen_Config* XTrafGen_LookupConfig (u32  DeviceId ) 
    -
    - - - - - -
    -   - - -

    -Look up the hardware configuration for a device instance

    -

    Parameters:
    + +
    +

    Look up the hardware configuration for a device instance

    +
    Parameters:
    DeviceId is the unique device ID of the device to lookup for
    +
    -
    Returns:
    The configuration structure for the device. If the device ID is not found,a NULL pointer is returned.
    -
    Note:
    None
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    The configuration structure for the device. If the device ID is not found,a NULL pointer is returned.
    +
    Note:
    None
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/annotated.html index 3222b387..00353b31 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/annotated.html @@ -2,27 +2,39 @@ - Class List + Xilinx Driver ttcps v2_0: Class List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    + + + +

    Class List

    Here are the classes, structs, unions and interfaces with brief descriptions: +
    OptionsMap
    XTtcPs
    XTtcPs_Config
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/classes.html new file mode 100755 index 00000000..b55ac1d0 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/classes.html @@ -0,0 +1,40 @@ + + + + + Xilinx Driver ttcps v2_0: Alphabetical List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Class Index

    O | X
    + +
      O  
    +    		OptionsMap   
      X  
    +    		XTtcPs   XTtcPs_Config   
    O | X
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/doxygen.png b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/doxygen.png deleted file mode 100755 index d8021941..00000000 Binary files a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/doxygen.png and /dev/null differ diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/driver_api_doxygen.css b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/driver_api_doxygen.css deleted file mode 100755 index 8b5d35bb..00000000 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/driver_api_doxygen.css +++ /dev/null @@ -1,334 +0,0 @@ -BODY { - background-color: #FFFFFF; - font-family: Verdana, Arial, Helvetica, Sans-serif; -} - -H1 { - margin-bottom: 0em; - font-size: 2.00em; - font-style: normal; - color: #990033; -} - -H2 { - font-size: 1.05em; - font-style: normal; - color: #666666; -} - -H3 { - font-size: 1.00em; - font-style: normal; - color: #000000; -} - -H4 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -H5 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -H6 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -OL { -} - -UL { -} - -LI { -} - -P { - color: #000000; -} - -P.Caution { - color: #990033; -} - -P.Code { - font-family: Courier New, Courier, Mono; - color: #003399; -} - -P.HeadingDBox { - font-weight: bold; -} - -P.HeadingGlossary { - font-weight: bold; -} - -P.LinkGlossary { - margin-bottom: .50em; -} - -P.Note { -} - -P.SysInOut { - font-family: Courier New, Courier, Mono; -} - -P.TableFootnote { - font-size: .80em; - margin-bottom: .70em; -} - -P.TableHeading { - font-weight: bold; - color: #FFFFFF; -} - -P.TableTitle { - font-style: italic; - font-weight: bold; -} - -SPAN.aEmphasis { - font-style: italic; -} - -SPAN.aFilename { - font-family: Courier New, Courier, Mono; -} - - -SPAN.aGUISysIn { - font-family: Verdana, Arial, Helvetica, Sans-serif; - font-weight: bold; -} - -SPAN.aReference { - font-style: italic; -} - -SPAN.aSysIn { - font-family: Courier New, Courier, Monospace; - font-weight: bold; -} - -SPAN.aSysOut { - font-family: Courier New, Courier, Monospace; -} - -SPAN.aSymbol { - font-family: Symbol; -} - -CAPTION { font-weight: bold } -DIV.qindex { - width: 100%; - background-color: #eeeeff; - border: 1px solid #B0B0B0; - text-align: center; - margin: 2px; - padding: 2px; -} -A.qindex { - text-decoration: none; - font-weight: bold; - color: #1A419D; - padding: 2px; -} -A.qindex:visited { - text-decoration: none; - font-weight: bold; - color: #1A419D - padding: 2px; -} -A.qindex:hover { - text-decoration: none; - background-color: #ddddff; - padding: 2px; -} -A.qindexHL { - text-decoration: none; - font-weight: bold; - background-color: #6666cc; - color: #ffffff; - padding: 2 6px; - border: 1px double #9295C2; - } -A.qindexHL:hover { - text-decoration: none; - background-color: #6666cc; - color: #ffffff; - padding: 2px 6px; -} -A.qindexHL:visited { text-decoration: none; background-color: #6666cc; color: #ffffff } -A.el { text-decoration: none; font-weight: bold } -A.elRef { font-weight: bold } -A.code { text-decoration: none; font-weight: normal; color: #1A419D} -A.codeRef { font-weight: normal; color: #1A419D} -A:hover { text-decoration: none; background-color: #f2f2ff } -DL.el { margin-left: -1cm } -PRE.fragment { - border: 1px solid #CCCCCC; - background-color: #f5f5f5; - margin-top: 4px; - margin-bottom: 4px; - margin-left: 2px; - margin-right: 8px; - padding-left: 6px; - padding-right: 6px; - padding-top: 4px; - padding-bottom: 4px; -} -DIV.fragment { - border: 1px solid #CCCCCC; - background-color: #f5f5f5; - padding: 6px; -} -DIV.ah { background-color: black; font-weight: bold; color: #ffffff; margin-bottom: 3px; margin-top: 3px } -TD.md { background-color: #F4F4FB; font-weight: bold; } -TD.mdname1 { background-color: #F4F4FB; font-weight: bold; color: #602020; } -TD.mdname { background-color: #F4F4FB; font-weight: bold; color: #602020; width: 600px; } -DIV.groupHeader { margin-left: 16px; margin-top: 12px; margin-bottom: 6px; font-weight: bold } -DIV.groupText { margin-left: 16px; font-style: italic; font-size: smaller } -BODY { - background: white; - color: black; - margin-right: 20px; - margin-left: 20px; -} -TD.indexkey { - background-color: #eeeeff; - font-weight: bold; - padding-right : 10px; - padding-top : 2px; - padding-left : 10px; - padding-bottom : 2px; - margin-left : 0px; - margin-right : 0px; - margin-top : 2px; - margin-bottom : 2px; - border: 1px solid #CCCCCC; -} -TD.indexvalue { - background-color: #eeeeff; - font-style: italic; - padding-right : 10px; - padding-top : 2px; - padding-left : 10px; - padding-bottom : 2px; - margin-left : 0px; - margin-right : 0px; - margin-top : 2px; - margin-bottom : 2px; - border: 1px solid #CCCCCC; -} -TR.memlist { - background-color: #f0f0f0; -} -P.formulaDsp { text-align: center; } -IMG.formulaDsp { } -IMG.formulaInl { vertical-align: middle; } -SPAN.keyword { color: #008000 } -SPAN.keywordtype { color: #604020 } -SPAN.keywordflow { color: #e08000 } -SPAN.comment { color: #800000 } -SPAN.preprocessor { color: #806020 } -SPAN.stringliteral { color: #002080 } -SPAN.charliteral { color: #008080 } -.mdTable { - border: 1px solid #868686; - background-color: #F4F4FB; -} -.mdRow { - padding: 8px 10px; -} -.mdescLeft { - font-size: smaller; - font-family: Verdana, Arial, Helvetica, sans-serif; - background-color: #FAFAFA; - padding-left: 8px; - border-top: 1px none #E0E0E0; - border-right: 1px none #E0E0E0; - border-bottom: 1px none #E0E0E0; - border-left: 1px none #E0E0E0; - margin: 0px; -} -.mdescRight { - font-size: smaller; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-style: italic; - background-color: #FAFAFA; - padding-left: 4px; - border-top: 1px none #E0E0E0; - border-right: 1px none #E0E0E0; - border-bottom: 1px none #E0E0E0; - border-left: 1px none #E0E0E0; - margin: 0px; - padding-bottom: 0px; - padding-right: 8px; -} -.memItemLeft { - padding: 1px 0px 0px 8px; - margin: 4px; - border-top-width: 1px; - border-right-width: 1px; - border-bottom-width: 1px; - border-left-width: 1px; - border-top-style: solid; - border-top-color: #E0E0E0; - border-right-color: #E0E0E0; - border-bottom-color: #E0E0E0; - border-left-color: #E0E0E0; - border-right-style: none; - border-bottom-style: none; - border-left-style: none; - background-color: #FAFAFA; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-size: 12px; -} -.memItemRight { - padding: 1px 0px 0px 8px; - margin: 4px; - border-top-width: 1px; - border-right-width: 1px; - border-bottom-width: 1px; - border-left-width: 1px; - border-top-style: solid; - border-top-color: #E0E0E0; - border-right-color: #E0E0E0; - border-bottom-color: #E0E0E0; - border-left-color: #E0E0E0; - border-right-style: none; - border-bottom-style: none; - border-left-style: none; - background-color: #FAFAFA; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-size: 13px; -} -.search { color: #003399; - font-weight: bold; -} -FORM.search { - margin-bottom: 0px; - margin-top: 0px; -} -INPUT.search { font-size: 75%; - color: #000080; - font-weight: normal; - background-color: #eeeeff; -} -TD.tiny { font-size: 75%; -} -a { - color: #252E78; -} -a:visited { - color: #3D2185; -} diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/files.html index 08c289f5..a92a87d4 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/files.html @@ -2,31 +2,43 @@ - File Index + Xilinx Driver ttcps v2_0: File Index - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    File List

    Here is a list of all documented files with brief descriptions: + + + +
    +

    File List

    Here is a list of all files with brief descriptions:
    +
    xttcps.c
    xttcps.h
    xttcps_g.c
    xttcps_hw.h
    xttcps_options.c
    xttcps_selftest.c
    xttcps_sinit.c
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions.html index 34bba958..9f617c5b 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions.html @@ -2,38 +2,66 @@ - Class Members + Xilinx Driver ttcps v2_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -Here is a list of all documented class members with links to the class documentation for each member: -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions_vars.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions_vars.html index 38ebd942..22585e2c 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions_vars.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/functions_vars.html @@ -2,38 +2,66 @@ - Class Members - Variables + Xilinx Driver ttcps v2_0: Class Members - Variables - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals.html index bca37408..14601b83 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals.html @@ -2,89 +2,277 @@ - Class Members + Xilinx Driver ttcps v2_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    - -
    -

    -Here is a list of all documented file members with links to the documentation: -

    -

    - x -

    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_defs.html index 06a1512a..4055aee5 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_defs.html @@ -2,78 +2,233 @@ - Class Members + Xilinx Driver ttcps v2_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    - -
    -

    + +

    +
      -

    -

    - x -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_func.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_func.html index 6bc7b993..ebf3052f 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_func.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_func.html @@ -2,45 +2,84 @@ - Class Members + Xilinx Driver ttcps v2_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_vars.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_vars.html index 66ad33f3..84dd8845 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_vars.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/globals_vars.html @@ -2,36 +2,48 @@ - Class Members + Xilinx Driver ttcps v2_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/index.html index a4e80f19..3790bb7b 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/index.html @@ -2,38 +2,49 @@ - xttcps v2_0 + Xilinx Driver ttcps v2_0: ttcps v2_0 - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -

    xttcps v2_0

    -

    -This is the driver for one 16-bit timer counter in the Triple Timer Counter (TTC) module in the Ps block.

    -The TTC module provides three independent timer/counter modules that can each be clocked using either the system clock (pclk) or an externally driven clock (ext_clk). In addition, each counter can independently prescale its selected clock input (divided by 2 to 65536). Counters can be set to decrement or increment.

    -Each of the counters can be programmed to generate interrupt pulses: . At a regular, predefined period, that is on a timed interval . When the counter registers overflow . When the count matches any one of the three 'match' registers

    -Therefore, up to six different events can trigger a timer interrupt: three match interrupts, an overflow interrupt, an interval interrupt and an event timer interrupt. Note that the overflow interrupt and the interval interrupt are mutually exclusive.

    -Initialization & Configuration

    -An XTtcPs_Config structure is used to configure a driver instance. Information in the XTtcPs_Config structure is the hardware properties about the device.

    -A driver instance is initialized through XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr is a pointer to the XTtcPs_Config structure, it can be looked up statically through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The EffectiveAddr can be the static base address of the device or virtual mapped address if address translation is supported.

    -Interrupts

    -Interrupt handler is not provided by the driver, as handling of interrupt is application specific.

    -

    Note:
    The default setting for a timer/counter is: + + + +
    +

    ttcps v2_0

    This is the driver for one 16-bit timer counter in the Triple Timer Counter (TTC) module in the Ps block.

    +

    The TTC module provides three independent timer/counter modules that can each be clocked using either the system clock (pclk) or an externally driven clock (ext_clk). In addition, each counter can independently prescale its selected clock input (divided by 2 to 65536). Counters can be set to decrement or increment.

    +

    Each of the counters can be programmed to generate interrupt pulses: . At a regular, predefined period, that is on a timed interval . When the counter registers overflow . When the count matches any one of the three 'match' registers

    +

    Therefore, up to six different events can trigger a timer interrupt: three match interrupts, an overflow interrupt, an interval interrupt and an event timer interrupt. Note that the overflow interrupt and the interval interrupt are mutually exclusive.

    +

    Initialization & Configuration

    +

    An XTtcPs_Config structure is used to configure a driver instance. Information in the XTtcPs_Config structure is the hardware properties about the device.

    +

    A driver instance is initialized through XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr is a pointer to the XTtcPs_Config structure, it can be looked up statically through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The EffectiveAddr can be the static base address of the device or virtual mapped address if address translation is supported.

    +

    Interrupts

    +

    Interrupt handler is not provided by the driver, as handling of interrupt is application specific.

    +
    Note:
    The default setting for a timer/counter is:
      +
    • Overflow Mode
      • +
    • Internal clock (pclk) selected
      • +
    • Counter disabled
      • +
    • All Interrupts disabled
      • +
    • Output waveforms disabled
      • +
    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date     Changes
  ----- ------ -------- -----------------------------------------------------
  1.00a drg/jz 01/20/10 First release..
- 2.0   adk    12/10/13 Updated as per the New Tcl API's

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 2.0 adk 12/10/13 Updated as per the New Tcl API's
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map-members.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map-members.html new file mode 100755 index 00000000..60eeaa61 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map-members.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver ttcps v2_0: Member List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    OptionsMap Member List

    This is the complete list of members for OptionsMap, including all inherited members. + + + +
    MaskOptionsMap
    OptionOptionsMap
    RegisterOptionsMap
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map.html new file mode 100755 index 00000000..f032e63b --- /dev/null +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_options_map.html @@ -0,0 +1,86 @@ + + + + + Xilinx Driver ttcps v2_0: OptionsMap Struct Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    OptionsMap Struct Reference

    +

    List of all members.

    + + + + + +

    Public Attributes

    u32 Option
    u32 Mask
    u32 Register
    +

    Member Data Documentation

    + +
    +
    + + + + +
    u32 OptionsMap::Mask
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u32 OptionsMap::Option
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u32 OptionsMap::Register
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps-members.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps-members.html index f0fa8f84..b7697633 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps-members.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps-members.html @@ -2,26 +2,37 @@ - Member List + Xilinx Driver ttcps v2_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTtcPs Member List

    This is the complete list of members for XTtcPs, including all inherited members.

    - - -
    ConfigXTtcPs
    IsReadyXTtcPs
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTtcPs Member List

    This is the complete list of members for XTtcPs, including all inherited members. + + +
    ConfigXTtcPs
    IsReadyXTtcPs
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps.html index da049880..06ca43f2 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps.html @@ -2,85 +2,78 @@ - XTtcPs Struct Reference + Xilinx Driver ttcps v2_0: XTtcPs Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTtcPs Struct Reference

    #include <xttcps.h> -

    -List of all members.

    Detailed Description

    -The XTtcPs driver instance data. The user is required to allocate a variable of this type for each PS timer/counter device in the system. A pointer to a variable of this type is then passed to various driver API functions. -

    + + +

    +
    +

    XTtcPs Struct Reference

    +

    #include <xttcps.h>

    + +

    List of all members.

    - - - - - - + + +

    Public Attributes

    XTtcPs_Config Config
    u32 IsReady

    Public Attributes

    XTtcPs_Config Config
    u32 IsReady
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    The XTtcPs driver instance data. The user is required to allocate a variable of this type for each PS timer/counter device in the system. A pointer to a variable of this type is then passed to various driver API functions.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    XTtcPs_Config XTtcPs::Config XTtcPs_Config XTtcPs::Config
    -
    - - - - - -
    -   - + +
    +

    Configuration structure

    -

    -Configuration structure

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTtcPs::IsReady u32 XTtcPs::IsReady
    -
    - - - - - -
    -   - + +
    +

    Device is initialized and ready

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Device is initialized and ready

    -

    The documentation for this struct was generated from the following file:
      -
    • xttcps.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config-members.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config-members.html index efbdf6c8..5d0f81dd 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config-members.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config-members.html @@ -2,27 +2,38 @@ - Member List + Xilinx Driver ttcps v2_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTtcPs_Config Member List

    This is the complete list of members for XTtcPs_Config, including all inherited members.

    - - - -
    BaseAddressXTtcPs_Config
    DeviceIdXTtcPs_Config
    InputClockHzXTtcPs_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XTtcPs_Config Member List

    This is the complete list of members for XTtcPs_Config, including all inherited members. + + + +
    BaseAddressXTtcPs_Config
    DeviceIdXTtcPs_Config
    InputClockHzXTtcPs_Config
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config.html index 062becd9..d02d3ed6 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/struct_x_ttc_ps___config.html @@ -2,110 +2,93 @@ - XTtcPs_Config Struct Reference + Xilinx Driver ttcps v2_0: XTtcPs_Config Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XTtcPs_Config Struct Reference

    #include <xttcps.h> -

    -List of all members.

    Detailed Description

    -This typedef contains configuration information for the device. -

    + + +

    +
    +

    XTtcPs_Config Struct Reference

    +

    #include <xttcps.h>

    + +

    List of all members.

    - - - - - - - - + + + +

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This typedef contains configuration information for the device.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XTtcPs_Config::BaseAddress u32 XTtcPs_Config::BaseAddress
    -
    - - - - - -
    -   - + +
    +

    Base address for device

    -

    -Base address for device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XTtcPs_Config::DeviceId u16 XTtcPs_Config::DeviceId
    -
    - - - - - -
    -   - + +
    +

    Unique ID for device

    -

    -Unique ID for device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XTtcPs_Config::InputClockHz u32 XTtcPs_Config::InputClockHz
    -
    - - - - - -
    -   - + +
    +

    Input clock frequency

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Input clock frequency

    -

    The documentation for this struct was generated from the following file:
      -
    • xttcps.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/tabs.css index a61552a6..a4441634 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs INPUT +DIV.tabs #MSearchBox { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs INPUT DIV.tabs TD { - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -82,21 +82,24 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI#current A +DIV.tabs LI.current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI#current SPAN +DIV.tabs LI.current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.nav +DIV.navpath { background : none; border : none; border-bottom : 1px solid #84B0C7; + text-align : center; + margin : 2px; + padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8c.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8c.html index 9e7e75bb..a9df8bb6 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8c.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8c.html @@ -2,360 +2,311 @@ - xttcps.c File Reference + Xilinx Driver ttcps v2_0: xttcps.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps.c File Reference

    Detailed Description

    -This file contains the implementation of the XTtcPs driver. This driver controls the operation of one timer counter in the Triple Timer Counter (TTC) module in the Ps block. Refer to xttcps.h for more detailed description of the driver.

    -

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
- ----- ------ -------- -------------------------------------------------
- 1.00a drg/jz 01/21/10 First release

    -
    -

    -#include "xttcps.h"
    + + +

    +
    +

    xttcps.c File Reference

    #include "xttcps.h"
    - - - - - - - - - - - - - - + + + + + + +

    Functions

    int XTtcPs_CfgInitialize (XTtcPs *InstancePtr, XTtcPs_Config *ConfigPtr, u32 EffectiveAddr)
    void XTtcPs_SetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex, u16 Value)
    u16 XTtcPs_GetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex)
    void XTtcPs_SetPrescaler (XTtcPs *InstancePtr, u8 PrescalerValue)
    u8 XTtcPs_GetPrescaler (XTtcPs *InstancePtr)
    void XTtcPs_CalcIntervalFromFreq (XTtcPs *InstancePtr, u32 Freq, u16 *Interval, u8 *Prescaler)

    Functions

    int XTtcPs_CfgInitialize (XTtcPs *InstancePtr, XTtcPs_Config *ConfigPtr, u32 EffectiveAddr)
    void XTtcPs_SetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex, u16 Value)
    u16 XTtcPs_GetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex)
    void XTtcPs_SetPrescaler (XTtcPs *InstancePtr, u8 PrescalerValue)
    u8 XTtcPs_GetPrescaler (XTtcPs *InstancePtr)
    void XTtcPs_CalcIntervalFromFreq (XTtcPs *InstancePtr, u32 Freq, u16 *Interval, u8 *Prescaler)
    -

    Function Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This file contains the implementation of the XTtcPs driver. This driver controls the operation of one timer counter in the Triple Timer Counter (TTC) module in the Ps block. Refer to xttcps.h for more detailed description of the driver.

    +
    + MODIFICATION HISTORY:
     Ver   Who    Date     Changes
+ ----- ------ -------- -------------------------------------------------
+ 1.00a drg/jz 01/21/10 First release

    Function Documentation

    + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XTtcPs_CalcIntervalFromFreq ( XTtcPs *  InstancePtr, void XTtcPs_CalcIntervalFromFreq (XTtcPs *  InstancePtr,
    u32  Freq, u32  Freq,
    u16 *  Interval, u16 *  Interval,
    u8 *  Prescaleru8 *  Prescaler 
    ) )
    -
    - - - - - -
    -   - - -

    -This function calculates the interval value as well as the prescaler value for a given frequency.

    -

    Parameters:
    + +
    +

    This function calculates the interval value as well as the prescaler value for a given frequency.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    Freq is the requested output frequency for the device.
    Interval is the interval value for the given frequency, it is the output value for this function.
    Prescaler is the prescaler value for the given frequency, it is the output value for this function.
    +
    -
    Returns:
    None.
    -
    Note:
    Upon successful calculation for the given frequency, Interval and Prescaler carry the settings for the timer counter; Upon unsuccessful calculation, Interval and Prescaler are set to 0xFF(FF) for their maximum values to signal the caller of failure. Therefore, caller needs to check the return interval or prescaler values for whether the function has succeeded.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    Upon successful calculation for the given frequency, Interval and Prescaler carry the settings for the timer counter; Upon unsuccessful calculation, Interval and Prescaler are set to 0xFF(FF) for their maximum values to signal the caller of failure. Therefore, caller needs to check the return interval or prescaler values for whether the function has succeeded.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    int XTtcPs_CfgInitialize ( XTtcPs *  InstancePtr, int XTtcPs_CfgInitialize (XTtcPs *  InstancePtr,
    XTtcPs_Config *  ConfigPtr, XTtcPs_Config *  ConfigPtr,
    u32  EffectiveAddru32  EffectiveAddr 
    ) )
    -
    - - - - - -
    -   - - -

    -Initializes a specific XTtcPs instance such that the driver is ready to use. This function initializes a single timer counter in the triple timer counter function block.

    -The state of the device after initialization is:

      -
    • Overflow Mode
    • Internal (pclk) selected
    • Counter disabled
    • All Interrupts disabled
    • Output waveforms disabled
    -

    -

    Parameters:
    + +
    +

    Initializes a specific XTtcPs instance such that the driver is ready to use. This function initializes a single timer counter in the triple timer counter function block.

    +

    The state of the device after initialization is:

    +
      +
    • Overflow Mode
      • +
    • Internal (pclk) selected
      • +
    • Counter disabled
      • +
    • All Interrupts disabled
      • +
    • Output waveforms disabled
      • +
    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    ConfigPtr is a reference to a structure containing information about a specific TTC device.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, then use ConfigPtr->BaseAddress for this parameter, passing the physical address instead.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the initialization is successful.
    • XST_DEVICE_IS_STARTED if the device is started. It must be stopped to re-initialize.
    -

    -

    Note:
    Device has to be stopped first to call this function to initialize it.
    -
    -

    - - - - -
    - +
  • XST_SUCCESS if the initialization is successful.
    • +
  • XST_DEVICE_IS_STARTED if the device is started. It must be stopped to re-initialize.
    • + +
    Note:
    Device has to be stopped first to call this function to initialize it.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    u16 XTtcPs_GetMatchValue ( XTtcPs *  InstancePtr, u16 XTtcPs_GetMatchValue (XTtcPs *  InstancePtr,
    u8  MatchIndexu8  MatchIndex 
    ) )
    -
    - - - - - -
    -   - - -

    -This function is used to get the value of the match registers. There are three match registers.

    -

    Parameters:
    + +
    +

    This function is used to get the value of the match registers. There are three match registers.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    MatchIndex is the index to the match register to be set. Valid values are 0, 1, or 2.
    +
    -
    Returns:
    None
    -
    Note:
    None
    -
    -

    - - - - -
    - +
    Returns:
    None
    +
    Note:
    None
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u8 XTtcPs_GetPrescaler ( XTtcPs *  InstancePtr  ) u8 XTtcPs_GetPrescaler (XTtcPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function gets the input clock prescaler

    -

    Parameters:
    + +
    +

    This function gets the input clock prescaler

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    + 
    -
    Returns:
    	The value(n) from which the prescalar value is calculated
+ 
    Returns:
    	The value(n) from which the prescalar value is calculated
 		as 2^(n+1). Some example values are given below :
    
- 	Value		Prescaler
+
     	Value		Prescaler
  	0		2
  	1		4
  	N		2^(n+1)
  	15		65536
  	16		1
-

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XTtcPs_SetMatchValue ( XTtcPs *  InstancePtr, void XTtcPs_SetMatchValue (XTtcPs *  InstancePtr,
    u8  MatchIndex, u8  MatchIndex,
    u16  Valueu16  Value 
    ) )
    -
    - - - - - -
    -   - - -

    -This function is used to set the match registers. There are three match registers.

    -The match 0 register is special. If the waveform output mode is enabled, the waveform will change polarity when the count matches the value in the match 0 register. The polarity of the waveform output can also be set using the XTtcPs_SetOptions() function.

    -

    Parameters:
    + +
    +

    This function is used to set the match registers. There are three match registers.

    +

    The match 0 register is special. If the waveform output mode is enabled, the waveform will change polarity when the count matches the value in the match 0 register. The polarity of the waveform output can also be set using the XTtcPs_SetOptions() function.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    MatchIndex is the index to the match register to be set. Valid values are 0, 1, or 2.
    Value is the 16-bit value to be set in the match register.
    +
    -
    Returns:
    None
    -
    Note:
    None
    -
    -

    - - - - -
    - +
    Returns:
    None
    +
    Note:
    None
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XTtcPs_SetPrescaler ( XTtcPs *  InstancePtr, void XTtcPs_SetPrescaler (XTtcPs *  InstancePtr,
    u8  PrescalerValueu8  PrescalerValue 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the prescaler enable bit and if needed sets the prescaler bits in the control register.

    -

    Parameters:
    + +
    +

    This function sets the prescaler enable bit and if needed sets the prescaler bits in the control register.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    PrescalerValue is a number from 0-16 that sets the prescaler to use. If the parameter is 0 - 15, use a prescaler on the clock of 2^(PrescalerValue+1), or 2-65536. If the parameter is XTTCPS_CLK_CNTRL_PS_DISABLE, do not use a prescaler.
    +
    -
    Returns:
    None
    -
    Note:
    None
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None
    +
    Note:
    None
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8h.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8h.html new file mode 100755 index 00000000..1a9c6075 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps_8h.html @@ -0,0 +1,972 @@ + + + + + Xilinx Driver ttcps v2_0: xttcps.h File Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    xttcps.h File Reference

    #include "xttcps_hw.h"
    +#include "xstatus.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XTtcPs_Config
    struct  XTtcPs

    Defines

    #define XTTCPS_H
    #define InstReadReg(InstancePtr, RegOffset)   (Xil_In32(((InstancePtr)->Config.BaseAddress) + (RegOffset)))
    #define InstWriteReg(InstancePtr, RegOffset, Data)   (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (RegOffset), (Data)))
    #define XTtcPs_Start(InstancePtr)
    #define XTtcPs_Stop(InstancePtr)
    #define XTtcPs_IsStarted(InstancePtr)
    #define XTtcPs_GetCounterValue(InstancePtr)   (u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
    #define XTtcPs_SetInterval(InstancePtr, Value)   InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
    #define XTtcPs_GetInterval(InstancePtr)   (u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
    #define XTtcPs_ResetCounterValue(InstancePtr)
    #define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask)
    #define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask)
    #define XTtcPs_GetInterruptStatus(InstancePtr)   InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
    #define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask)
    Configuration options

    Options for the device. Each of the options is bit field, so more than one options can be specified.

    +

    #define XTTCPS_OPTION_EXTERNAL_CLK   0x0001
    #define XTTCPS_OPTION_CLK_EDGE_NEG   0x0002
    #define XTTCPS_OPTION_INTERVAL_MODE   0x0004
    #define XTTCPS_OPTION_DECREMENT   0x0008
    #define XTTCPS_OPTION_MATCH_MODE   0x0010
    #define XTTCPS_OPTION_WAVE_DISABLE   0x0020
    #define XTTCPS_OPTION_WAVE_POLARITY   0x0040

    Functions

    XTtcPs_Config * XTtcPs_LookupConfig (u16 DeviceId)
    int XTtcPs_CfgInitialize (XTtcPs *InstancePtr, XTtcPs_Config *ConfigPtr, u32 EffectiveAddr)
    void XTtcPs_SetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex, u16 Value)
    u16 XTtcPs_GetMatchValue (XTtcPs *InstancePtr, u8 MatchIndex)
    void XTtcPs_SetPrescaler (XTtcPs *InstancePtr, u8 PrescalerValue)
    u8 XTtcPs_GetPrescaler (XTtcPs *InstancePtr)
    void XTtcPs_CalcIntervalFromFreq (XTtcPs *InstancePtr, u32 Freq, u16 *Interval, u8 *Prescaler)
    int XTtcPs_SetOptions (XTtcPs *InstancePtr, u32 Options)
    u32 XTtcPs_GetOptions (XTtcPs *InstancePtr)
    int XTtcPs_SelfTest (XTtcPs *InstancePtr)
    +

    Detailed Description

    +

    Define Documentation

    + +
    +
    + + + + + + + + + + + + + + +
    #define InstReadReg(InstancePtr,
    RegOffset  )    (Xil_In32(((InstancePtr)->Config.BaseAddress) + (RegOffset)))
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + +
    #define InstWriteReg(InstancePtr,
    RegOffset,
    Data  )    (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (RegOffset), (Data)))
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTtcPs_ClearInterruptStatus(InstancePtr,
    InterruptMask  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
+                 (InterruptMask))
+

    This function clears the interrupt status.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    InterruptMask defines which interrupt should be cleared. Constants are defined in xttcps_hw.h as XTTCPS_IXR_*. This is a bit mask, all set bits will be cleared, cleared bits will not be cleared.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTtcPs_DisableInterrupts(InstancePtr,
    InterruptMask  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,  \
+                (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) &        \
+                 ~(InterruptMask)))
+

    This function disables the interrupts.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    InterruptMask defines which interrupt should be disabled. Constants are defined in xttcps_hw.h as XTTCPS_IXR_*. This is a bit mask, all set bits will be disabled, cleared bits will not be disabled.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTtcPs_EnableInterrupts(InstancePtr,
    InterruptMask  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,          \
+                (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) |        \
+                 (InterruptMask)))
+

    This function enables the interrupts.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    InterruptMask defines which interrupt should be enabled. Constants are defined in xttcps_hw.h as XTTCPS_IXR_*. This is a bit mask, all set bits will be enabled, cleared bits will not be disabled.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_GetCounterValue(InstancePtr  )    (u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
    +
    +
    +

    This function returns the current 16-bit counter value. It may be called at any time.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    16-bit counter value.
    +
    Note:
    C-style signature: u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_GetInterruptStatus(InstancePtr  )    InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
    +
    +
    +

    This function reads the interrupt status.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-style signature: u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_GetInterval(InstancePtr  )    (u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
    +
    +
    +

    This function gets the interval value from the interval register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    16-bit interval value
    +
    Note:
    C-style signature: u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_H
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_IsStarted(InstancePtr  ) 
    +
    +
    +Value:
    (int)((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
+       XTTCPS_CNT_CNTRL_DIS_MASK) == 0)
+

    This function checks whether the timer counter has already started.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance
    +
    +
    +
    Returns:
    Non-zero if the device has started, '0' otherwise.
    +
    Note:
    C-style signature: int XTtcPs_IsStarted(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_CLK_EDGE_NEG   0x0002
    +
    +
    +

    Clock on trailing edge for external clock

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_DECREMENT   0x0008
    +
    +
    +

    Decrement the counter

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_EXTERNAL_CLK   0x0001
    +
    +
    +

    External clock source

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_INTERVAL_MODE   0x0004
    +
    +
    +

    Interval mode

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_MATCH_MODE   0x0010
    +
    +
    +

    Match mode

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_WAVE_DISABLE   0x0020
    +
    +
    +

    No waveform output

    + +
    +
    + +
    +
    + + + + +
    #define XTTCPS_OPTION_WAVE_POLARITY   0x0040
    +
    +
    +

    Waveform polarity

    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_ResetCounterValue(InstancePtr  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,    \
+                (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
+                 XTTCPS_CNT_CNTRL_RST_MASK))
+

    This macro resets the count register. It may be called at any time. The counter is reset to either 0 or 0xFFFF, or the interval value, depending on the increment/decrement mode. The state of the counter, as started or stopped, is not affected by calling reset.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XTtcPs_SetInterval(InstancePtr,
    Value  )    InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
    +
    +
    +

    This function sets the interval value to be used in interval mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    Value is the 16-bit value to be set in the interval register.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTtcPs_SetInterval(XTtcPs *InstancePtr, u16 Value)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_Start(InstancePtr  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,    \
+                (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) &  \
+                 ~XTTCPS_CNT_CNTRL_DIS_MASK))
+

    This function starts the counter/timer without resetting the counter value.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTtcPs_Start(XTtcPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XTtcPs_Stop(InstancePtr  ) 
    +
    +
    +Value:
    InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,    \
+                (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) |  \
+                 XTTCPS_CNT_CNTRL_DIS_MASK))
+

    This function stops the counter/timer. This macro may be called at any time to stop the counter. The counter holds the last value until it is reset, restarted or enabled.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    None
    +
    Note:
    C-style signature: void XTtcPs_Stop(XTtcPs *InstancePtr)
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void XTtcPs_CalcIntervalFromFreq (XTtcPs *  InstancePtr,
    u32  Freq,
    u16 *  Interval,
    u8 *  Prescaler 
    )
    +
    +
    +

    This function calculates the interval value as well as the prescaler value for a given frequency.

    +
    Parameters:
    + + + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    Freq is the requested output frequency for the device.
    Interval is the interval value for the given frequency, it is the output value for this function.
    Prescaler is the prescaler value for the given frequency, it is the output value for this function.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    Upon successful calculation for the given frequency, Interval and Prescaler carry the settings for the timer counter; Upon unsuccessful calculation, Interval and Prescaler are set to 0xFF(FF) for their maximum values to signal the caller of failure. Therefore, caller needs to check the return interval or prescaler values for whether the function has succeeded.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XTtcPs_CfgInitialize (XTtcPs *  InstancePtr,
    XTtcPs_Config *  ConfigPtr,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initializes a specific XTtcPs instance such that the driver is ready to use. This function initializes a single timer counter in the triple timer counter function block.

    +

    The state of the device after initialization is:

    +
      +
    • Overflow Mode
      • +
    • Internal (pclk) selected
      • +
    • Counter disabled
      • +
    • All Interrupts disabled
      • +
    • Output waveforms disabled
      • +
    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    ConfigPtr is a reference to a structure containing information about a specific TTC device.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, then use ConfigPtr->BaseAddress for this parameter, passing the physical address instead.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if the initialization is successful.
      • +
    • XST_DEVICE_IS_STARTED if the device is started. It must be stopped to re-initialize.
      • +
    +
    Note:
    Device has to be stopped first to call this function to initialize it.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    u16 XTtcPs_GetMatchValue (XTtcPs *  InstancePtr,
    u8  MatchIndex 
    )
    +
    +
    +

    This function is used to get the value of the match registers. There are three match registers.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    MatchIndex is the index to the match register to be set. Valid values are 0, 1, or 2.
    +
    +
    +
    Returns:
    None
    +
    Note:
    None
    + +
    +
    + +
    +
    + + + + + + + + + +
    u32 XTtcPs_GetOptions (XTtcPs *  InstancePtr ) 
    +
    +
    +

    This function gets the settings for the options for the TTC device.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    +

    The return u32 contains the specified options that are set. This is a bit mask where a '1' means the option is on, and a'0' means the option is off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.

    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XTtcPs_GetPrescaler (XTtcPs *  InstancePtr ) 
    +
    +
    +

    This function gets the input clock prescaler

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    + 
    Returns:
    	The value(n) from which the prescalar value is calculated
+		as 2^(n+1). Some example values are given below :
    
+
     	Value		Prescaler
+	0		2
+	1		4
+	N		2^(n+1)
+	15		65536
+	16		1
+
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    XTtcPs_Config* XTtcPs_LookupConfig (u16  DeviceId ) 
    +
    +
    +

    Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    +
    Parameters:
    + + +
    DeviceId contains the unique ID of the device
    +
    +
    +
    Returns:
    +

    A pointer to the configuration found or NULL if the specified device ID was not found. See xttcps.h for the definition of XTtcPs_Config.

    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XTtcPs_SelfTest (XTtcPs *  InstancePtr ) 
    +
    +
    +

    Runs a self-test on the driver/device.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XTtcPs instance.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if successful
      • +
    • XST_FAILURE indicates a register did not read or write correctly
      • +
    +
    Note:
    This test fails if it is not called right after initialization.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XTtcPs_SetMatchValue (XTtcPs *  InstancePtr,
    u8  MatchIndex,
    u16  Value 
    )
    +
    +
    +

    This function is used to set the match registers. There are three match registers.

    +

    The match 0 register is special. If the waveform output mode is enabled, the waveform will change polarity when the count matches the value in the match 0 register. The polarity of the waveform output can also be set using the XTtcPs_SetOptions() function.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    MatchIndex is the index to the match register to be set. Valid values are 0, 1, or 2.
    Value is the 16-bit value to be set in the match register.
    +
    +
    +
    Returns:
    None
    +
    Note:
    None
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XTtcPs_SetOptions (XTtcPs *  InstancePtr,
    u32  Options 
    )
    +
    +
    +

    This function sets the options for the TTC device.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    Options contains the specified options to be set. This is a bit mask where a 1 means to turn the option on, and a 0 means to turn the option off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if options are successfully set.
      • +
    • XST_FAILURE if any of the options are unknown.
      • +
    +
    +
    Note:
    None
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XTtcPs_SetPrescaler (XTtcPs *  InstancePtr,
    u8  PrescalerValue 
    )
    +
    +
    +

    This function sets the prescaler enable bit and if needed sets the prescaler bits in the control register.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XTtcPs instance.
    PrescalerValue is a number from 0-16 that sets the prescaler to use. If the parameter is 0 - 15, use a prescaler on the clock of 2^(PrescalerValue+1), or 2-65536. If the parameter is XTTCPS_CLK_CNTRL_PS_DISABLE, do not use a prescaler.
    +
    +
    +
    Returns:
    None
    +
    Note:
    None
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__g_8c.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__g_8c.html index 1108676e..a8b880a9 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__g_8c.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__g_8c.html @@ -2,66 +2,64 @@ - xttcps_g.c File Reference + Xilinx Driver ttcps v2_0: xttcps_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps_g.c File Reference

    Detailed Description

    -This file contains a configuration table where each entry is the configuration information for one timer counter device in the system.

    + + +

    +
    +

    xttcps_g.c File Reference

    #include "xttcps.h"
    +#include "xparameters.h"
    + + + +

    Variables

    XTtcPs_Config XTtcPs_ConfigTable [XPAR_XTTCPS_NUM_INSTANCES]
    +

    Detailed Description

    +

    This file contains a configuration table where each entry is the configuration information for one timer counter device in the system.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date     Changes
  ----- ------ -------- -----------------------------------------------
  1.00a drg/jz 01/21/10 First release
  2.00  hk     22/01/14 Added check for picking instances other than
                        default.
-
    -

    -#include "xttcps.h"
    -#include "xparameters.h"
    - - - - - -

    Variables

    XTtcPs_Config XTtcPs_ConfigTable [XPAR_XTTCPS_NUM_INSTANCES]
    -

    Variable Documentation

    -

    - - - - -
    - +

    Variable Documentation

    + +
    +
    +
    - +
    XTtcPs_Config XTtcPs_ConfigTable[XPAR_XTTCPS_NUM_INSTANCES] XTtcPs_Config XTtcPs_ConfigTable[XPAR_XTTCPS_NUM_INSTANCES]
    -
    - - - - - -
    -   - + +
    +

    This table contains configuration information for each TTC device in the system.

    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -This table contains configuration information for each TTC device in the system.

    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__hw_8h.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__hw_8h.html index 2865e7bd..22708960 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__hw_8h.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__hw_8h.html @@ -2,1005 +2,678 @@ - xttcps_hw.h File Reference + Xilinx Driver ttcps v2_0: xttcps_hw.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps_hw.h File Reference

    Detailed Description

    -This file defines the hardware interface to one of the three timer counters in the Ps block.

    -

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
- ----- ------ -------- -------------------------------------------------
- 1.00a drg/jz 01/21/10 First release

    -
    -

    -#include "xil_types.h"
    -#include "xil_assert.h"
    -#include "xil_io.h"
    + + +

    +
    +

    xttcps_hw.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xil_io.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Register Map

    Register offsets from the base address of the device.

    #define XTTCPS_CLK_CNTRL_OFFSET   0x00000000
    #define XTTCPS_CNT_CNTRL_OFFSET   0x0000000C
    #define XTTCPS_COUNT_VALUE_OFFSET   0x00000018
    #define XTTCPS_INTERVAL_VAL_OFFSET   0x00000024
    #define XTTCPS_MATCH_0_OFFSET   0x00000030
    #define XTTCPS_MATCH_1_OFFSET   0x0000003C
    #define XTTCPS_MATCH_2_OFFSET   0x00000048
    #define XTTCPS_ISR_OFFSET   0x00000054
    #define XTTCPS_IER_OFFSET   0x00000060

    Clock Control Register

    Clock Control Register definitions

    #define XTTCPS_CLK_CNTRL_PS_EN_MASK   0x00000001
    #define XTTCPS_CLK_CNTRL_PS_VAL_MASK   0x0000001E
    #define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT   1
    #define XTTCPS_CLK_CNTRL_PS_DISABLE   16
    #define XTTCPS_CLK_CNTRL_SRC_MASK   0x00000020
    #define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK   0x00000040

    Counter Control Register

    Counter Control Register definitions

    #define XTTCPS_CNT_CNTRL_DIS_MASK   0x00000001
    #define XTTCPS_CNT_CNTRL_INT_MASK   0x00000002
    #define XTTCPS_CNT_CNTRL_DECR_MASK   0x00000004
    #define XTTCPS_CNT_CNTRL_MATCH_MASK   0x00000008
    #define XTTCPS_CNT_CNTRL_RST_MASK   0x00000010
    #define XTTCPS_CNT_CNTRL_EN_WAVE_MASK   0x00000020
    #define XTTCPS_CNT_CNTRL_POL_WAVE_MASK   0x00000040
    #define XTTCPS_CNT_CNTRL_RESET_VALUE   0x00000021

    Current Counter Value Register

    Current Counter Value Register definitions

    #define XTTCPS_COUNT_VALUE_MASK   0x0000FFFF

    Interval Value Register

    Interval Value Register is the maximum value the counter will count up or down to.

    #define XTTCPS_INTERVAL_VAL_MASK   0x0000FFFF

    Match Registers

    Definitions for Match registers, each timer counter has three match registers.

    #define XTTCPS_MATCH_MASK   0x0000FFFF
    #define XTTCPS_NUM_MATCH_REG   3

    Interrupt Registers

    Following register bit mask is for all interrupt registers.

    #define XTTCPS_IXR_INTERVAL_MASK   0x00000001
    #define XTTCPS_IXR_MATCH_0_MASK   0x00000002
    #define XTTCPS_IXR_MATCH_1_MASK   0x00000004
    #define XTTCPS_IXR_MATCH_2_MASK   0x00000008
    #define XTTCPS_IXR_CNT_OVR_MASK   0x00000010
    #define XTTCPS_IXR_ALL_MASK   0x0000001F

    Defines

    #define XTtcPs_ReadReg(BaseAddress, RegOffset)   (Xil_In32((BaseAddress) + (RegOffset)))
    #define XTtcPs_WriteReg(BaseAddress, RegOffset, Data)   (Xil_Out32((BaseAddress) + (RegOffset), (Data)))
    #define XTtcPs_Match_N_Offset(MatchIndex)   (XTTCPS_MATCH_0_OFFSET + (12 * (MatchIndex)))

    Defines

    #define XTTCPS_HW_H
    #define XTtcPs_ReadReg(BaseAddress, RegOffset)   (Xil_In32((BaseAddress) + (RegOffset)))
    #define XTtcPs_WriteReg(BaseAddress, RegOffset, Data)   (Xil_Out32((BaseAddress) + (RegOffset), (Data)))
    #define XTtcPs_Match_N_Offset(MatchIndex)   (XTTCPS_MATCH_0_OFFSET + (12 * (MatchIndex)))
    Register Map

    Register offsets from the base address of the device.

    +

    #define XTTCPS_CLK_CNTRL_OFFSET   0x00000000
    #define XTTCPS_CNT_CNTRL_OFFSET   0x0000000C
    #define XTTCPS_COUNT_VALUE_OFFSET   0x00000018
    #define XTTCPS_INTERVAL_VAL_OFFSET   0x00000024
    #define XTTCPS_MATCH_0_OFFSET   0x00000030
    #define XTTCPS_MATCH_1_OFFSET   0x0000003C
    #define XTTCPS_MATCH_2_OFFSET   0x00000048
    #define XTTCPS_ISR_OFFSET   0x00000054
    #define XTTCPS_IER_OFFSET   0x00000060
    Clock Control Register

    Clock Control Register definitions

    +

    #define XTTCPS_CLK_CNTRL_PS_EN_MASK   0x00000001
    #define XTTCPS_CLK_CNTRL_PS_VAL_MASK   0x0000001E
    #define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT   1
    #define XTTCPS_CLK_CNTRL_PS_DISABLE   16
    #define XTTCPS_CLK_CNTRL_SRC_MASK   0x00000020
    #define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK   0x00000040
    Counter Control Register

    Counter Control Register definitions

    +

    #define XTTCPS_CNT_CNTRL_DIS_MASK   0x00000001
    #define XTTCPS_CNT_CNTRL_INT_MASK   0x00000002
    #define XTTCPS_CNT_CNTRL_DECR_MASK   0x00000004
    #define XTTCPS_CNT_CNTRL_MATCH_MASK   0x00000008
    #define XTTCPS_CNT_CNTRL_RST_MASK   0x00000010
    #define XTTCPS_CNT_CNTRL_EN_WAVE_MASK   0x00000020
    #define XTTCPS_CNT_CNTRL_POL_WAVE_MASK   0x00000040
    #define XTTCPS_CNT_CNTRL_RESET_VALUE   0x00000021
    Current Counter Value Register

    Current Counter Value Register definitions

    +

    #define XTTCPS_COUNT_VALUE_MASK   0x0000FFFF
    Interval Value Register

    Interval Value Register is the maximum value the counter will count up or down to.

    +

    #define XTTCPS_INTERVAL_VAL_MASK   0x0000FFFF
    Match Registers

    Definitions for Match registers, each timer counter has three match registers.

    +

    #define XTTCPS_MATCH_MASK   0x0000FFFF
    #define XTTCPS_NUM_MATCH_REG   3
    Interrupt Registers

    Following register bit mask is for all interrupt registers.

    +

    #define XTTCPS_IXR_INTERVAL_MASK   0x00000001
    #define XTTCPS_IXR_MATCH_0_MASK   0x00000002
    #define XTTCPS_IXR_MATCH_1_MASK   0x00000004
    #define XTTCPS_IXR_MATCH_2_MASK   0x00000008
    #define XTTCPS_IXR_CNT_OVR_MASK   0x00000010
    #define XTTCPS_IXR_ALL_MASK   0x0000001F
    -

    Define Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This file defines the hardware interface to one of the three timer counters in the Ps block.

    +
    + MODIFICATION HISTORY:
     Ver   Who    Date     Changes
+ ----- ------ -------- -------------------------------------------------
+ 1.00a drg/jz 01/21/10 First release

    Define Documentation

    + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK   0x00000040 #define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK   0x00000040
    -
    - - - - - -
    -   - + +
    +

    External Clock edge

    -

    -External Clock edge

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_OFFSET   0x00000000 #define XTTCPS_CLK_CNTRL_OFFSET   0x00000000
    -
    - - - - - -
    -   - + +
    +

    Clock Control Register

    -

    -Clock Control Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_PS_DISABLE   16 #define XTTCPS_CLK_CNTRL_PS_DISABLE   16
    -
    - - - - - -
    -   - + +
    +

    Prescale disable

    -

    -Prescale disable

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_PS_EN_MASK   0x00000001 #define XTTCPS_CLK_CNTRL_PS_EN_MASK   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Prescale enable

    -

    -Prescale enable

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_PS_VAL_MASK   0x0000001E #define XTTCPS_CLK_CNTRL_PS_VAL_MASK   0x0000001E
    -
    - - - - - -
    -   - + +
    +

    Prescale value

    -

    -Prescale value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT   1 #define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT   1
    -
    - - - - - -
    -   - + +
    +

    Prescale shift

    -

    -Prescale shift

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CLK_CNTRL_SRC_MASK   0x00000020 #define XTTCPS_CLK_CNTRL_SRC_MASK   0x00000020
    -
    - - - - - -
    -   - + +
    +

    Clock source

    -

    -Clock source

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_DECR_MASK   0x00000004 #define XTTCPS_CNT_CNTRL_DECR_MASK   0x00000004
    -
    - - - - - -
    -   - + +
    +

    Decrement mode

    -

    -Decrement mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_DIS_MASK   0x00000001 #define XTTCPS_CNT_CNTRL_DIS_MASK   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Disable the counter

    -

    -Disable the counter

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_EN_WAVE_MASK   0x00000020 #define XTTCPS_CNT_CNTRL_EN_WAVE_MASK   0x00000020
    -
    - - - - - -
    -   - + +
    +

    Enable waveform

    -

    -Enable waveform

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_INT_MASK   0x00000002 #define XTTCPS_CNT_CNTRL_INT_MASK   0x00000002
    -
    - - - - - -
    -   - + +
    +

    Interval mode

    -

    -Interval mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_MATCH_MASK   0x00000008 #define XTTCPS_CNT_CNTRL_MATCH_MASK   0x00000008
    -
    - - - - - -
    -   - + +
    +

    Match mode

    -

    -Match mode

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_OFFSET   0x0000000C #define XTTCPS_CNT_CNTRL_OFFSET   0x0000000C
    -
    - - - - - -
    -   - + +
    +

    Counter Control Register

    -

    -Counter Control Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_POL_WAVE_MASK   0x00000040 #define XTTCPS_CNT_CNTRL_POL_WAVE_MASK   0x00000040
    -
    - - - - - -
    -   - + +
    +

    Waveform polarity

    -

    -Waveform polarity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_RESET_VALUE   0x00000021 #define XTTCPS_CNT_CNTRL_RESET_VALUE   0x00000021
    -
    - - - - - -
    -   - + +
    +

    Reset value

    -

    -Reset value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_CNT_CNTRL_RST_MASK   0x00000010 #define XTTCPS_CNT_CNTRL_RST_MASK   0x00000010
    -
    - - - - - -
    -   - + +
    +

    Reset counter

    -

    -Reset counter

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_COUNT_VALUE_MASK   0x0000FFFF #define XTTCPS_COUNT_VALUE_MASK   0x0000FFFF
    -
    - - - - - -
    -   - + +
    +

    16-bit counter value

    -

    -16-bit counter value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_COUNT_VALUE_OFFSET   0x00000018 #define XTTCPS_COUNT_VALUE_OFFSET   0x00000018
    -
    - - - - - -
    -   - + +
    +

    Current Counter Value

    -

    -Current Counter Value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IER_OFFSET   0x00000060 #define XTTCPS_HW_H
    -
    - - - - - -
    -   - + +
    -

    -Interrupt Enable Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_INTERVAL_VAL_MASK   0x0000FFFF #define XTTCPS_IER_OFFSET   0x00000060
    -
    - - - - - -
    -   - + +
    +

    Interrupt Enable Register

    -

    -16-bit Interval value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_INTERVAL_VAL_OFFSET   0x00000024 #define XTTCPS_INTERVAL_VAL_MASK   0x0000FFFF
    -
    - - - - - -
    -   - + +
    +

    16-bit Interval value

    -

    -Interval Count Value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_ISR_OFFSET   0x00000054 #define XTTCPS_INTERVAL_VAL_OFFSET   0x00000024
    -
    - - - - - -
    -   - + +
    +

    Interval Count Value

    -

    -Interrupt Status Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_ALL_MASK   0x0000001F #define XTTCPS_ISR_OFFSET   0x00000054
    -
    - - - - - -
    -   - + +
    +

    Interrupt Status Register

    -

    -All valid Interrupts

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_CNT_OVR_MASK   0x00000010 #define XTTCPS_IXR_ALL_MASK   0x0000001F
    -
    - - - - - -
    -   - + +
    +

    All valid Interrupts

    -

    -Counter Overflow

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_INTERVAL_MASK   0x00000001 #define XTTCPS_IXR_CNT_OVR_MASK   0x00000010
    -
    - - - - - -
    -   - + +
    +

    Counter Overflow

    -

    -Interval Interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_MATCH_0_MASK   0x00000002 #define XTTCPS_IXR_INTERVAL_MASK   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Interval Interrupt

    -

    -Match 1 Interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_MATCH_1_MASK   0x00000004 #define XTTCPS_IXR_MATCH_0_MASK   0x00000002
    -
    - - - - - -
    -   - + +
    +

    Match 1 Interrupt

    -

    -Match 2 Interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_IXR_MATCH_2_MASK   0x00000008 #define XTTCPS_IXR_MATCH_1_MASK   0x00000004
    -
    - - - - - -
    -   - + +
    +

    Match 2 Interrupt

    -

    -Match 3 Interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_MATCH_0_OFFSET   0x00000030 #define XTTCPS_IXR_MATCH_2_MASK   0x00000008
    -
    - - - - - -
    -   - + +
    +

    Match 3 Interrupt

    -

    -Match 1 value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_MATCH_1_OFFSET   0x0000003C #define XTTCPS_MATCH_0_OFFSET   0x00000030
    -
    - - - - - -
    -   - + +
    +

    Match 1 value

    -

    -Match 2 value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_MATCH_2_OFFSET   0x00000048 #define XTTCPS_MATCH_1_OFFSET   0x0000003C
    -
    - - - - - -
    -   - + +
    +

    Match 2 value

    -

    -Match 3 value

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XTTCPS_MATCH_MASK   0x0000FFFF #define XTTCPS_MATCH_2_OFFSET   0x00000048
    -
    - - - - - -
    -   - + +
    +

    Match 3 value

    -

    -16-bit Match value

    -

    - - - - -
    - + + + +
    +
    +
    - - - - - - +
    #define XTtcPs_Match_N_Offset ( MatchIndex   )    (XTTCPS_MATCH_0_OFFSET + (12 * (MatchIndex)))#define XTTCPS_MATCH_MASK   0x0000FFFF
    -
    - - - - - -
    -   - + +
    +

    16-bit Match value

    -

    -Calculate a match register offset using the Match Register index.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + +
    #define XTtcPs_Match_N_Offset(MatchIndex  )    (XTTCPS_MATCH_0_OFFSET + (12 * (MatchIndex)))
    +
    +
    +

    Calculate a match register offset using the Match Register index.

    +
    Parameters:
    MatchIndex is the 0-2 value of the match register
    +
    -
    Returns:
    MATCH_N_OFFSET.
    -
    Note:
    C-style signature: u32 XTtcPs_Match_N_Offset(u8 MatchIndex)
    -
    -

    - - - - -
    - +
    Returns:
    MATCH_N_OFFSET.
    +
    Note:
    C-style signature: u32 XTtcPs_Match_N_Offset(u8 MatchIndex)
    + + + + +
    +
    +
    - +
    #define XTTCPS_NUM_MATCH_REG   3 #define XTTCPS_NUM_MATCH_REG   3
    -
    - - - - - -
    -   - + +
    +

    Num of Match reg

    -

    -Num of Match reg

    -

    - - - - -
    - + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XTtcPs_ReadReg ( BaseAddress,
    RegOffset   )    (Xil_In32((BaseAddress) + (RegOffset)))#define XTtcPs_ReadReg(BaseAddress,
    RegOffset  )    (Xil_In32((BaseAddress) + (RegOffset)))
    -
    - - - - - -
    -   - - -

    -Read the given Timer Counter register.

    -

    Parameters:
    + +
    +

    Read the given Timer Counter register.

    +
    Parameters:
    BaseAddress is the base address of the timer counter device.
    RegOffset is the register offset to be read
    +
    -
    Returns:
    The 32-bit value of the register
    -
    Note:
    C-style signature: u32 XTtcPs_ReadReg(u32 BaseAddress, u32 RegOffset)
    -
    -

    - - - - -
    - +
    Returns:
    The 32-bit value of the register
    +
    Note:
    C-style signature: u32 XTtcPs_ReadReg(u32 BaseAddress, u32 RegOffset)
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XTtcPs_WriteReg ( BaseAddress,
    RegOffset,
    Data   )    (Xil_Out32((BaseAddress) + (RegOffset), (Data)))#define XTtcPs_WriteReg(BaseAddress,
    RegOffset,
    Data  )    (Xil_Out32((BaseAddress) + (RegOffset), (Data)))
    -
    - - - - - -
    -   - - -

    -Write the given Timer Counter register.

    -

    Parameters:
    + +
    +

    Write the given Timer Counter register.

    +
    Parameters:
    BaseAddress is the base address of the timer counter device.
    RegOffset is the register offset to be written
    Data is the 32-bit value to write to the register
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XTtcPs_WriteReg(XTtcPs BaseAddress, u32 RegOffset, u32 Data)
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    C-style signature: void XTtcPs_WriteReg(XTtcPs BaseAddress, u32 RegOffset, u32 Data)
    + +
    +
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__options_8c.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__options_8c.html index 3085b4cd..05c21c6e 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__options_8c.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__options_8c.html @@ -2,129 +2,138 @@ - xttcps_options.c File Reference + Xilinx Driver ttcps v2_0: xttcps_options.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps_options.c File Reference

    Detailed Description

    -This file contains functions to get or set option features for the device.

    + + +

    +
    +

    xttcps_options.c File Reference

    #include "xttcps.h"
    + + + + + + + + +

    Classes

    struct  OptionsMap

    Defines

    #define XTTCPS_NUM_TMRCTR_OPTIONS

    Functions

    int XTtcPs_SetOptions (XTtcPs *InstancePtr, u32 Options)
    u32 XTtcPs_GetOptions (XTtcPs *InstancePtr)
    +

    Detailed Description

    +

    This file contains functions to get or set option features for the device.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date     Changes
  ----- ------ -------- ---------------------------------------------
  1.00a drg/jz 01/21/10 First release
  1.01a nm     03/05/2012 Removed break statement after return to remove
                          compilation warnings.
-
    -

    -#include "xttcps.h"
    - - - - - - - -

    Functions

    int XTtcPs_SetOptions (XTtcPs *InstancePtr, u32 Options)
    u32 XTtcPs_GetOptions (XTtcPs *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - +
    u32 XTtcPs_GetOptions ( XTtcPs *  InstancePtr  ) #define XTTCPS_NUM_TMRCTR_OPTIONS
    -
    - - - - - -
    -   - - -

    -This function gets the settings for the options for the TTC device.

    -

    Parameters:
    + +
    +Value:
    (sizeof(TmrCtrOptionsTable) / \
+                                sizeof(OptionsMap))
+
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    u32 XTtcPs_GetOptions (XTtcPs *  InstancePtr ) 
    +
    +
    +

    This function gets the settings for the options for the TTC device.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    +
    -
    Returns:
    -The return u32 contains the specified options that are set. This is a bit mask where a '1' means the option is on, and a'0' means the option is off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    +

    The return u32 contains the specified options that are set. This is a bit mask where a '1' means the option is on, and a'0' means the option is off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.

    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XTtcPs_SetOptions ( XTtcPs *  InstancePtr, int XTtcPs_SetOptions (XTtcPs *  InstancePtr,
    u32  Optionsu32  Options 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the options for the TTC device.

    -

    Parameters:
    + +
    +

    This function sets the options for the TTC device.

    +
    Parameters:
    - +
    InstancePtr is a pointer to the XTtcPs instance.
    Options contains the specified options to be set. This is a bit mask where a 1 means to turn the option on, and a 0 means to turn the option off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.
    Options contains the specified options to be set. This is a bit mask where a 1 means to turn the option on, and a 0 means to turn the option off. One or more bit values may be contained in the mask. See the bit definitions named XTTCPS_*_OPTION in the file xttcps.h.
    +
    -
    Returns:
      -
    • XST_SUCCESS if options are successfully set.
    • XST_FAILURE if any of the options are unknown.
    +
    Returns:
      +
    • XST_SUCCESS if options are successfully set.
      • +
    • XST_FAILURE if any of the options are unknown.
      • +
    -
    Note:
    None
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Note:
    None
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__selftest_8c.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__selftest_8c.html index b393996d..69e9de31 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__selftest_8c.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__selftest_8c.html @@ -2,79 +2,77 @@ - xttcps_selftest.c File Reference + Xilinx Driver ttcps v2_0: xttcps_selftest.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps_selftest.c File Reference

    Detailed Description

    -This file contains the implementation of self test function for the XTtcPs driver.

    + + +

    +
    +

    xttcps_selftest.c File Reference

    #include "xttcps.h"
    + + + +

    Functions

    int XTtcPs_SelfTest (XTtcPs *InstancePtr)
    +

    Detailed Description

    +

    This file contains the implementation of self test function for the XTtcPs driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date     Changes
  ----- ------ -------- ---------------------------------------------
  1.00a drg/jz 01/21/10 First release
-
    -

    -#include "xttcps.h"
    - - - - - -

    Functions

    int XTtcPs_SelfTest (XTtcPs *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    int XTtcPs_SelfTest ( XTtcPs *  InstancePtr  ) int XTtcPs_SelfTest (XTtcPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -Runs a self-test on the driver/device.

    -

    Parameters:
    + +
    +

    Runs a self-test on the driver/device.

    +
    Parameters:
    InstancePtr is a pointer to the XTtcPs instance.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if successful
    • XST_FAILURE indicates a register did not read or write correctly
    -

    -

    Note:
    This test fails if it is not called right after initialization.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

  • XST_SUCCESS if successful
    • +
  • XST_FAILURE indicates a register did not read or write correctly
    • + +
    Note:
    This test fails if it is not called right after initialization.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__sinit_8c.html b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__sinit_8c.html index d5d4d02f..41809c8b 100755 --- a/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/ttcps/doc/html/api/xttcps__sinit_8c.html @@ -2,105 +2,93 @@ - xttcps_sinit.c File Reference + Xilinx Driver ttcps v2_0: xttcps_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xttcps_sinit.c File Reference

    Detailed Description

    -The implementation of the XTtcPs driver's static initialization functionality.

    + + +

    +
    +

    xttcps_sinit.c File Reference

    #include "xparameters.h"
    +#include "xttcps.h"
    + + + + + +

    Functions

    XTtcPs_Config * XTtcPs_LookupConfig (u16 DeviceId)

    Variables

    XTtcPs_Config XTtcPs_ConfigTable []
    +

    Detailed Description

    +

    The implementation of the XTtcPs driver's static initialization functionality.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date     Changes
  ----- ------ -------- ---------------------------------------------
  1.00a drg/jz 01/21/10 First release
-
    -

    -#include "xparameters.h"
    -#include "xttcps.h"
    - - - - - - - - -

    Functions

    XTtcPs_Config * XTtcPs_LookupConfig (u16 DeviceId)

    Variables

    XTtcPs_Config XTtcPs_ConfigTable []
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    XTtcPs_Config* XTtcPs_LookupConfig ( u16  DeviceId  ) XTtcPs_Config* XTtcPs_LookupConfig (u16  DeviceId ) 
    -
    - - - - - -
    -   - - -

    -Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    -

    Parameters:
    + +
    +

    Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    +
    Parameters:
    DeviceId contains the unique ID of the device
    +
    -
    Returns:
    -A pointer to the configuration found or NULL if the specified device ID was not found. See xttcps.h for the definition of XTtcPs_Config.

    -

    Note:
    None.
    -
    -

    Variable Documentation

    -

    - - - - -
    - +
    Returns:
    +

    A pointer to the configuration found or NULL if the specified device ID was not found. See xttcps.h for the definition of XTtcPs_Config.

    +
    Note:
    None.
    + + + +

    Variable Documentation

    + +
    +
    +
    - +
    XTtcPs_Config XTtcPs_ConfigTable[] XTtcPs_Config XTtcPs_ConfigTable[]
    -
    - - - - - -
    -   - + +
    +

    This table contains configuration information for each TTC device in the system.

    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -This table contains configuration information for each TTC device in the system.

    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/annotated.html index 52becb39..dd8856b7 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/annotated.html @@ -2,29 +2,40 @@ - Class List + Xilinx Driver uartlite v3_0: Class List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    + + + +

    Class List

    Here are the classes, structs, unions and interfaces with brief descriptions:
    XUartLite
    XUartLite_Buffer
    XUartLite_Config
    XUartLite_Stats
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/classes.html new file mode 100755 index 00000000..a86151bb --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/classes.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver uartlite v3_0: Alphabetical List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Class Index

    X
    + +
      X  
    +    		XUartLite   XUartLite_Buffer   XUartLite_Config   XUartLite_Stats   
    X
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/files.html index 3cb8c93c..31262106 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/files.html @@ -2,27 +2,34 @@ - File Index + Xilinx Driver uartlite v3_0: File Index - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    File List

    Here is a list of all documented files with brief descriptions: + + + +
    +

    File List

    Here is a list of all files with brief descriptions:
    + @@ -32,4 +39,9 @@
    xuartlite.c
    xuartlite.h
    xuartlite_g.c
    xuartlite_i.h
    xuartlite_intr.c
    xuartlite_sinit.c
    xuartlite_stats.c
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions.html index 84434c75..18349c05 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions.html @@ -2,46 +2,117 @@ - Class Members + Xilinx Driver uartlite v3_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -Here is a list of all documented class members with links to the class documentation for each member: -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions_vars.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions_vars.html index 4ef6906a..cec1e34a 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions_vars.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/functions_vars.html @@ -2,46 +2,117 @@ - Class Members - Variables + Xilinx Driver uartlite v3_0: Class Members - Variables - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals.html index 9b552190..88335aee 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals.html @@ -2,63 +2,251 @@ - Class Members + Xilinx Driver uartlite v3_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -Here is a list of all documented file members with links to the documentation: -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_defs.html index 08e490fe..bc9a3f41 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_defs.html @@ -2,44 +2,160 @@ - Class Members + Xilinx Driver uartlite v3_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + +
      -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_func.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_func.html index c7798ad3..f71455ba 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_func.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_func.html @@ -2,53 +2,128 @@ - Class Members + Xilinx Driver uartlite v3_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + +
      -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_type.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_type.html new file mode 100755 index 00000000..f224e96c --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_type.html @@ -0,0 +1,52 @@ + + + + + Xilinx Driver uartlite v3_0: Class Members + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +  +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_vars.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_vars.html index dc816ba4..b2a960f0 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_vars.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/globals_vars.html @@ -2,36 +2,49 @@ - Class Members + Xilinx Driver uartlite v3_0: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/index.html index b6fa2b8a..63be6897 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/index.html @@ -2,44 +2,46 @@ - uartlite v3_0 + Xilinx Driver uartlite v3_0: uartlite v3_0 - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -

    uartlite v3_0

    -

    -This component contains the implementation of the XUartLite component which is the driver for the Xilinx UART Lite device. This UART is a minimal hardware implementation with minimal features. Most of the features, including baud rate, parity, and number of data bits are only configurable when the hardware device is built, rather than at run time by software.

    -The device has 16 byte transmit and receive FIFOs and supports interrupts. The device does not have any way to disable the receiver such that the receive FIFO may contain unwanted data. The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    -The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated when the transmit FIFO transitions from having data to being empty or when any data is contained in the receive FIFO.

    -In order to use interrupts, it's necessary for the user to connect the driver interrupt handler, XUartLite_InterruptHandler, to the interrupt system of the application. This function does not save and restore the processor context such that the user must provide it. Send and receive handlers may be set for the driver such that the handlers are called when transmit and receive interrupts occur. The handlers are called from interrupt context and are designed to allow application specific processing to be performed.

    -The functions, XUartLite_Send and XUartLite_Recv, are provided in the driver to allow data to be sent and received. They are designed to be used in polled or interrupt modes.

    -The driver provides a status for each received byte indicating any parity frame or overrun error. The driver provides statistics which allow visibility into these errors.

    -Initialization & Configuration

    -The XUartLite_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    -To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in one of the following ways:

    + + +

    +
    +

    uartlite v3_0

    This component contains the implementation of the XUartLite component which is the driver for the Xilinx UART Lite device. This UART is a minimal hardware implementation with minimal features. Most of the features, including baud rate, parity, and number of data bits are only configurable when the hardware device is built, rather than at run time by software.

    +

    The device has 16 byte transmit and receive FIFOs and supports interrupts. The device does not have any way to disable the receiver such that the receive FIFO may contain unwanted data. The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    +

    The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated when the transmit FIFO transitions from having data to being empty or when any data is contained in the receive FIFO.

    +

    In order to use interrupts, it's necessary for the user to connect the driver interrupt handler, XUartLite_InterruptHandler, to the interrupt system of the application. This function does not save and restore the processor context such that the user must provide it. Send and receive handlers may be set for the driver such that the handlers are called when transmit and receive interrupts occur. The handlers are called from interrupt context and are designed to allow application specific processing to be performed.

    +

    The functions, XUartLite_Send and XUartLite_Recv, are provided in the driver to allow data to be sent and received. They are designed to be used in polled or interrupt modes.

    +

    The driver provides a status for each received byte indicating any parity frame or overrun error. The driver provides statistics which allow visibility into these errors.

    +

    Initialization & Configuration

    +

    The XUartLite_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    +

    To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in one of the following ways:

      -
    • XUartLite_Initialize(InstancePtr, DeviceId) - The driver looks up its own configuration structure created by the tool-chain based on an ID provided by the tool-chain.
    -

    +

  • XUartLite_Initialize(InstancePtr, DeviceId) - The driver looks up its own configuration structure created by the tool-chain based on an ID provided by the tool-chain.
    • +
      -
    • XUartLite_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the provided virtual memory base address replaces the physical address present in the configuration structure.
    -

    -RTOS Independence

    -This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.

    -

    Note:
    -The driver is partitioned such that a minimal implementation may be used. More features require additional files to be linked in.

    +

  • XUartLite_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the provided virtual memory base address replaces the physical address present in the configuration structure.
    • + +

    RTOS Independence

    +

    This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.

    +
    Note:
    +

    The driver is partitioned such that a minimal implementation may be used. More features require additional files to be linked in.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
@@ -68,5 +70,9 @@ The driver is partitioned such that a minimal implementation may be used. More f
 		      Transmit/Receive FIFOs which cannot be changed.
  3.0 adk 17/12/13  Fixed CR:741186,761863 Changes are made in the file 
 		      xuartlite_selftest.c      
- 3.0 adk 19/12/13  Update the driver as per new TCL API's

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 3.0 adk 19/12/13 Update the driver as per new TCL API's
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite-members.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite-members.html index 28400558..223bd46f 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite-members.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite-members.html @@ -2,24 +2,44 @@ - Member List + Xilinx Driver uartlite v3_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite Member List

    This is the complete list of members for XUartLite, including all inherited members.

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartLite Member List

    This is the complete list of members for XUartLite, including all inherited members. + + + + + + + + + +
    IsReadyXUartLite
    ReceiveBufferXUartLite
    RecvCallBackRefXUartLite
    RecvHandlerXUartLite
    RegBaseAddressXUartLite
    SendBufferXUartLite
    SendCallBackRefXUartLite
    SendHandlerXUartLite
    StatsXUartLite
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite.html index 7abe0724..59e59acc 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite.html @@ -2,33 +2,173 @@ - XUartLite Struct Reference + Xilinx Driver uartlite v3_0: XUartLite Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite Struct Reference

    #include <xuartlite.h> -

    -List of all members.

    Detailed Description

    -The XUartLite driver instance data. The user is required to allocate a variable of this type for every UART Lite device in the system. A pointer to a variable of this type is then passed to the driver API functions. -

    + + +

    +
    +

    XUartLite Struct Reference

    +

    #include <xuartlite.h>

    + +

    List of all members.

    - + + + + + + + + + +

    Public Attributes

    XUartLite_Stats Stats
    u32 RegBaseAddress
    u32 IsReady
    XUartLite_Buffer SendBuffer
    XUartLite_Buffer ReceiveBuffer
    XUartLite_Handler RecvHandler
    void * RecvCallBackRef
    XUartLite_Handler SendHandler
    void * SendCallBackRef
    -
    The documentation for this struct was generated from the following file:
      -
    • xuartlite.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Detailed Description

    +

    The XUartLite driver instance data. The user is required to allocate a variable of this type for every UART Lite device in the system. A pointer to a variable of this type is then passed to the driver API functions.

    +

    Member Data Documentation

    + +
    +
    + + + + +
    u32 XUartLite::IsReady
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartLite_Buffer XUartLite::ReceiveBuffer
    +
    +
    + +
    +
    + +
    +
    + + + + +
    void* XUartLite::RecvCallBackRef
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartLite_Handler XUartLite::RecvHandler
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u32 XUartLite::RegBaseAddress
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartLite_Buffer XUartLite::SendBuffer
    +
    +
    + +
    +
    + +
    +
    + + + + +
    void* XUartLite::SendCallBackRef
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartLite_Handler XUartLite::SendHandler
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartLite_Stats XUartLite::Stats
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer-members.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer-members.html index e8438f5a..6371a728 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer-members.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer-members.html @@ -2,24 +2,38 @@ - Member List + Xilinx Driver uartlite v3_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Buffer Member List

    This is the complete list of members for XUartLite_Buffer, including all inherited members.

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartLite_Buffer Member List

    This is the complete list of members for XUartLite_Buffer, including all inherited members. + + + +
    NextBytePtrXUartLite_Buffer
    RemainingBytesXUartLite_Buffer
    RequestedBytesXUartLite_Buffer
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer.html index ec8978e9..10302ba5 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___buffer.html @@ -2,33 +2,89 @@ - XUartLite_Buffer Struct Reference + Xilinx Driver uartlite v3_0: XUartLite_Buffer Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Buffer Struct Reference

    #include <xuartlite.h> -

    -List of all members.

    Detailed Description

    -The following data type is used to manage the buffers that are handled when sending and receiving data in the interrupt mode. It is intended for internal use only. -

    + + +

    +
    +

    XUartLite_Buffer Struct Reference

    +

    #include <xuartlite.h>

    + +

    List of all members.

    - + + + +

    Public Attributes

    u8 * NextBytePtr
    unsigned int RequestedBytes
    unsigned int RemainingBytes
    -
    The documentation for this struct was generated from the following file:
      -
    • xuartlite.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Detailed Description

    +

    The following data type is used to manage the buffers that are handled when sending and receiving data in the interrupt mode. It is intended for internal use only.

    +

    Member Data Documentation

    + +
    +
    + + + + +
    u8* XUartLite_Buffer::NextBytePtr
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartLite_Buffer::RemainingBytes
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartLite_Buffer::RequestedBytes
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config-members.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config-members.html index 7dc1089c..5ef3ef45 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config-members.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config-members.html @@ -2,30 +2,41 @@ - Member List + Xilinx Driver uartlite v3_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Config Member List

    This is the complete list of members for XUartLite_Config, including all inherited members.

    - - - - - - -
    BaudRateXUartLite_Config
    DataBitsXUartLite_Config
    DeviceIdXUartLite_Config
    ParityOddXUartLite_Config
    RegBaseAddrXUartLite_Config
    UseParityXUartLite_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartLite_Config Member List

    This is the complete list of members for XUartLite_Config, including all inherited members. + + + + + + +
    BaudRateXUartLite_Config
    DataBitsXUartLite_Config
    DeviceIdXUartLite_Config
    ParityOddXUartLite_Config
    RegBaseAddrXUartLite_Config
    UseParityXUartLite_Config
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config.html index bfa9daad..eda7c1c4 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___config.html @@ -2,185 +2,138 @@ - XUartLite_Config Struct Reference + Xilinx Driver uartlite v3_0: XUartLite_Config Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Config Struct Reference

    #include <xuartlite.h> -

    -List of all members.

    Detailed Description

    -This typedef contains configuration information for the device. -

    + + +

    +
    +

    XUartLite_Config Struct Reference

    +

    #include <xuartlite.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - + + + + + + +

    Public Attributes

    u16 DeviceId
    u32 RegBaseAddr
    u32 BaudRate
    u8 UseParity
    u8 ParityOdd
    u8 DataBits

    Public Attributes

    u16 DeviceId
    u32 RegBaseAddr
    u32 BaudRate
    u8 UseParity
    u8 ParityOdd
    u8 DataBits
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This typedef contains configuration information for the device.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartLite_Config::BaudRate u32 XUartLite_Config::BaudRate
    -
    - - - - - -
    -   - + +
    +

    Fixed baud rate

    -

    -Fixed baud rate

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartLite_Config::DataBits u8 XUartLite_Config::DataBits
    -
    - - - - - -
    -   - + +
    +

    Fixed data bits

    -

    -Fixed data bits

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartLite_Config::DeviceId u16 XUartLite_Config::DeviceId
    -
    - - - - - -
    -   - + +
    +

    Unique ID of device

    -

    -Unique ID of device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartLite_Config::ParityOdd u8 XUartLite_Config::ParityOdd
    -
    - - - - - -
    -   - + +
    +

    Parity generated is odd when TRUE, even when FALSE

    -

    -Parity generated is odd when TRUE, even when FALSE

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Config::RegBaseAddr u32 XUartLite_Config::RegBaseAddr
    -
    - - - - - -
    -   - + +
    +

    Register base address

    -

    -Register base address

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartLite_Config::UseParity u8 XUartLite_Config::UseParity
    -
    - - - - - -
    -   - + +
    +

    Parity generator enabled when TRUE

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Parity generator enabled when TRUE

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartlite.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats-members.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats-members.html index 23de7007..ab67beae 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats-members.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats-members.html @@ -2,31 +2,42 @@ - Member List + Xilinx Driver uartlite v3_0: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Stats Member List

    This is the complete list of members for XUartLite_Stats, including all inherited members.

    - - - - - - - -
    CharactersReceivedXUartLite_Stats
    CharactersTransmittedXUartLite_Stats
    ReceiveFramingErrorsXUartLite_Stats
    ReceiveInterruptsXUartLite_Stats
    ReceiveOverrunErrorsXUartLite_Stats
    ReceiveParityErrorsXUartLite_Stats
    TransmitInterruptsXUartLite_Stats
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartLite_Stats Member List

    This is the complete list of members for XUartLite_Stats, including all inherited members. + + + + + + + +
    CharactersReceivedXUartLite_Stats
    CharactersTransmittedXUartLite_Stats
    ReceiveFramingErrorsXUartLite_Stats
    ReceiveInterruptsXUartLite_Stats
    ReceiveOverrunErrorsXUartLite_Stats
    ReceiveParityErrorsXUartLite_Stats
    TransmitInterruptsXUartLite_Stats
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats.html index df0ba141..41c76a9d 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/struct_x_uart_lite___stats.html @@ -2,210 +2,153 @@ - XUartLite_Stats Struct Reference + Xilinx Driver uartlite v3_0: XUartLite_Stats Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartLite_Stats Struct Reference

    #include <xuartlite.h> -

    -List of all members.

    Detailed Description

    -Statistics for the XUartLite driver -

    + + +

    +
    +

    XUartLite_Stats Struct Reference

    +

    #include <xuartlite.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - + + + + + + + +

    Public Attributes

    u32 TransmitInterrupts
    u32 ReceiveInterrupts
    u32 CharactersTransmitted
    u32 CharactersReceived
    u32 ReceiveOverrunErrors
    u32 ReceiveParityErrors
    u32 ReceiveFramingErrors

    Public Attributes

    u32 TransmitInterrupts
    u32 ReceiveInterrupts
    u32 CharactersTransmitted
    u32 CharactersReceived
    u32 ReceiveOverrunErrors
    u32 ReceiveParityErrors
    u32 ReceiveFramingErrors
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Statistics for the XUartLite driver

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartLite_Stats::CharactersReceived u32 XUartLite_Stats::CharactersReceived
    -
    - - - - - -
    -   - + +
    +

    Number of characters received

    -

    -Number of characters received

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::CharactersTransmitted u32 XUartLite_Stats::CharactersTransmitted
    -
    - - - - - -
    -   - + +
    +

    Number of characters transmitted

    -

    -Number of characters transmitted

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::ReceiveFramingErrors u32 XUartLite_Stats::ReceiveFramingErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive framing errors

    -

    -Number of receive framing errors

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::ReceiveInterrupts u32 XUartLite_Stats::ReceiveInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of receive interrupts

    -

    -Number of receive interrupts

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::ReceiveOverrunErrors u32 XUartLite_Stats::ReceiveOverrunErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive overruns

    -

    -Number of receive overruns

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::ReceiveParityErrors u32 XUartLite_Stats::ReceiveParityErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive parity errors

    -

    -Number of receive parity errors

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartLite_Stats::TransmitInterrupts u32 XUartLite_Stats::TransmitInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of transmit interrupts

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Number of transmit interrupts

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartlite.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/tabs.css index a61552a6..a4441634 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs INPUT +DIV.tabs #MSearchBox { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs INPUT DIV.tabs TD { - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -82,21 +82,24 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI#current A +DIV.tabs LI.current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI#current SPAN +DIV.tabs LI.current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.nav +DIV.navpath { background : none; border : none; border-bottom : 1px solid #84B0C7; + text-align : center; + margin : 2px; + padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8c.html index e0a7347c..d3b33a2a 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8c.html @@ -2,30 +2,48 @@ - xuartlite.c File Reference + Xilinx Driver uartlite v3_0: xuartlite.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite.c File Reference

    Detailed Description

    -Contains required functions for the XUartLite driver. See the xuartlite.h header file for more details on this driver.

    + + +

    +
    +

    xuartlite.c File Reference

    #include "xuartlite.h"
    +#include "xuartlite_i.h"
    +#include "xil_io.h"
    + + + + + + + + + +

    Functions

    int XUartLite_CfgInitialize (XUartLite *InstancePtr, XUartLite_Config *Config, u32 EffectiveAddr)
    unsigned int XUartLite_Send (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    unsigned int XUartLite_Recv (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    void XUartLite_ResetFifos (XUartLite *InstancePtr)
    int XUartLite_IsSending (XUartLite *InstancePtr)
    unsigned int XUartLite_SendBuffer (XUartLite *InstancePtr)
    unsigned int XUartLite_ReceiveBuffer (XUartLite *InstancePtr)
    +

    Detailed Description

    +

    Contains required functions for the XUartLite driver. See the xuartlite.h header file for more details on this driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
@@ -52,343 +70,263 @@ Contains required functions for the xuartlite.c. CR:704999.
-
    -

    -#include "xuartlite.h"
    -#include "xuartlite_i.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - - - - - -

    Functions

    int XUartLite_CfgInitialize (XUartLite *InstancePtr, XUartLite_Config *Config, u32 EffectiveAddr)
    unsigned int XUartLite_Send (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    unsigned int XUartLite_Recv (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    void XUartLite_ResetFifos (XUartLite *InstancePtr)
    int XUartLite_IsSending (XUartLite *InstancePtr)
    unsigned int XUartLite_SendBuffer (XUartLite *InstancePtr)
    unsigned int XUartLite_ReceiveBuffer (XUartLite *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    int XUartLite_CfgInitialize ( XUartLite *  InstancePtr, int XUartLite_CfgInitialize (XUartLite *  InstancePtr,
    XUartLite_Config *  Config, XUartLite_Config *  Config,
    u32  EffectiveAddru32  EffectiveAddr 
    ) )
    -
    - - - - - -
    -   - - -

    -Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    -

    Parameters:
    + +
    +

    Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    Config is a reference to a structure containing information about a specific UART Lite device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    -
    Returns:
      -
    • XST_SUCCESS if everything starts up as expected.
    +
    Returns:
      +
    • XST_SUCCESS if everything starts up as expected.
      • +
    -
    Note:
    The Config pointer argument is not used by this function, but is provided to keep the function signature consistent with other drivers.
    -
    -

    - - - - -
    - +
    Note:
    The Config pointer argument is not used by this function, but is provided to keep the function signature consistent with other drivers.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    int XUartLite_IsSending ( XUartLite *  InstancePtr  ) int XUartLite_IsSending (XUartLite *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.

    -

    Parameters:
    + +
    +

    This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    +
    -
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    unsigned int XUartLite_ReceiveBuffer ( XUartLite *  InstancePtr  ) unsigned int XUartLite_ReceiveBuffer (XUartLite *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    -In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    -In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.

    -

    Parameters:
    + +
    +

    This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    unsigned int XUartLite_Recv ( XUartLite *  InstancePtr, unsigned int XUartLite_Recv (XUartLite *  InstancePtr,
    u8 *  DataBufferPtr, u8 *  DataBufferPtr,
    unsigned int  NumBytesunsigned int  NumBytes 
    ) )
    -
    - - - - - -
    -   - - -

    -This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    -In a polled mode, this function will only receive as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    -In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.

    -

    Parameters:
    + +
    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    DataBufferPtr is pointer to buffer for data to be received into.
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    void XUartLite_ResetFifos ( XUartLite *  InstancePtr  ) void XUartLite_ResetFifos (XUartLite *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function resets the FIFOs, both transmit and receive, of the UART such that they are emptied. Since the UART does not have any way to disable it from receiving data, it may be necessary for the application to reset the FIFOs to get rid of any unwanted data.

    -

    Parameters:
    + +
    +

    This function resets the FIFOs, both transmit and receive, of the UART such that they are emptied. Since the UART does not have any way to disable it from receiving data, it may be necessary for the application to reset the FIFOs to get rid of any unwanted data.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance .
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    unsigned int XUartLite_Send ( XUartLite *  InstancePtr, unsigned int XUartLite_Send (XUartLite *  InstancePtr,
    u8 *  DataBufferPtr, u8 *  DataBufferPtr,
    unsigned int  NumBytesunsigned int  NumBytes 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    -In a polled mode, this function will only send as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to send a buffer.

    -In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    -

    Parameters:
    + +
    +

    This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    +

    In a polled mode, this function will only send as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    DataBufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    -
    Returns:
    The number of bytes actually sent.
    -
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    unsigned int XUartLite_SendBuffer ( XUartLite *  InstancePtr  ) unsigned int XUartLite_SendBuffer (XUartLite *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    -In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    -In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    -

    Parameters:
    + +
    +

    This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    +

    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    +
    -
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART transmitter and/or FIFO).
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    NumBytes is the number of bytes actually sent (put into the UART transmitter and/or FIFO).
    +
    Note:
    None.
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8h.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8h.html new file mode 100755 index 00000000..eefce65d --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite_8h.html @@ -0,0 +1,612 @@ + + + + + Xilinx Driver uartlite v3_0: xuartlite.h File Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    xuartlite.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xstatus.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XUartLite_Stats
    struct  XUartLite_Buffer
    struct  XUartLite_Config
    struct  XUartLite

    Defines

    #define XUARTLITE_H

    Typedefs

    typedef void(* XUartLite_Handler )(void *CallBackRef, unsigned int ByteCount)

    Functions

    int XUartLite_Initialize (XUartLite *InstancePtr, u16 DeviceId)
    XUartLite_Config * XUartLite_LookupConfig (u16 DeviceId)
    int XUartLite_CfgInitialize (XUartLite *InstancePtr, XUartLite_Config *Config, u32 EffectiveAddr)
    void XUartLite_ResetFifos (XUartLite *InstancePtr)
    unsigned int XUartLite_Send (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    unsigned int XUartLite_Recv (XUartLite *InstancePtr, u8 *DataBufferPtr, unsigned int NumBytes)
    int XUartLite_IsSending (XUartLite *InstancePtr)
    void XUartLite_GetStats (XUartLite *InstancePtr, XUartLite_Stats *StatsPtr)
    void XUartLite_ClearStats (XUartLite *InstancePtr)
    int XUartLite_SelfTest (XUartLite *InstancePtr)
    void XUartLite_EnableInterrupt (XUartLite *InstancePtr)
    void XUartLite_DisableInterrupt (XUartLite *InstancePtr)
    void XUartLite_SetRecvHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_SetSendHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_InterruptHandler (XUartLite *InstancePtr)
    +

    Detailed Description

    +

    Define Documentation

    + +
    +
    + + + + +
    #define XUARTLITE_H
    +
    +
    + +
    +
    +

    Typedef Documentation

    + +
    +
    + + + + +
    typedef void(* XUartLite_Handler)(void *CallBackRef, unsigned int ByteCount)
    +
    +
    +

    Callback function. The first argument is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. The second argument is the ByteCount which is the number of bytes that actually moved from/to the buffer provided in the _Send/_Receive call.

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XUartLite_CfgInitialize (XUartLite *  InstancePtr,
    XUartLite_Config *  Config,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartLite instance.
    Config is a reference to a structure containing information about a specific UART Lite device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if everything starts up as expected.
      • +
    +
    +
    Note:
    The Config pointer argument is not used by this function, but is provided to keep the function signature consistent with other drivers.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartLite_ClearStats (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function zeros the statistics for the given instance.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartLite_DisableInterrupt (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function disables the UART interrupt. After calling this function, data may still be received by the UART but no interrupt will be generated since the hardware device has no way to disable the receiver.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartLite_EnableInterrupt (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function enables the UART interrupt such that an interrupt will occur when data is received or data has been transmitted. The device contains 16 byte receive and transmit FIFOs such that an interrupt is generated anytime there is data in the receive FIFO and when the transmit FIFO transitions from not empty to empty.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartLite_GetStats (XUartLite *  InstancePtr,
    XUartLite_Stats *  StatsPtr 
    )
    +
    +
    +

    Returns a snapshot of the current statistics in the structure specified.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartLite instance.
    StatsPtr is a pointer to a XUartLiteStats structure to where the statistics are to be copied.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartLite_Initialize (XUartLite *  InstancePtr,
    u16  DeviceId 
    )
    +
    +
    +

    Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartLite instance.
    DeviceId is the unique id of the device controlled by this XUartLite instance. Passing in a device id associates the generic XUartLite instance to a specific device, as chosen by the caller or application developer.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if everything starts up as expected.
      • +
    • XST_DEVICE_NOT_FOUND if the device is not found in the configuration table.
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartLite_InterruptHandler (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function is the interrupt handler for the UART lite driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any UART lite occurs. This function does not save or restore the processor context such that the user must ensure this occurs.

    +
    Parameters:
    + + +
    InstancePtr contains a pointer to the instance of the UART that the interrupt is for.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XUartLite_IsSending (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance.
    +
    +
    +
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    XUartLite_Config* XUartLite_LookupConfig (u16  DeviceId ) 
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartLite_Recv (XUartLite *  InstancePtr,
    u8 *  DataBufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartLite instance.
    DataBufferPtr is pointer to buffer for data to be received into.
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    +
    +
    Returns:
    The number of bytes received.
    +
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartLite_ResetFifos (XUartLite *  InstancePtr ) 
    +
    +
    +

    This function resets the FIFOs, both transmit and receive, of the UART such that they are emptied. Since the UART does not have any way to disable it from receiving data, it may be necessary for the application to reset the FIFOs to get rid of any unwanted data.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance .
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XUartLite_SelfTest (XUartLite *  InstancePtr ) 
    +
    +
    +

    Runs a self-test on the device hardware. Since there is no way to perform a loopback in the hardware, this test can only check the state of the status register to verify it is correct. This test assumes that the hardware device is still in its reset state, but has been initialized with the Initialize function.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartLite instance.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if the self-test was successful.
      • +
    • XST_FAILURE if the self-test failed, the status register value was not correct
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartLite_Send (XUartLite *  InstancePtr,
    u8 *  DataBufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    +

    In a polled mode, this function will only send as much data as the UART can buffer in the FIFO. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartLite instance.
    DataBufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    +
    +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XUartLite_SetRecvHandler (XUartLite *  InstancePtr,
    XUartLite_Handler  FuncPtr,
    void *  CallBackRef 
    )
    +
    +
    +

    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartLite instance.
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XUartLite_SetSendHandler (XUartLite *  InstancePtr,
    XUartLite_Handler  FuncPtr,
    void *  CallBackRef 
    )
    +
    +
    +

    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartLite instance .
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__g_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__g_8c.html index 5dc3dc7d..0981ffb4 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__g_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__g_8c.html @@ -2,64 +2,55 @@ - xuartlite_g.c File Reference + Xilinx Driver uartlite v3_0: xuartlite_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_g.c File Reference

    Detailed Description

    -This file contains a configuration table that specifies the configuration of UART Lite devices in the system. Each device in the system should have an entry in the table.

    + + +

    +
    +

    xuartlite_g.c File Reference

    #include "xuartlite.h"
    +#include "xparameters.h"
    + + + +

    Variables

    XUartLite_Config XUartLite_ConfigTable [XPAR_XUARTLITE_NUM_INSTANCES]
    +

    Detailed Description

    +

    This file contains a configuration table that specifies the configuration of UART Lite devices in the system. Each device in the system should have an entry in the table.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
-
    -

    -#include "xuartlite.h"
    -#include "xparameters.h"
    - - - - - -

    Variables

    XUartLite_Config XUartLite_ConfigTable [XPAR_XUARTLITE_NUM_INSTANCES]
    -

    Variable Documentation

    -

    - - - - -
    - +

    Variable Documentation

    + +
    +
    +
    - +
    XUartLite_Config XUartLite_ConfigTable[XPAR_XUARTLITE_NUM_INSTANCES] XUartLite_Config XUartLite_ConfigTable[XPAR_XUARTLITE_NUM_INSTANCES]
    -
    - - - - - -
    -   - - -

    + +

    Initial value:
     {
         {
@@ -71,7 +62,13 @@ This file contains a configuration table that specifies the configuration of UAR
                 XPAR_UARTLITE_0_DATA_BITS       
         },
 }
-
    The configuration table for UART Lite devices
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    The configuration table for UART Lite devices

    + +
    +
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__i_8h.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__i_8h.html index d0a746ea..37302f89 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__i_8h.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__i_8h.html @@ -2,30 +2,47 @@ - xuartlite_i.h File Reference + Xilinx Driver uartlite v3_0: xuartlite_i.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_i.h File Reference

    Detailed Description

    -Contains data which is shared between the files of the XUartLite component. It is intended for internal use only.

    + + +

    +
    +

    xuartlite_i.h File Reference

    #include "xuartlite.h"
    +#include "xuartlite_l.h"
    + + + + + + + + + +

    Defines

    #define XUARTLITE_I_H
    #define XUartLite_UpdateStats(InstancePtr, StatusRegister)

    Functions

    unsigned int XUartLite_SendBuffer (XUartLite *InstancePtr)
    unsigned int XUartLite_ReceiveBuffer (XUartLite *InstancePtr)

    Variables

    XUartLite_Config XUartLite_ConfigTable []
    +

    Detailed Description

    +

    Contains data which is shared between the files of the XUartLite component. It is intended for internal use only.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Reparitioned the driver for smaller files
@@ -33,123 +50,137 @@ Contains data which is shared between the files of the xuartlite_l.h"
    
-
-
-
-
-
-
-
-
-
-
-

    Functions
    unsigned int XUartLite_SendBuffer (XUartLite *InstancePtr)
    unsigned int XUartLite_ReceiveBuffer (XUartLite *InstancePtr)

    Variables
    XUartLite_Config XUartLite_ConfigTable []
    
-
    Function Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+		      XUartLite_ClearStats function should be used in its place.
     
    Define Documentation
    
+
+
    
+
    
+      
     
    
-          
-          
-          
-          
-          
-          
+          
    
         
    unsigned int XUartLite_ReceiveBuffer           ( XUartLite *  InstancePtr           ) #define XUARTLITE_I_H
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.
    
-This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.
    
-In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.
    
-In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.
    
-
    Parameters:
    
+
    
+
+
+
    
+
    
+      
+        
+          
+          
+          
+        
+        
+          
+          
+          
+          
+          
+          
+        
+      
    #define XUartLite_UpdateStats(InstancePtr, 
    StatusRegister  ) 
    
+
    
+
    
+Value:
    {                                                               \
+        if ((StatusRegister) & XUL_SR_OVERRUN_ERROR)            \
+        {                                                       \
+                (InstancePtr)->Stats.ReceiveOverrunErrors++;    \
+        }                                                       \
+        if ((StatusRegister) & XUL_SR_PARITY_ERROR)             \
+        {                                                       \
+                (InstancePtr)->Stats.ReceiveParityErrors++;     \
+        }                                                       \
+        if ((StatusRegister) & XUL_SR_FRAMING_ERROR)            \
+        {                                                       \
+                (InstancePtr)->Stats.ReceiveFramingErrors++;    \
+        }                                                       \
+}
+
    
+
    
+
    
+
    Function Documentation
    
+
+
    
+
    
+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
    unsigned int XUartLite_ReceiveBuffer (XUartLite *  InstancePtr ) 
    
+
    
+
    
+
    This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.
    
+
    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.
    
+
    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.
    
+
    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance.
    
   
    
+  
    
 
    
-
    Returns:
    The number of bytes received.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The number of bytes received.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    unsigned int XUartLite_SendBuffer           ( XUartLite *  InstancePtr           ) unsigned int XUartLite_SendBuffer (XUartLite *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.
    
-This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.
    
-In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.
    
-In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.
    
-
    Parameters:
    
+
+
    
+
    This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartLite component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.
    
+
    This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.
    
+
    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.
    
+
    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance.
    
   
    
+  
    
 
    
-
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART transmitter and/or FIFO).
    
-
    Note:
    None. 
    
-    
    
-
    Variable Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART transmitter and/or FIFO).
    
+
    Note:
    None. 
    
+
+
+
+
    Variable Documentation
    
+
+
    
+
    
+      
    
-          
+          
    
         
    XUartLite_Config XUartLite_ConfigTable[]          XUartLite_Config XUartLite_ConfigTable[]
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    The configuration table for UART Lite devices 
    
+
+
    
+
+
+
    
+Copyright © 1995-2014 Xilinx, Inc. All rights reserved.
+
    
+
+
 
-
    
-The configuration table for UART Lite devices     
    
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__intr_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__intr_8c.html
index 08cf0559..b2268236 100755
--- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__intr_8c.html
+++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__intr_8c.html
@@ -2,30 +2,48 @@
 
    
 
-   xuartlite_intr.c File Reference
+   Xilinx Driver uartlite v3_0: xuartlite_intr.c File Reference
 
-
+
 
 
    Xilinx Processor IP Library
    
 Software Drivers
 
    
-
-
    
-  
    
-
    
-  
    
-
    xuartlite_intr.c File Reference
    Detailed Description
    
-This file contains interrupt-related functions for the UART Lite component (XUartLite).
    
+
+
+
    
+
    
+
    xuartlite_intr.c File Reference
    #include "xuartlite.h"
    
+#include "xuartlite_i.h"
    
+#include "xil_io.h"
    
+
+
+
+
+
+
+
+
+
+
    Typedefs
    typedef void(* Handler )(XUartLite *InstancePtr)
    Functions
    void XUartLite_SetRecvHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_SetSendHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_InterruptHandler (XUartLite *InstancePtr)
    void XUartLite_DisableInterrupt (XUartLite *InstancePtr)
    void XUartLite_EnableInterrupt (XUartLite *InstancePtr)
    
+
    Detailed Description
    
+
    This file contains interrupt-related functions for the UART Lite component (XUartLite).
    
 
    - MODIFICATION HISTORY:
    
-
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
@@ -34,238 +52,193 @@ This file contains interrupt-related functions for the UART Lite component ( 
-
    
-#include "xuartlite.h"
    
-#include "    xuartlite_i.h"
    
-#include "xil_io.h"
    
-
-
-
-
-
-
-
-
-
-
-
-
-
-

    Functions
    void XUartLite_SetRecvHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_SetSendHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef)
    void XUartLite_InterruptHandler (XUartLite *InstancePtr)
    void XUartLite_DisableInterrupt (XUartLite *InstancePtr)
    void XUartLite_EnableInterrupt (XUartLite *InstancePtr)
    
-
    Function Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+ 
    Typedef Documentation
    
+
+
    
+
    
+      
     
    
-          
-          
-          
-          
-          
-          
+          
    
         
    void XUartLite_DisableInterrupt           ( XUartLite *  InstancePtr           ) typedef void(* Handler)(XUartLite *InstancePtr)
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-This function disables the UART interrupt. After calling this function, data may still be received by the UART but no interrupt will be generated since the hardware device has no way to disable the receiver.
    
-
    Parameters:
    
+
    
+
+
    Function Documentation
    
+
+
    
+
    
+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
    void XUartLite_DisableInterrupt (XUartLite *  InstancePtr ) 
    
+
    
+
    
+
    This function disables the UART interrupt. After calling this function, data may still be received by the UART but no interrupt will be generated since the hardware device has no way to disable the receiver.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    void XUartLite_EnableInterrupt           ( XUartLite *  InstancePtr           ) void XUartLite_EnableInterrupt (XUartLite *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function enables the UART interrupt such that an interrupt will occur when data is received or data has been transmitted. The device contains 16 byte receive and transmit FIFOs such that an interrupt is generated anytime there is data in the receive FIFO and when the transmit FIFO transitions from not empty to empty.
    
-
    Parameters:
    
+
+
    
+
    This function enables the UART interrupt such that an interrupt will occur when data is received or data has been transmitted. The device contains 16 byte receive and transmit FIFOs such that an interrupt is generated anytime there is data in the receive FIFO and when the transmit FIFO transitions from not empty to empty.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    void XUartLite_InterruptHandler           ( XUartLite *  InstancePtr           ) void XUartLite_InterruptHandler (XUartLite *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function is the interrupt handler for the UART lite driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any UART lite occurs. This function does not save or restore the processor context such that the user must ensure this occurs.
    
-
    Parameters:
    
+
+
    
+
    This function is the interrupt handler for the UART lite driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any UART lite occurs. This function does not save or restore the processor context such that the user must ensure this occurs.
    
+
    Parameters:
    
   
    
     
    InstancePtr contains a pointer to the instance of the UART that the interrupt is for.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
+          
+          
+          
    
         
    void XUartLite_SetRecvHandler           ( XUartLite *  InstancePtr, void XUartLite_SetRecvHandler (XUartLite *  InstancePtr, 
         
    
         
    XUartLite_Handler  FuncPtr, XUartLite_Handler  FuncPtr, 
         
    
         
    void *  CallBackRefvoid *  CallBackRef 
         
    
         
    ) )
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.
    
-
    Parameters:
    
+
+
    
+
    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance. 
    
     
    FuncPtr is the pointer to the callback function. 
    
     
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it) 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None.
    
+
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it) 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
+          
+          
+          
    
         
    void XUartLite_SetSendHandler           ( XUartLite *  InstancePtr, void XUartLite_SetSendHandler (XUartLite *  InstancePtr, 
         
    
         
    XUartLite_Handler  FuncPtr, XUartLite_Handler  FuncPtr, 
         
    
         
    void *  CallBackRefvoid *  CallBackRef 
         
    
         
    ) )
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.
    
-
    Parameters:
    
+
+
    
+
    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance . 
    
     
    FuncPtr is the pointer to the callback function. 
    
     
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it) 
    
-    
    
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
+
    Returns:
    None.
    
+
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it) 
    
+
+
    
+
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8c.html index 2a56909c..38ec427a 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8c.html @@ -2,126 +2,113 @@ - xuartlite_l.c File Reference + Xilinx Driver uartlite v3_0: xuartlite_l.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_l.c File Reference

    Detailed Description

    -This file contains low-level driver functions that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation.

    + + +

    +
    +

    xuartlite_l.c File Reference

    #include "xuartlite_l.h"
    + + + + +

    Functions

    void XUartLite_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartLite_RecvByte (u32 BaseAddress)
    +

    Detailed Description

    +

    This file contains low-level driver functions that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00b rpm  04/25/02 First release
  1.12a rpm  07/16/07 Fixed arg type for RecvByte
  2.00a ktn  10/20/09 The macros have been renamed to remove _m from the name.
-
    -

    -#include "xuartlite_l.h"
    - - - - - - - -

    Functions

    void XUartLite_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartLite_RecvByte (u32 BaseAddress)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartLite_RecvByte ( u32  BaseAddress  ) u8 XUartLite_RecvByte (u32  BaseAddress ) 
    -
    - - - - - -
    -   - - -

    -This functions receives a single byte using the UART. It is blocking in that it waits for the receiver to become non-empty before it reads from the receive register.

    -

    Parameters:
    + +
    +

    This functions receives a single byte using the UART. It is blocking in that it waits for the receiver to become non-empty before it reads from the receive register.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    The byte of data received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The byte of data received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartLite_SendByte ( u32  BaseAddress, void XUartLite_SendByte (u32  BaseAddress,
    u8  Datau8  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sends a single byte using the UART. It is blocking in that it waits for the transmitter to become non-full before it writes the byte to the transmit register.

    -

    Parameters:
    + +
    +

    This functions sends a single byte using the UART. It is blocking in that it waits for the transmitter to become non-full before it writes the byte to the transmit register.

    +
    Parameters:
    BaseAddress is the base address of the device
    Data is the byte of data to send
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8h.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8h.html index c54d6604..21c5f25d 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8h.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__l_8h.html @@ -2,30 +2,77 @@ - xuartlite_l.h File Reference + Xilinx Driver uartlite v3_0: xuartlite_l.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_l.h File Reference

    Detailed Description

    -This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. High-level driver functions are defined in xuartlite.h.

    + + +

    +
    +

    xuartlite_l.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xil_io.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XUARTLITE_L_H
    #define XPAR_XUARTLITE_USE_DCR_BRIDGE   0
    #define XUL_RX_FIFO_OFFSET   0
    #define XUL_TX_FIFO_OFFSET   4
    #define XUL_STATUS_REG_OFFSET   8
    #define XUL_CONTROL_REG_OFFSET   12
    #define XUL_CR_ENABLE_INTR   0x10
    #define XUL_CR_FIFO_RX_RESET   0x02
    #define XUL_CR_FIFO_TX_RESET   0x01
    #define XUL_SR_PARITY_ERROR   0x80
    #define XUL_SR_FRAMING_ERROR   0x40
    #define XUL_SR_OVERRUN_ERROR   0x20
    #define XUL_SR_INTR_ENABLED   0x10
    #define XUL_SR_TX_FIFO_FULL   0x08
    #define XUL_SR_TX_FIFO_EMPTY   0x04
    #define XUL_SR_RX_FIFO_FULL   0x02
    #define XUL_SR_RX_FIFO_VALID_DATA   0x01
    #define XUL_FIFO_SIZE   16
    #define XUL_STOP_BITS   1
    #define XUL_PARITY_NONE   0
    #define XUL_PARITY_ODD   1
    #define XUL_PARITY_EVEN   2
    #define XUartLite_In32   Xil_In32
    #define XUartLite_Out32   Xil_Out32
    #define XUartLite_WriteReg(BaseAddress, RegOffset, Data)   XUartLite_Out32((BaseAddress) + (RegOffset), (u32)(Data))
    #define XUartLite_ReadReg(BaseAddress, RegOffset)   XUartLite_In32((BaseAddress) + (RegOffset))
    #define XUartLite_SetControlReg(BaseAddress, Mask)   XUartLite_WriteReg((BaseAddress), XUL_CONTROL_REG_OFFSET, (Mask))
    #define XUartLite_GetStatusReg(BaseAddress)   XUartLite_ReadReg((BaseAddress), XUL_STATUS_REG_OFFSET)
    #define XUartLite_IsReceiveEmpty(BaseAddress)
    #define XUartLite_IsTransmitFull(BaseAddress)
    #define XUartLite_IsIntrEnabled(BaseAddress)
    #define XUartLite_EnableIntr(BaseAddress)   XUartLite_SetControlReg((BaseAddress), XUL_CR_ENABLE_INTR)
    #define XUartLite_DisableIntr(BaseAddress)   XUartLite_SetControlReg((BaseAddress), 0)

    Functions

    void XUartLite_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartLite_RecvByte (u32 BaseAddress)
    +

    Detailed Description

    +

    This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. High-level driver functions are defined in xuartlite.h.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00b rpm  04/25/02 First release
  1.00b rpm  07/07/03 Removed references to XUartLite_GetControlReg macro
@@ -34,466 +81,660 @@ This header file contains identifiers and low-level driver functions (or macros)
  1.13a sv   01/21/08 Updated driver to support access through DCR bus
  2.00a ktn  10/20/09 Updated to use HAL Processor APIs. The macros have been
 		      renamed to remove _m from the name.
-
    -

    -#include "xil_types.h"
    -#include "xil_assert.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - -

    Defines

    #define XUartLite_WriteReg(BaseAddress, RegOffset, Data)   XUartLite_Out32((BaseAddress) + (RegOffset), (u32)(Data))
    #define XUartLite_ReadReg(BaseAddress, RegOffset)   XUartLite_In32((BaseAddress) + (RegOffset))
    #define XUartLite_SetControlReg(BaseAddress, Mask)   XUartLite_WriteReg((BaseAddress), XUL_CONTROL_REG_OFFSET, (Mask))
    #define XUartLite_GetStatusReg(BaseAddress)   XUartLite_ReadReg((BaseAddress), XUL_STATUS_REG_OFFSET)
    #define XUartLite_IsReceiveEmpty(BaseAddress)
    #define XUartLite_IsTransmitFull(BaseAddress)
    #define XUartLite_IsIntrEnabled(BaseAddress)
    #define XUartLite_EnableIntr(BaseAddress)   XUartLite_SetControlReg((BaseAddress), XUL_CR_ENABLE_INTR)
    #define XUartLite_DisableIntr(BaseAddress)   XUartLite_SetControlReg((BaseAddress), 0)

    Functions

    void XUartLite_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartLite_RecvByte (u32 BaseAddress)
    -

    Define Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - +
    #define XUartLite_DisableIntr ( BaseAddress   )    XUartLite_SetControlReg((BaseAddress), 0)#define XPAR_XUARTLITE_USE_DCR_BRIDGE   0
    -
    - - - - - -
    -   - + +
    -

    -Disable the device interrupt. We cannot read the control register, so we just clear all bits. Since the only other ones are the FIFO reset bits, this works without side effects.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + +
    #define XUartLite_DisableIntr(BaseAddress  )    XUartLite_SetControlReg((BaseAddress), 0)
    +
    +
    +

    Disable the device interrupt. We cannot read the control register, so we just clear all bits. Since the only other ones are the FIFO reset bits, this works without side effects.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    None.
    -
    Note:
    C-style Signature: void XUartLite_DisableIntr(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style Signature: void XUartLite_DisableIntr(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartLite_EnableIntr ( BaseAddress   )    XUartLite_SetControlReg((BaseAddress), XUL_CR_ENABLE_INTR)#define XUartLite_EnableIntr(BaseAddress  )    XUartLite_SetControlReg((BaseAddress), XUL_CR_ENABLE_INTR)
    -
    - - - - - -
    -   - - -

    -Enable the device interrupt. We cannot read the control register, so we just write the enable interrupt bit and clear all others. Since the only other ones are the FIFO reset bits, this works without side effects.

    -

    Parameters:
    + +
    +

    Enable the device interrupt. We cannot read the control register, so we just write the enable interrupt bit and clear all others. Since the only other ones are the FIFO reset bits, this works without side effects.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    None.
    -
    Note:
    C-style Signature: void XUartLite_EnableIntr(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style Signature: void XUartLite_EnableIntr(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartLite_GetStatusReg ( BaseAddress   )    XUartLite_ReadReg((BaseAddress), XUL_STATUS_REG_OFFSET)#define XUartLite_GetStatusReg(BaseAddress  )    XUartLite_ReadReg((BaseAddress), XUL_STATUS_REG_OFFSET)
    -
    - - - - - -
    -   - - -

    -Get the contents of the status register. Use the XUL_SR_* constants defined above to interpret the bit-mask returned.

    -

    Parameters:
    + +
    +

    Get the contents of the status register. Use the XUL_SR_* constants defined above to interpret the bit-mask returned.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    A 32-bit value representing the contents of the status register.
    -
    Note:
    C-style Signature: u32 XUartLite_GetStatusReg(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    A 32-bit value representing the contents of the status register.
    +
    Note:
    C-style Signature: u32 XUartLite_GetStatusReg(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - +
    #define XUartLite_IsIntrEnabled ( BaseAddress   ) #define XUartLite_In32   Xil_In32
    -
    - - - - - -
    -   - + +
    -

    -Value:

    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED) == \
-          XUL_SR_INTR_ENABLED)
-
    Check to see if the interrupt is enabled.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + +
    #define XUartLite_IsIntrEnabled(BaseAddress  ) 
    +
    +
    +Value:
    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED) == \
+          XUL_SR_INTR_ENABLED)
+

    Check to see if the interrupt is enabled.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    TRUE if the interrupt is enabled, FALSE otherwise.
    -
    Note:
    C-style Signature: int XUartLite_IsIntrEnabled(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    TRUE if the interrupt is enabled, FALSE otherwise.
    +
    Note:
    C-style Signature: int XUartLite_IsIntrEnabled(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartLite_IsReceiveEmpty ( BaseAddress   ) #define XUartLite_IsReceiveEmpty(BaseAddress  ) 
    -
    - - - - - -
    -   - - -

    -Value:

    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA) != \
-        XUL_SR_RX_FIFO_VALID_DATA)
-
    Check to see if the receiver has data.

    -

    Parameters:
    + +
    +Value:
    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA) != \
+        XUL_SR_RX_FIFO_VALID_DATA)
+

    Check to see if the receiver has data.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    TRUE if the receiver is empty, FALSE if there is data present.
    -
    Note:
    C-style Signature: int XUartLite_IsReceiveEmpty(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    TRUE if the receiver is empty, FALSE if there is data present.
    +
    Note:
    C-style Signature: int XUartLite_IsReceiveEmpty(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartLite_IsTransmitFull ( BaseAddress   ) #define XUartLite_IsTransmitFull(BaseAddress  ) 
    -
    - - - - - -
    -   - - -

    -Value:

    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL) == \
-          XUL_SR_TX_FIFO_FULL)
-
    Check to see if the transmitter is full.

    -

    Parameters:
    + +
    +Value:
    ((XUartLite_GetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL) == \
+          XUL_SR_TX_FIFO_FULL)
+

    Check to see if the transmitter is full.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    TRUE if the transmitter is full, FALSE otherwise.
    -
    Note:
    C-style Signature: int XUartLite_IsTransmitFull(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    TRUE if the transmitter is full, FALSE otherwise.
    +
    Note:
    C-style Signature: int XUartLite_IsTransmitFull(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - - - - +
    #define XUartLite_ReadReg ( BaseAddress,
    RegOffset   )    XUartLite_In32((BaseAddress) + (RegOffset))#define XUARTLITE_L_H
    -
    - - - - - -
    -   - + +
    -

    -Read a value from a UartLite register. A 32 bit read is performed.

    -

    Parameters:
    +
    + + +
    +
    + + + + +
    #define XUartLite_Out32   Xil_Out32
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XUartLite_ReadReg(BaseAddress,
    RegOffset  )    XUartLite_In32((BaseAddress) + (RegOffset))
    +
    +
    +

    Read a value from a UartLite register. A 32 bit read is performed.

    +
    Parameters:
    BaseAddress is the base address of the UartLite device.
    RegOffset is the register offset from the base to read from.
    +
    -
    Returns:
    Data read from the register.
    -
    Note:
    C-style signature: u32 XUartLite_ReadReg(u32 BaseAddress, u32 RegOffset)
    -
    -

    - - - - -
    - +
    Returns:
    Data read from the register.
    +
    Note:
    C-style signature: u32 XUartLite_ReadReg(u32 BaseAddress, u32 RegOffset)
    + + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XUartLite_SetControlReg ( BaseAddress,
    Mask   )    XUartLite_WriteReg((BaseAddress), XUL_CONTROL_REG_OFFSET, (Mask))#define XUartLite_SetControlReg(BaseAddress,
    Mask  )    XUartLite_WriteReg((BaseAddress), XUL_CONTROL_REG_OFFSET, (Mask))
    -
    - - - - - -
    -   - - -

    -Set the contents of the control register. Use the XUL_CR_* constants defined above to create the bit-mask to be written to the register.

    -

    Parameters:
    + +
    +

    Set the contents of the control register. Use the XUL_CR_* constants defined above to create the bit-mask to be written to the register.

    +
    Parameters:
    BaseAddress is the base address of the device
    Mask is the 32-bit value to write to the control register
    +
    -
    Returns:
    None.
    -
    Note:
    C-style Signature: void XUartLite_SetControlReg(u32 BaseAddress, u32 Mask);
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style Signature: void XUartLite_SetControlReg(u32 BaseAddress, u32 Mask);
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XUartLite_WriteReg ( BaseAddress,
    RegOffset,
    Data   )    XUartLite_Out32((BaseAddress) + (RegOffset), (u32)(Data))#define XUartLite_WriteReg(BaseAddress,
    RegOffset,
    Data  )    XUartLite_Out32((BaseAddress) + (RegOffset), (u32)(Data))
    -
    - - - - - -
    -   - - -

    -Write a value to a UartLite register. A 32 bit write is performed.

    -

    Parameters:
    + +
    +

    Write a value to a UartLite register. A 32 bit write is performed.

    +
    Parameters:
    BaseAddress is the base address of the UartLite device.
    RegOffset is the register offset from the base to write to.
    Data is the data written to the register.
    +
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XUartLite_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    -
    -

    Function Documentation

    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-style signature: void XUartLite_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    + + + + +
    +
    +
    - - - - - - +
    u8 XUartLite_RecvByte ( u32  BaseAddress  ) #define XUL_CONTROL_REG_OFFSET   12
    -
    - - - - - -
    -   - + +
    -

    -This functions receives a single byte using the UART. It is blocking in that it waits for the receiver to become non-empty before it reads from the receive register.

    -

    Parameters:
    +
    + + +
    +
    + + + + +
    #define XUL_CR_ENABLE_INTR   0x10
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_CR_FIFO_RX_RESET   0x02
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_CR_FIFO_TX_RESET   0x01
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_FIFO_SIZE   16
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_PARITY_EVEN   2
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_PARITY_NONE   0
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_PARITY_ODD   1
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_RX_FIFO_OFFSET   0
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_FRAMING_ERROR   0x40
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_INTR_ENABLED   0x10
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_OVERRUN_ERROR   0x20
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_PARITY_ERROR   0x80
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_RX_FIFO_FULL   0x02
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_RX_FIFO_VALID_DATA   0x01
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_TX_FIFO_EMPTY   0x04
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_SR_TX_FIFO_FULL   0x08
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_STATUS_REG_OFFSET   8
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_STOP_BITS   1
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUL_TX_FIFO_OFFSET   4
    +
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    u8 XUartLite_RecvByte (u32  BaseAddress ) 
    +
    +
    +

    This functions receives a single byte using the UART. It is blocking in that it waits for the receiver to become non-empty before it reads from the receive register.

    +
    Parameters:
    BaseAddress is the base address of the device
    +
    -
    Returns:
    The byte of data received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The byte of data received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartLite_SendByte ( u32  BaseAddress, void XUartLite_SendByte (u32  BaseAddress,
    u8  Datau8  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sends a single byte using the UART. It is blocking in that it waits for the transmitter to become non-full before it writes the byte to the transmit register.

    -

    Parameters:
    + +
    +

    This functions sends a single byte using the UART. It is blocking in that it waits for the transmitter to become non-full before it writes the byte to the transmit register.

    +
    Parameters:
    BaseAddress is the base address of the device
    Data is the byte of data to send
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__selftest_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__selftest_8c.html index 1b19e3c0..9f1f861d 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__selftest_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__selftest_8c.html @@ -2,30 +2,45 @@ - xuartlite_selftest.c File Reference + Xilinx Driver uartlite v3_0: xuartlite_selftest.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_selftest.c File Reference

    Detailed Description

    -This file contains the self-test functions for the UART Lite component (XUartLite).

    + + +

    +
    +

    xuartlite_selftest.c File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xstatus.h"
    +#include "xuartlite.h"
    +#include "xuartlite_i.h"
    +#include "xil_io.h"
    + + + +

    Functions

    int XUartLite_SelfTest (XUartLite *InstancePtr)
    +

    Detailed Description

    +

    This file contains the self-test functions for the UART Lite component (XUartLite).

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
@@ -35,57 +50,41 @@ This file contains the self-test functions for the UART Lite component ( 
-
    
-#include "xil_types.h"
    
-#include "xil_assert.h"
    
-#include "xstatus.h"
    
-#include "xuartlite.h"
    
-#include "    xuartlite_i.h"
    
-#include "xil_io.h"
    
-
-
-
-
-
-

    Functions
    int XUartLite_SelfTest (XUartLite *InstancePtr)
    
-
    Function Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+ 
    Function Documentation
    
+
+
    
+
    
+      
     
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    int XUartLite_SelfTest           ( XUartLite *  InstancePtr           ) int XUartLite_SelfTest (XUartLite *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-Runs a self-test on the device hardware. Since there is no way to perform a loopback in the hardware, this test can only check the state of the status register to verify it is correct. This test assumes that the hardware device is still in its reset state, but has been initialized with the Initialize function.
    
-
    Parameters:
    
+
+
    
+
    Runs a self-test on the device hardware. Since there is no way to perform a loopback in the hardware, this test can only check the state of the status register to verify it is correct. This test assumes that the hardware device is still in its reset state, but has been initialized with the Initialize function.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartLite instance.
    
   
    
+  
    
 
    
-
    Returns:
      
-
    • XST_SUCCESS if the self-test was successful.
    • XST_FAILURE if the self-test failed, the status register value was not correct
    
+
    Returns:
      
+
    • XST_SUCCESS if the self-test was successful.
      • 
+
    • XST_FAILURE if the self-test failed, the status register value was not correct
      • 
+
    
 
    
-
    Note:
    None. 
    
-    
    
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
+
    Note:
    None. 
    
+
+
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__sinit_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__sinit_8c.html index 8ceda5ef..06fc7fac 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__sinit_8c.html @@ -2,91 +2,109 @@ - xuartlite_sinit.c File Reference + Xilinx Driver uartlite v3_0: xuartlite_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_sinit.c File Reference

    Detailed Description

    -The implementation of the XUartLite component's static initialzation functionality.

    + + +

    +
    +

    xuartlite_sinit.c File Reference

    #include "xstatus.h"
    +#include "xparameters.h"
    +#include "xuartlite_i.h"
    + + + + +

    Functions

    XUartLite_Config * XUartLite_LookupConfig (u16 DeviceId)
    int XUartLite_Initialize (XUartLite *InstancePtr, u16 DeviceId)
    +

    Detailed Description

    +

    The implementation of the XUartLite component's static initialzation functionality.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.01a jvb  10/13/05 First release
  2.00a ktn  10/20/09 Updated to use HAL Processor APIs.
-
    -

    -#include "xstatus.h"
    -#include "xparameters.h"
    -#include "xuartlite_i.h"
    - - - - - -

    Functions

    int XUartLite_Initialize (XUartLite *InstancePtr, u16 DeviceId)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XUartLite_Initialize ( XUartLite *  InstancePtr, int XUartLite_Initialize (XUartLite *  InstancePtr,
    u16  DeviceIdu16  DeviceId 
    ) )
    -
    - - - - - -
    -   - - -

    -Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    -

    Parameters:
    + +
    +

    Initialize a XUartLite instance. The receive and transmit FIFOs of the UART are not flushed, so the user may want to flush them. The hardware device does not have any way to disable the receiver such that any valid data may be present in the receive FIFO. This function disables the UART interrupt. The baudrate and format of the data are fixed in the hardware at hardware build time.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    DeviceId is the unique id of the device controlled by this XUartLite instance. Passing in a device id associates the generic XUartLite instance to a specific device, as chosen by the caller or application developer.
    +
    -
    Returns:
      -
    • XST_SUCCESS if everything starts up as expected.
    • XST_DEVICE_NOT_FOUND if the device is not found in the configuration table.
    +
    Returns:
      +
    • XST_SUCCESS if everything starts up as expected.
      • +
    • XST_DEVICE_NOT_FOUND if the device is not found in the configuration table.
      • +
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Note:
    None.
    + +
    + + +
    +
    + + + + + + + + + +
    XUartLite_Config* XUartLite_LookupConfig (u16  DeviceId ) 
    +
    +
    + +
    +
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__stats_8c.html b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__stats_8c.html index 84183244..c9fca066 100755 --- a/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__stats_8c.html +++ b/XilinxProcessorIPLib/drivers/uartlite/doc/html/api/xuartlite__stats_8c.html @@ -2,130 +2,117 @@ - xuartlite_stats.c File Reference + Xilinx Driver uartlite v3_0: xuartlite_stats.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartlite_stats.c File Reference

    Detailed Description

    -This file contains the statistics functions for the UART Lite component (XUartLite).

    + + +

    +
    +

    xuartlite_stats.c File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xuartlite.h"
    +#include "xuartlite_i.h"
    + + + + +

    Functions

    void XUartLite_GetStats (XUartLite *InstancePtr, XUartLite_Stats *StatsPtr)
    void XUartLite_ClearStats (XUartLite *InstancePtr)
    +

    Detailed Description

    +

    This file contains the statistics functions for the UART Lite component (XUartLite).

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/31/01 First release
  1.00b jhl  02/21/02 Repartitioned the driver for smaller files
  2.00a ktn  10/20/09 Updated to use HAL Processor APIs.
 		      XUartLite_mClearStats macro is removed.
-
    -

    -#include "xil_types.h"
    -#include "xil_assert.h"
    -#include "xuartlite.h"
    -#include "xuartlite_i.h"
    - - - - - - - -

    Functions

    void XUartLite_GetStats (XUartLite *InstancePtr, XUartLite_Stats *StatsPtr)
    void XUartLite_ClearStats (XUartLite *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    void XUartLite_ClearStats ( XUartLite *  InstancePtr  ) void XUartLite_ClearStats (XUartLite *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function zeros the statistics for the given instance.

    -

    Parameters:
    + +
    +

    This function zeros the statistics for the given instance.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartLite_GetStats ( XUartLite *  InstancePtr, void XUartLite_GetStats (XUartLite *  InstancePtr,
    XUartLite_Stats *  StatsPtrXUartLite_Stats *  StatsPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -Returns a snapshot of the current statistics in the structure specified.

    -

    Parameters:
    + +
    +

    Returns a snapshot of the current statistics in the structure specified.

    +
    Parameters:
    InstancePtr is a pointer to the XUartLite instance.
    StatsPtr is a pointer to a XUartLiteStats structure to where the statistics are to be copied.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/annotated.html index 983f1f05..5a6eee69 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/annotated.html @@ -2,30 +2,42 @@ - Class List + Xilinx Driver uartns550 v3_1: Class List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    + + + +

    Class List

    Here are the classes, structs, unions and interfaces with brief descriptions: +
    Mapping
    XUartNs550
    XUartNs550_Config
    XUartNs550Buffer
    XUartNs550Format
    XUartNs550Stats
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/classes.html new file mode 100755 index 00000000..03643771 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/classes.html @@ -0,0 +1,40 @@ + + + + + Xilinx Driver uartns550 v3_1: Alphabetical List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Class Index

    M | X
    + +
      M  
    +
      X  
    +    		XUartNs550_Config   XUartNs550Format   XUartNs550Stats   
    Mapping   XUartNs550   XUartNs550Buffer   
    M | X
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/files.html index ac589fa7..5af28396 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/files.html @@ -2,27 +2,34 @@ - File Index + Xilinx Driver uartns550 v3_1: File Index - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    File List

    Here is a list of all documented files with brief descriptions: + + + +
    +

    File List

    Here is a list of all files with brief descriptions:
    + @@ -34,4 +41,9 @@
    xuartns550.c
    xuartns550.h
    xuartns550_format.c
    xuartns550_g.c
    xuartns550_i.h
    xuartns550_sinit.c
    xuartns550_stats.c
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions.html index 3dfded41..125fb561 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions.html @@ -2,57 +2,205 @@ - Class Members + Xilinx Driver uartns550 v3_1: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -Here is a list of all documented class members with links to the class documentation for each member: -

    -

    + + +

    - c -

    + + +

    - d -

    + + +

    - h -

    + + +

    - i -

    + + +

    - l -

    + + +

    - m -

    + + +

    - n -

    + + +

    - o -

    + + +

    - p -

    + + +

    - r -

    + + +

    - s -

    + + +

    - t -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions_vars.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions_vars.html index 42adb1d5..d262e248 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions_vars.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/functions_vars.html @@ -2,57 +2,205 @@ - Class Members - Variables + Xilinx Driver uartns550 v3_1: Class Members - Variables - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + +
      -

    -

    + + +

    - c -

    + + +

    - d -

    + + +

    - h -

    + + +

    - i -

    + + +

    - l -

    + + +

    - m -

    + + +

    - n -

    + + +

    - o -

    + + +

    - p -

    + + +

    - r -

    + + +

    - s -

    + + +

    - t -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals.html index 97cf5c76..0c38cafa 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals.html @@ -2,124 +2,506 @@ - Class Members + Xilinx Driver uartns550 v3_1: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    -
      -
    • x
      • -
    -
    -

    -Here is a list of all documented file members with links to the documentation: -

    -

    - x -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_defs.html index 4d23d45e..67651e51 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_defs.html @@ -2,99 +2,391 @@ - Class Members + Xilinx Driver uartns550 v3_1: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    -
      -
    • x
      • -
    -
    -

    + +

    +
      -

    -

    - x -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_func.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_func.html index 70c20f48..0dda1980 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_func.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_func.html @@ -2,59 +2,152 @@ - Class Members + Xilinx Driver uartns550 v3_1: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + +
      -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_type.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_type.html new file mode 100755 index 00000000..9a5db644 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_type.html @@ -0,0 +1,52 @@ + + + + + Xilinx Driver uartns550 v3_1: Class Members + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +  +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_vars.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_vars.html index d1870986..6a7e058f 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_vars.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/globals_vars.html @@ -2,36 +2,49 @@ - Class Members + Xilinx Driver uartns550 v3_1: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/index.html index 3f1da12e..8b5a2237 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/index.html @@ -2,53 +2,70 @@ - uartns550 v3_0 + Xilinx Driver uartns550 v3_1: uartns550 v3_1 - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -

    uartns550 v3_0

    -

    -This driver supports the following features in the Xilinx 16450/16550 compatible UART.

    + + +

    +
    +

    uartns550 v3_1

    This driver supports the following features in the Xilinx 16450/16550 compatible UART.

      -
    • Dynamic data format (baud rate, data bits, stop bits, parity)
    • Polled mode
    • Interrupt driven mode
    • Transmit and receive FIFOs (16 bytes each for the 16550)
    • Access to the external modem control lines and the two discrete outputs
    -

    -The only difference between the 16450 and the 16550 is the addition of transmit and receive FIFOs in the 16550.

    -Initialization & Configuration

    -The XUartNs550_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    -To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in one of the following ways:

    +

  • Dynamic data format (baud rate, data bits, stop bits, parity)
    • +
  • Polled mode
    • +
  • Interrupt driven mode
    • +
  • Transmit and receive FIFOs (16 bytes each for the 16550)
    • +
  • Access to the external modem control lines and the two discrete outputs
    • + +

    The only difference between the 16450 and the 16550 is the addition of transmit and receive FIFOs in the 16550.

    +

    Initialization & Configuration

    +

    The XUartNs550_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.

    +

    To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in one of the following ways:

      -
    • XUartNs550_Initialize(InstancePtr, DeviceId) - The driver looks up its own configuration structure created by the tool-chain based on an ID provided by the tool-chain.
    -

    +

  • XUartNs550_Initialize(InstancePtr, DeviceId) - The driver looks up its own configuration structure created by the tool-chain based on an ID provided by the tool-chain.
    • +
      -
    • XUartNs550_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the provided virtual memory base address replaces the physical address present in the configuration structure.
    -

    -Baud Rate

    -The UART has an internal baud rate generator that is clocked at a specified input clock frequency. Not all baud rates can be generated from some clock frequencies. The requested baud rate is checked using the provided clock for the system, and checked against the acceptable error range. An error may be returned from some functions indicating the baud rate was in error because it could not be generated.

    -Interrupts

    -The device does not have any way to disable the receiver such that the receive FIFO may contain unwanted data. The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    -The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for any of the following conditions.

      -
    • Transmit FIFO is empty
    • Data in the receive FIFO equal to the receive threshold
    • Data in the receiver when FIFOs are disabled
    • Any receive status error or break condition detected
    • Data in the receive FIFO for 4 character times without receiver activity
    • A change of a modem signal
    -

    -The application can control which interrupts are enabled using the SetOptions function.

    -In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, XUartNs550_InterruptHandler(), to the interrupt system of the application. This function does not save and restore the processor context such that the user must provide it. A handler must be set for the driver such that the handler is called when interrupt events occur. The handler is called from interrupt context and is designed to allow application specific processing to be performed.

    -The functions, XUartNs550_Send() and XUartNs550_Recv(), are provided in the driver to allow data to be sent and received. They are designed to be used in polled or interrupt modes.

    -

    Note:
    -The default configuration for the UART after initialization is:
      -
    • 19,200 bps or XPAR_DEFAULT_BAUD_RATE if defined
    • 8 data bits
    • 1 stop bit
    • no parity
    • FIFO's are enabled with a receive threshold of 8 bytes
    -

    +

  • XUartNs550_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the provided virtual memory base address replaces the physical address present in the configuration structure.
    • + +

    Baud Rate

    +

    The UART has an internal baud rate generator that is clocked at a specified input clock frequency. Not all baud rates can be generated from some clock frequencies. The requested baud rate is checked using the provided clock for the system, and checked against the acceptable error range. An error may be returned from some functions indicating the baud rate was in error because it could not be generated.

    +

    Interrupts

    +

    The device does not have any way to disable the receiver such that the receive FIFO may contain unwanted data. The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    +

    The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for any of the following conditions.

    +
      +
    • Transmit FIFO is empty
      • +
    • Data in the receive FIFO equal to the receive threshold
      • +
    • Data in the receiver when FIFOs are disabled
      • +
    • Any receive status error or break condition detected
      • +
    • Data in the receive FIFO for 4 character times without receiver activity
      • +
    • A change of a modem signal
      • +
    +

    The application can control which interrupts are enabled using the SetOptions function.

    +

    In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, XUartNs550_InterruptHandler(), to the interrupt system of the application. This function does not save and restore the processor context such that the user must provide it. A handler must be set for the driver such that the handler is called when interrupt events occur. The handler is called from interrupt context and is designed to allow application specific processing to be performed.

    +

    The functions, XUartNs550_Send() and XUartNs550_Recv(), are provided in the driver to allow data to be sent and received. They are designed to be used in polled or interrupt modes.

    +
    Note:
    +

    The default configuration for the UART after initialization is:

    +
      +
    • 19,200 bps or XPAR_DEFAULT_BAUD_RATE if defined
      • +
    • 8 data bits
      • +
    • 1 stop bit
      • +
    • no parity
      • +
    • FIFO's are enabled with a receive threshold of 8 bytes
      • +
    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned the driver for smaller files.
@@ -58,7 +75,7 @@ The default configuration for the UART after initialization is:
      
                      the new _CfgInitialize routine.
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
  1.11a sv   07/25/08 Corrected the definitions of XUN_MODEM_DCD_DELTA_MASK
- 		      and XUN_MODEM_DCD_MASK.
+		      and XUN_MODEM_DCD_MASK.
  1.12a sdm  08/22/08 Removed support for static interrupt handlers from the MDD
 		      file
  1.12a sdm  12/15/08 Deprecated the CLOCK_HZ parameter in mdd and updated the
@@ -74,11 +91,19 @@ The default configuration for the UART after initialization is:
        
 		      used in its place.
  2.01a bss  01/13/12 Updated the XUartNs550_SelfTest to use Xil_AssertNonvoid
 		      in place of XASSERT_NONVOID for CR 641344.
- 		      Removed unneccessary read of the LCR register in the
+		      Removed unneccessary read of the LCR register in the
                      XUartNs550_CfgInitialize function. Removed compiler
 		      warnings for unused variables in the
 		      XUartNs550_StubHandler.
  2.02a adk 09/16/13 Fixed CR:735289 changes are made in the xuartns550_intr.c
 		     file.
  3.0   adk  19/12/13 Updated as per the New Tcl API's
-
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 3.1 adk 20/08/14 Fixed CR:816989 Canonical Definition for Multiple + Instances of UARTSNS550 have the same Device Id. + Changes are made in the driver tcl file. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping-members.html new file mode 100755 index 00000000..00780d64 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping-members.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver uartns550 v3_1: Member List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Mapping Member List

    This is the complete list of members for Mapping, including all inherited members. + + + +
    MaskMapping
    OptionMapping
    RegisterOffsetMapping
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping.html new file mode 100755 index 00000000..3c7810db --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_mapping.html @@ -0,0 +1,86 @@ + + + + + Xilinx Driver uartns550 v3_1: Mapping Struct Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Mapping Struct Reference

    +

    List of all members.

    + + + + + +

    Public Attributes

    u16 Option
    u16 RegisterOffset
    u8 Mask
    +

    Member Data Documentation

    + +
    +
    + + + + +
    u8 Mapping::Mask
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u16 Mapping::Option
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u16 Mapping::RegisterOffset
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550-members.html index 7ee59626..cb35f2f0 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550-members.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550-members.html @@ -2,33 +2,45 @@ - Member List + Xilinx Driver uartns550 v3_1: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550 Member List

    This is the complete list of members for XUartNs550, including all inherited members.

    - - - - - - - - - -
    BaseAddressXUartNs550
    BaudRateXUartNs550
    HandlerXUartNs550
    InputClockHzXUartNs550
    IsReadyXUartNs550
    LastErrorsXUartNs550
    ReceiveBufferXUartNs550
    SendBufferXUartNs550
    StatsXUartNs550
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartNs550 Member List

    This is the complete list of members for XUartNs550, including all inherited members. + + + + + + + + + + +
    BaseAddressXUartNs550
    BaudRateXUartNs550
    CallBackRefXUartNs550
    HandlerXUartNs550
    InputClockHzXUartNs550
    IsReadyXUartNs550
    LastErrorsXUartNs550
    ReceiveBufferXUartNs550
    SendBufferXUartNs550
    StatsXUartNs550
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550.html index bcd1e822..0a13c81a 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550.html @@ -2,260 +2,197 @@ - XUartNs550 Struct Reference + Xilinx Driver uartns550 v3_1: XUartNs550 Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550 Struct Reference

    #include <xuartns550.h> -

    -List of all members.

    Detailed Description

    -The XUartNs550 driver instance data. The user is required to allocate a variable of this type for every UART 16550/16450 device in the system. A pointer to a variable of this type is then passed to the driver API functions. -

    + + +

    +
    +

    XUartNs550 Struct Reference

    +

    #include <xuartns550.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + +

    Public Attributes

    XUartNs550Stats Stats
    u32 BaseAddress
    u32 InputClockHz
    int IsReady
    u32 BaudRate
    u8 LastErrors
    XUartNs550Buffer SendBuffer
    XUartNs550Buffer ReceiveBuffer
    XUartNs550_Handler Handler

    Public Attributes

    XUartNs550Stats Stats
    u32 BaseAddress
    u32 InputClockHz
    int IsReady
    u32 BaudRate
    u8 LastErrors
    XUartNs550Buffer SendBuffer
    XUartNs550Buffer ReceiveBuffer
    XUartNs550_Handler Handler
    void * CallBackRef
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    The XUartNs550 driver instance data. The user is required to allocate a variable of this type for every UART 16550/16450 device in the system. A pointer to a variable of this type is then passed to the driver API functions.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartNs550::BaseAddress u32 XUartNs550::BaseAddress
    -
    - - - - - -
    -   - + +
    +

    Base address of device

    -

    -Base address of device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550::BaudRate u32 XUartNs550::BaudRate
    -
    - - - - - -
    -   - + +
    +

    Current baud rate of hw

    -

    -Current baud rate of hw

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XUartNs550_Handler XUartNs550::Handler void* XUartNs550::CallBackRef
    -
    - - - - - -
    -   - + +
    -

    -Call back handler

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550::InputClockHz XUartNs550_Handler XUartNs550::Handler
    -
    - - - - - -
    -   - + +
    +

    Call back handler

    -

    -Input clock frequency

    -

    - - - - -
    - + + + +
    +
    +
    - +
    int XUartNs550::IsReady u32 XUartNs550::InputClockHz
    -
    - - - - - -
    -   - + +
    +

    Input clock frequency

    -

    -Device is initialized and ready

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartNs550::LastErrors int XUartNs550::IsReady
    -
    - - - - - -
    -   - + +
    +

    Device is initialized and ready

    -

    -The accumulated errors

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XUartNs550Buffer XUartNs550::ReceiveBuffer u8 XUartNs550::LastErrors
    -
    - - - - - -
    -   - + +
    +

    The accumulated errors

    -

    -Receive Buffer

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XUartNs550Buffer XUartNs550::SendBuffer XUartNs550Buffer XUartNs550::ReceiveBuffer
    -
    - - - - - -
    -   - + +
    +

    Receive Buffer

    -

    -Send Buffer

    -

    - - - - -
    - + + + +
    +
    +
    - +
    XUartNs550Stats XUartNs550::Stats XUartNs550Buffer XUartNs550::SendBuffer
    -
    - - - - - -
    -   - + +
    +

    Send Buffer

    + +
    + + +
    +
    + + + + +
    XUartNs550Stats XUartNs550::Stats
    +
    +
    +

    Statistics

    + +
    +
    +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Statistics

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartns550.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config-members.html index e67eba91..555fb587 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config-members.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config-members.html @@ -2,28 +2,39 @@ - Member List + Xilinx Driver uartns550 v3_1: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550_Config Member List

    This is the complete list of members for XUartNs550_Config, including all inherited members.

    - - - - -
    BaseAddressXUartNs550_Config
    DefaultBaudRateXUartNs550_Config
    DeviceIdXUartNs550_Config
    InputClockHzXUartNs550_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartNs550_Config Member List

    This is the complete list of members for XUartNs550_Config, including all inherited members. + + + + +
    BaseAddressXUartNs550_Config
    DefaultBaudRateXUartNs550_Config
    DeviceIdXUartNs550_Config
    InputClockHzXUartNs550_Config
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config.html index c5debf23..ae40f26f 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550___config.html @@ -2,135 +2,108 @@ - XUartNs550_Config Struct Reference + Xilinx Driver uartns550 v3_1: XUartNs550_Config Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550_Config Struct Reference

    #include <xuartns550.h> -

    -List of all members.

    Detailed Description

    -This typedef contains configuration information for the device. -

    + + +

    +
    +

    XUartNs550_Config Struct Reference

    +

    #include <xuartns550.h>

    + +

    List of all members.

    - - - - - - - - - - + + + + +

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz
    u32 DefaultBaudRate

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz
    u32 DefaultBaudRate
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This typedef contains configuration information for the device.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartNs550_Config::BaseAddress u32 XUartNs550_Config::BaseAddress
    -
    - - - - - -
    -   - + +
    +

    Base address of device

    -

    -Base address of device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550_Config::DefaultBaudRate u32 XUartNs550_Config::DefaultBaudRate
    -
    - - - - - -
    -   - + +
    +

    Baud Rate in bps, ie 1200

    -

    -Baud Rate in bps, ie 1200

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550_Config::DeviceId u16 XUartNs550_Config::DeviceId
    -
    - - - - - -
    -   - + +
    +

    Unique ID of device

    -

    -Unique ID of device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550_Config::InputClockHz u32 XUartNs550_Config::InputClockHz
    -
    - - - - - -
    -   - + +
    +

    Input clock frequency

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Input clock frequency

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartns550.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer-members.html index 2db2649a..6f6ed382 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer-members.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer-members.html @@ -2,24 +2,38 @@ - Member List + Xilinx Driver uartns550 v3_1: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Buffer Member List

    This is the complete list of members for XUartNs550Buffer, including all inherited members.

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartNs550Buffer Member List

    This is the complete list of members for XUartNs550Buffer, including all inherited members. + + + +
    NextBytePtrXUartNs550Buffer
    RemainingBytesXUartNs550Buffer
    RequestedBytesXUartNs550Buffer
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer.html index c5020c02..d96fdb24 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_buffer.html @@ -2,33 +2,89 @@ - XUartNs550Buffer Struct Reference + Xilinx Driver uartns550 v3_1: XUartNs550Buffer Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Buffer Struct Reference

    #include <xuartns550.h> -

    -List of all members.

    Detailed Description

    -The following data type is used to manage the buffers that are handled when sending and receiving data in the interrupt mode. -

    + + +

    +
    +

    XUartNs550Buffer Struct Reference

    +

    #include <xuartns550.h>

    + +

    List of all members.

    - + + + +

    Public Attributes

    u8 * NextBytePtr
    unsigned int RequestedBytes
    unsigned int RemainingBytes
    -
    The documentation for this struct was generated from the following file:
      -
    • xuartns550.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Detailed Description

    +

    The following data type is used to manage the buffers that are handled when sending and receiving data in the interrupt mode.

    +

    Member Data Documentation

    + +
    +
    + + + + +
    u8* XUartNs550Buffer::NextBytePtr
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartNs550Buffer::RemainingBytes
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartNs550Buffer::RequestedBytes
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format-members.html index 4129942e..5bc2a6f8 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format-members.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format-members.html @@ -2,28 +2,39 @@ - Member List + Xilinx Driver uartns550 v3_1: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Format Member List

    This is the complete list of members for XUartNs550Format, including all inherited members.

    - - - - -
    BaudRateXUartNs550Format
    DataBitsXUartNs550Format
    ParityXUartNs550Format
    StopBitsXUartNs550Format
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartNs550Format Member List

    This is the complete list of members for XUartNs550Format, including all inherited members. + + + + +
    BaudRateXUartNs550Format
    DataBitsXUartNs550Format
    ParityXUartNs550Format
    StopBitsXUartNs550Format
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format.html index ebcd3df4..e83ac44c 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_format.html @@ -2,135 +2,108 @@ - XUartNs550Format Struct Reference + Xilinx Driver uartns550 v3_1: XUartNs550Format Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Format Struct Reference

    #include <xuartns550.h> -

    -List of all members.

    Detailed Description

    -This data type allows the data format of the device to be set and retrieved. -

    + + +

    +
    +

    XUartNs550Format Struct Reference

    +

    #include <xuartns550.h>

    + +

    List of all members.

    - - - - - - - - - - + + + + +

    Public Attributes

    u32 BaudRate
    u32 DataBits
    u32 Parity
    u8 StopBits

    Public Attributes

    u32 BaudRate
    u32 DataBits
    u32 Parity
    u8 StopBits
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This data type allows the data format of the device to be set and retrieved.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartNs550Format::BaudRate u32 XUartNs550Format::BaudRate
    -
    - - - - - -
    -   - + +
    +

    In bps, ie 1200

    -

    -In bps, ie 1200

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550Format::DataBits u32 XUartNs550Format::DataBits
    -
    - - - - - -
    -   - + +
    +

    Number of data bits

    -

    -Number of data bits

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartNs550Format::Parity u32 XUartNs550Format::Parity
    -
    - - - - - -
    -   - + +
    +

    Parity

    -

    -Parity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartNs550Format::StopBits u8 XUartNs550Format::StopBits
    -
    - - - - - -
    -   - + +
    +

    Number of stop bits

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Number of stop bits

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartns550.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats-members.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats-members.html index c43e89cb..7962139d 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats-members.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats-members.html @@ -2,34 +2,45 @@ - Member List + Xilinx Driver uartns550 v3_1: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Stats Member List

    This is the complete list of members for XUartNs550Stats, including all inherited members.

    - - - - - - - - - - -
    CharactersReceivedXUartNs550Stats
    CharactersTransmittedXUartNs550Stats
    ModemInterruptsXUartNs550Stats
    ReceiveBreakDetectedXUartNs550Stats
    ReceiveFramingErrorsXUartNs550Stats
    ReceiveInterruptsXUartNs550Stats
    ReceiveOverrunErrorsXUartNs550Stats
    ReceiveParityErrorsXUartNs550Stats
    StatusInterruptsXUartNs550Stats
    TransmitInterruptsXUartNs550Stats
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartNs550Stats Member List

    This is the complete list of members for XUartNs550Stats, including all inherited members. + + + + + + + + + + +
    CharactersReceivedXUartNs550Stats
    CharactersTransmittedXUartNs550Stats
    ModemInterruptsXUartNs550Stats
    ReceiveBreakDetectedXUartNs550Stats
    ReceiveFramingErrorsXUartNs550Stats
    ReceiveInterruptsXUartNs550Stats
    ReceiveOverrunErrorsXUartNs550Stats
    ReceiveParityErrorsXUartNs550Stats
    StatusInterruptsXUartNs550Stats
    TransmitInterruptsXUartNs550Stats
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats.html index eb428e7a..3a78b28d 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/struct_x_uart_ns550_stats.html @@ -2,285 +2,198 @@ - XUartNs550Stats Struct Reference + Xilinx Driver uartns550 v3_1: XUartNs550Stats Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartNs550Stats Struct Reference

    #include <xuartns550.h> -

    -List of all members.

    Detailed Description

    -UART statistics -

    + + +

    +
    +

    XUartNs550Stats Struct Reference

    +

    #include <xuartns550.h>

    + +

    List of all members.

    - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + +

    Public Attributes

    u16 TransmitInterrupts
    u16 ReceiveInterrupts
    u16 StatusInterrupts
    u16 ModemInterrupts
    u16 CharactersTransmitted
    u16 CharactersReceived
    u16 ReceiveOverrunErrors
    u16 ReceiveParityErrors
    u16 ReceiveFramingErrors
    u16 ReceiveBreakDetected

    Public Attributes

    u16 TransmitInterrupts
    u16 ReceiveInterrupts
    u16 StatusInterrupts
    u16 ModemInterrupts
    u16 CharactersTransmitted
    u16 CharactersReceived
    u16 ReceiveOverrunErrors
    u16 ReceiveParityErrors
    u16 ReceiveFramingErrors
    u16 ReceiveBreakDetected
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    UART statistics

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u16 XUartNs550Stats::CharactersReceived u16 XUartNs550Stats::CharactersReceived
    -
    - - - - - -
    -   - + +
    +

    Number of characters received

    -

    -Number of characters received

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::CharactersTransmitted u16 XUartNs550Stats::CharactersTransmitted
    -
    - - - - - -
    -   - + +
    +

    Number of characters transmitted

    -

    -Number of characters transmitted

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ModemInterrupts u16 XUartNs550Stats::ModemInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of modem interrupts

    -

    -Number of modem interrupts

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ReceiveBreakDetected u16 XUartNs550Stats::ReceiveBreakDetected
    -
    - - - - - -
    -   - + +
    +

    Number of receive breaks

    -

    -Number of receive breaks

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ReceiveFramingErrors u16 XUartNs550Stats::ReceiveFramingErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive framing errors

    -

    -Number of receive framing errors

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ReceiveInterrupts u16 XUartNs550Stats::ReceiveInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of receive interrupts

    -

    -Number of receive interrupts

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ReceiveOverrunErrors u16 XUartNs550Stats::ReceiveOverrunErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive overruns

    -

    -Number of receive overruns

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::ReceiveParityErrors u16 XUartNs550Stats::ReceiveParityErrors
    -
    - - - - - -
    -   - + +
    +

    Number of receive parity errors

    -

    -Number of receive parity errors

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::StatusInterrupts u16 XUartNs550Stats::StatusInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of status interrupts

    -

    -Number of status interrupts

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartNs550Stats::TransmitInterrupts u16 XUartNs550Stats::TransmitInterrupts
    -
    - - - - - -
    -   - + +
    +

    Number of transmit interrupts

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Number of transmit interrupts

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartns550.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/tabs.css index a61552a6..a4441634 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs INPUT +DIV.tabs #MSearchBox { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs INPUT DIV.tabs TD { - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -82,21 +82,24 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI#current A +DIV.tabs LI.current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI#current SPAN +DIV.tabs LI.current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.nav +DIV.navpath { background : none; border : none; border-bottom : 1px solid #84B0C7; + text-align : center; + margin : 2px; + padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8c.html index 5eba1fd3..9242fd49 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8c.html @@ -2,30 +2,50 @@ - xuartns550.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550.c File Reference

    Detailed Description

    -This file contains the required functions for the 16450/16550 UART driver. Refer to the header file xuartns550.h for more detailed information.

    + + +

    +
    +

    xuartns550.c File Reference

    #include "xstatus.h"
    +#include "xuartns550.h"
    +#include "xuartns550_i.h"
    +#include "xil_io.h"
    + + + + + + + + + + +

    Defines

    #define XUN_MAX_BAUD_ERROR_RATE   3

    Functions

    int XUartNs550_CfgInitialize (XUartNs550 *InstancePtr, XUartNs550_Config *Config, u32 EffectiveAddr)
    unsigned int XUartNs550_Send (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartNs550_Recv (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartNs550_SendBuffer (XUartNs550 *InstancePtr)
    unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *InstancePtr)
    int XUartNs550_SetBaudRate (XUartNs550 *InstancePtr, u32 BaudRate)
    +

    Detailed Description

    +

    This file contains the required functions for the 16450/16550 UART driver. Refer to the header file xuartns550.h for more detailed information.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
@@ -47,270 +67,255 @@ This file contains the required functions for the 16450/16550 UART driver. Refer
                      XUartNs550_CfgInitialize function. Removed compiler
 		      warnings for unused variables in the
 		      XUartNs550_StubHandler.
-
    -

    -#include "xstatus.h"
    -#include "xuartns550.h"
    -#include "xuartns550_i.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - -

    Functions

    int XUartNs550_CfgInitialize (XUartNs550 *InstancePtr, XUartNs550_Config *Config, u32 EffectiveAddr)
    unsigned int XUartNs550_Send (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartNs550_Recv (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartNs550_SendBuffer (XUartNs550 *InstancePtr)
    unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - - - - - - - - - - - - - - - - +
    int XUartNs550_CfgInitialize ( XUartNs550 *  InstancePtr,
    XUartNs550_Config *  Config,
    u32  EffectiveAddr
    ) #define XUN_MAX_BAUD_ERROR_RATE   3
    -
    - - - - - -
    -   - + +
    -

    -Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XUartNs550_CfgInitialize (XUartNs550 *  InstancePtr,
    XUartNs550_Config *  Config,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    Config is a reference to a structure containing information about a specific UART 16450/16550 device. XUartNs550_Init initializes an InstancePtr object for a specific device specified by the contents f Config. XUartNs550_Init can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    -
    Returns:
      -
    • XST_SUCCESS if initialization was successful.
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error.
    +
    Returns:
      +
    • XST_SUCCESS if initialization was successful.
      • +
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error.
      • +
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    unsigned int XUartNs550_ReceiveBuffer ( XUartNs550 *  InstancePtr  ) unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    -In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    -In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    -

    Parameters:
    + +
    +

    This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    unsigned int XUartNs550_Recv ( XUartNs550 *  InstancePtr, unsigned int XUartNs550_Recv (XUartNs550 *  InstancePtr,
    u8 *  BufferPtr, u8 *  BufferPtr,
    unsigned int  NumBytesunsigned int  NumBytes 
    ) )
    -
    - - - - - -
    -   - - -

    -This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    -In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    -In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    -

    Parameters:
    + +
    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    BufferPtr is pointer to buffer for data to be received into
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    -The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.

    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    unsigned int XUartNs550_Send ( XUartNs550 *  InstancePtr, unsigned int XUartNs550_Send (XUartNs550 *  InstancePtr,
    u8 *  BufferPtr, u8 *  BufferPtr,
    unsigned int  NumBytesunsigned int  NumBytes 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    -In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    -In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    -

    Parameters:
    + +
    +

    This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    +

    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    BufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    -
    Returns:
    The number of bytes actually sent.
    -
    Note:
    -The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -
    - This function and the XUartNs550_SetOptions() function modify shared data such that there may be a need for mutual exclusion in a multithreaded environment and if XUartNs550_SetOptions() if called from a handler.
    -

    - - - - -
    - +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    +
    + This function and the XUartNs550_SetOptions() function modify shared data such that there may be a need for mutual exclusion in a multithreaded environment and if XUartNs550_SetOptions() if called from a handler.

    + + + + +
    +
    +
    - - - - - - + + + + + +
    unsigned int XUartNs550_SendBuffer ( XUartNs550 *  InstancePtr  ) unsigned int XUartNs550_SendBuffer (XUartNs550 *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    -In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    -In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    -

    Parameters:
    + +
    +

    This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    +

    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART tranmitter and/or FIFO).
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    NumBytes is the number of bytes actually sent (put into the UART tranmitter and/or FIFO).
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_SetBaudRate (XUartNs550 *  InstancePtr,
    u32  BaudRate 
    )
    +
    +
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8h.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8h.html new file mode 100755 index 00000000..46401596 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550_8h.html @@ -0,0 +1,1485 @@ + + + + + Xilinx Driver uartns550 v3_1: xuartns550.h File Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    xuartns550.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xstatus.h"
    +#include "xuartns550_l.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XUartNs550_Config
    struct  XUartNs550Buffer
    struct  XUartNs550Format
    struct  XUartNs550Stats
    struct  XUartNs550

    Defines

    #define XUARTNS550_H
    #define XUN_NS16550_MAX_RATE   115200
    #define XUN_NS16550_MIN_RATE   300
    Configuration options

    +

    #define XUN_OPTION_RXLINE_INTR   0x0800
    #define XUN_OPTION_SET_BREAK   0x0400
    #define XUN_OPTION_LOOPBACK   0x0200
    #define XUN_OPTION_DATA_INTR   0x0100
    #define XUN_OPTION_MODEM_INTR   0x0080
    #define XUN_OPTION_FIFOS_ENABLE   0x0040
    #define XUN_OPTION_RESET_TX_FIFO   0x0020
    #define XUN_OPTION_RESET_RX_FIFO   0x0010
    #define XUN_OPTION_ASSERT_OUT2   0x0008
    #define XUN_OPTION_ASSERT_OUT1   0x0004
    #define XUN_OPTION_ASSERT_RTS   0x0002
    #define XUN_OPTION_ASSERT_DTR   0x0001
    Data format values

    +

    #define XUN_FORMAT_8_BITS   3
    #define XUN_FORMAT_7_BITS   2
    #define XUN_FORMAT_6_BITS   1
    #define XUN_FORMAT_5_BITS   0
    #define XUN_FORMAT_EVEN_PARITY   2
    #define XUN_FORMAT_ODD_PARITY   1
    #define XUN_FORMAT_NO_PARITY   0
    #define XUN_FORMAT_2_STOP_BIT   1
    #define XUN_FORMAT_1_STOP_BIT   0
    FIFO trigger values

    +

    #define XUN_FIFO_TRIGGER_14   0xC0
    #define XUN_FIFO_TRIGGER_08   0x80
    #define XUN_FIFO_TRIGGER_04   0x40
    #define XUN_FIFO_TRIGGER_01   0x00
    Modem status values

    +

    #define XUN_MODEM_DCD_DELTA_MASK   0x08
    #define XUN_MODEM_DSR_DELTA_MASK   0x02
    #define XUN_MODEM_CTS_DELTA_MASK   0x01
    #define XUN_MODEM_RINGING_MASK   0x40
    #define XUN_MODEM_DSR_MASK   0x20
    #define XUN_MODEM_CTS_MASK   0x10
    #define XUN_MODEM_DCD_MASK   0x80
    #define XUN_MODEM_RING_STOP_MASK   0x04
    Callback events

    +

    #define XUN_EVENT_RECV_DATA   1
    #define XUN_EVENT_RECV_TIMEOUT   2
    #define XUN_EVENT_SENT_DATA   3
    #define XUN_EVENT_RECV_ERROR   4
    #define XUN_EVENT_MODEM   5
    Error values

    +

    #define XUN_ERROR_BREAK_MASK   0x10
    #define XUN_ERROR_FRAMING_MASK   0x08
    #define XUN_ERROR_PARITY_MASK   0x04
    #define XUN_ERROR_OVERRUN_MASK   0x02
    #define XUN_ERROR_NONE   0x00

    Typedefs

    typedef void(* XUartNs550_Handler )(void *CallBackRef, u32 Event, unsigned int EventData)

    Functions

    int XUartNs550_Initialize (XUartNs550 *InstancePtr, u16 DeviceId)
    XUartNs550_Config * XUartNs550_LookupConfig (u16 DeviceId)
    int XUartNs550_CfgInitialize (XUartNs550 *InstancePtr, XUartNs550_Config *Config, u32 EffectiveAddr)
    unsigned int XUartNs550_Send (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartNs550_Recv (XUartNs550 *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    int XUartNs550_SetOptions (XUartNs550 *InstancePtr, u16 Options)
    u16 XUartNs550_GetOptions (XUartNs550 *InstancePtr)
    int XUartNs550_SetFifoThreshold (XUartNs550 *InstancePtr, u8 TriggerLevel)
    u8 XUartNs550_GetFifoThreshold (XUartNs550 *InstancePtr)
    int XUartNs550_IsSending (XUartNs550 *InstancePtr)
    u8 XUartNs550_GetLastErrors (XUartNs550 *InstancePtr)
    u8 XUartNs550_GetModemStatus (XUartNs550 *InstancePtr)
    int XUartNs550_SetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *Format)
    void XUartNs550_GetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *Format)
    void XUartNs550_SetHandler (XUartNs550 *InstancePtr, XUartNs550_Handler FuncPtr, void *CallBackRef)
    void XUartNs550_InterruptHandler (XUartNs550 *InstancePtr)
    void XUartNs550_GetStats (XUartNs550 *InstancePtr, XUartNs550Stats *StatsPtr)
    void XUartNs550_ClearStats (XUartNs550 *InstancePtr)
    int XUartNs550_SelfTest (XUartNs550 *InstancePtr)
    +

    Detailed Description

    +

    Define Documentation

    + +
    +
    + + + + +
    #define XUARTNS550_H
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUN_ERROR_BREAK_MASK   0x10
    +
    +
    +

    These constants specify the errors that may be retrieved from the driver using the XUartNs550_GetLastErrors function. All of them are bit masks, except no error, such that multiple errors may be specified. Break detected

    + +
    +
    + +
    +
    + + + + +
    #define XUN_ERROR_FRAMING_MASK   0x08
    +
    +
    +

    Receive framing error

    + +
    +
    + +
    +
    + + + + +
    #define XUN_ERROR_NONE   0x00
    +
    +
    +

    No error

    + +
    +
    + +
    +
    + + + + +
    #define XUN_ERROR_OVERRUN_MASK   0x02
    +
    +
    +

    Receive overrun error

    + +
    +
    + +
    +
    + + + + +
    #define XUN_ERROR_PARITY_MASK   0x04
    +
    +
    +

    Receive parity error

    + +
    +
    + +
    +
    + + + + +
    #define XUN_EVENT_MODEM   5
    +
    +
    +

    A change in modem status

    + +
    +
    + +
    +
    + + + + +
    #define XUN_EVENT_RECV_DATA   1
    +
    +
    +

    These constants specify the handler events that are passed to a handler from the driver. These constants are not bit masks such that only one will be passed at a time to the handler. Data has been received

    + +
    +
    + +
    +
    + + + + +
    #define XUN_EVENT_RECV_ERROR   4
    +
    +
    +

    A receive error was detected

    + +
    +
    + +
    +
    + + + + +
    #define XUN_EVENT_RECV_TIMEOUT   2
    +
    +
    +

    A receive timeout occurred

    + +
    +
    + +
    +
    + + + + +
    #define XUN_EVENT_SENT_DATA   3
    +
    +
    +

    Data has been sent

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FIFO_TRIGGER_01   0x00
    +
    +
    +

    1 byte trigger level

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FIFO_TRIGGER_04   0x40
    +
    +
    +

    4 byte trigger level

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FIFO_TRIGGER_08   0x80
    +
    +
    +

    8 byte trigger level

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FIFO_TRIGGER_14   0xC0
    +
    +
    +

    14 byte trigger level

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_1_STOP_BIT   0
    +
    +
    +

    1 stop bit

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_2_STOP_BIT   1
    +
    +
    +

    2 stop bits

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_5_BITS   0
    +
    +
    +

    5 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_6_BITS   1
    +
    +
    +

    6 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_7_BITS   2
    +
    +
    +

    7 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_8_BITS   3
    +
    +
    +

    These constants specify the data format that may be set or retrieved with the driver. The data format includes the number of data bits, the number of stop bits and parity. 8 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_EVEN_PARITY   2
    +
    +
    +

    Even Parity

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_NO_PARITY   0
    +
    +
    +

    No Parity

    + +
    +
    + +
    +
    + + + + +
    #define XUN_FORMAT_ODD_PARITY   1
    +
    +
    +

    Odd Parity

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_CTS_DELTA_MASK   0x01
    +
    +
    +

    CTS signal changed state

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_CTS_MASK   0x10
    +
    +
    +

    Current state of CTS signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_DCD_DELTA_MASK   0x08
    +
    +
    +

    These constants specify the modem status that may be retrieved from the driver. DCD signal changed state

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_DCD_MASK   0x80
    +
    +
    +

    Current state of DCD signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_DSR_DELTA_MASK   0x02
    +
    +
    +

    DSR signal changed state

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_DSR_MASK   0x20
    +
    +
    +

    Current state of DSR signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_RING_STOP_MASK   0x04
    +
    +
    +

    Ringing has stopped

    + +
    +
    + +
    +
    + + + + +
    #define XUN_MODEM_RINGING_MASK   0x40
    +
    +
    +

    Ring signal is active

    + +
    +
    + +
    +
    + + + + +
    #define XUN_NS16550_MAX_RATE   115200
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUN_NS16550_MIN_RATE   300
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_ASSERT_DTR   0x0001
    +
    +
    +

    Assert DTR signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_ASSERT_OUT1   0x0004
    +
    +
    +

    Assert out1 signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_ASSERT_OUT2   0x0008
    +
    +
    +

    Assert out2 signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_ASSERT_RTS   0x0002
    +
    +
    +

    Assert RTS signal

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_DATA_INTR   0x0100
    +
    +
    +

    Enable data interrupts

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_FIFOS_ENABLE   0x0040
    +
    +
    +

    Enable FIFOs

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_LOOPBACK   0x0200
    +
    +
    +

    Enable local loopback

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_MODEM_INTR   0x0080
    +
    +
    +

    Enable modem interrupts

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_RESET_RX_FIFO   0x0010
    +
    +
    +

    Reset the receive FIFO

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_RESET_TX_FIFO   0x0020
    +
    +
    +

    Reset the transmit FIFO

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_RXLINE_INTR   0x0800
    +
    +
    +

    These constants specify the options that may be set or retrieved with the driver, each is a unique bit mask such that multiple options may be specified. These constants indicate the function of the option when in the active state. Enable status interrupt

    + +
    +
    + +
    +
    + + + + +
    #define XUN_OPTION_SET_BREAK   0x0400
    +
    +
    +

    Set a break condition

    + +
    +
    +

    Typedef Documentation

    + +
    +
    + + + + +
    typedef void(* XUartNs550_Handler)(void *CallBackRef, u32 Event, unsigned int EventData)
    +
    +
    +

    This data type defines a handler which the application must define when using interrupt mode. The handler will be called from the driver in an interrupt context to handle application specific processing.

    +
    Parameters:
    + + + + +
    CallBackRef is a callback reference passed in by the upper layer when setting the handler, and is passed back to the upper layer when the handler is called.
    Event contains one of the event constants indicating why the handler is being called.
    EventData contains the number of bytes sent or received at the time of the call for send and receive events and contains the modem status for modem events.
    +
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XUartNs550_CfgInitialize (XUartNs550 *  InstancePtr,
    XUartNs550_Config *  Config,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    Config is a reference to a structure containing information about a specific UART 16450/16550 device. XUartNs550_Init initializes an InstancePtr object for a specific device specified by the contents f Config. XUartNs550_Init can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if initialization was successful.
      • +
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error.
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartNs550_ClearStats (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function zeros the statistics for the given instance.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartNs550_GetDataFormat (XUartNs550 *  InstancePtr,
    XUartNs550Format *  FormatPtr 
    )
    +
    +
    +

    Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    FormatPtr is a pointer to a format structure that will contain the data format after this call completes.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartNs550_GetFifoThreshold (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    The current receive FIFO trigger level. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartNs550_GetLastErrors (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function returns the last errors that have occurred in the specified UART. It also clears the errors such that they cannot be retrieved again. The errors include parity error, receive overrun error, framing error, and break detection.

    +

    The last errors is an accumulation of the errors each time an error is discovered in the driver. A status is checked for each received byte and this status is accumulated in the last errors.

    +

    If this function is called after receiving a buffer of data, it will indicate any errors that occurred for the bytes of the buffer. It does not indicate which bytes contained errors.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    The last errors that occurred. The errors are bit masks that are contained in the file xuartns550.h and named XUN_ERROR_*.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartNs550_GetModemStatus (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance .
    +
    +
    +
    Returns:
    The modem status which are bit masks that are contained in the file xuartns550.h and named XUN_MODEM_*.
    +
    Note:
    +

    The bit masks used for the modem status are the exact bits of the modem status register with no abstraction.

    + +
    +
    + +
    +
    + + + + + + + + + +
    u16 XUartNs550_GetOptions (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    The current options for the UART. The optionss are bit masks that are contained in the file xuartns550.h and named XUN_OPTION_*.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartNs550_GetStats (XUartNs550 *  InstancePtr,
    XUartNs550Stats *  StatsPtr 
    )
    +
    +
    +

    This functions returns a snapshot of the current statistics in the area provided.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    StatsPtr is a pointer to a XUartNs550Stats structure to where the statistics are to be copied to.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_Initialize (XUartNs550 *  InstancePtr,
    u16  DeviceId 
    )
    +
    +
    +

    Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by XPAR_DEFAULT_BAUD_RATE if the symbol is defined, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance .
    DeviceId is the unique id of the device controlled by this XUartNs550 instance. Passing in a device id associates the generic XUartNs550 instance to a specific device, as chosen by the caller or application developer.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if initialization was successful
      • +
    • XST_DEVICE_NOT_FOUND if the device ID could not be found in the configuration table
      • +
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error
      • +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartNs550_InterruptHandler (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function is the interrupt handler for the 16450/16550 UART driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any 16450/16550 UART occurs. This function does not save or restore the processor context such that the user must ensure this occurs.

    +
    Parameters:
    + + +
    InstancePtr contains a pointer to the instance of the UART that the interrupt is for.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    int XUartNs550_IsSending (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    XUartNs550_Config* XUartNs550_LookupConfig (u16  DeviceId ) 
    +
    +
    +

    Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    +
    Parameters:
    + + +
    DeviceId contains the ID of the device to look up the configuration for.
    +
    +
    +
    Returns:
    A pointer to the configuration found or NULL if the specified device ID was not found.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartNs550_Recv (XUartNs550 *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue receiving data until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    BufferPtr is pointer to buffer for data to be received into
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    +
    +
    Returns:
    The number of bytes received.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.

    + +
    +
    + +
    +
    + + + + + + + + + +
    int XUartNs550_SelfTest (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This functions runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    +

    The statistics are cleared at the end of the test. The time for this test to execute is proportional to the baud rate that has been set prior to calling this function.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if the test was successful
      • +
    • XST_UART_TEST_FAIL if the test failed looping back the data
      • +
    +
    Note:
    This function can hang if the hardware is not functioning properly.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartNs550_Send (XUartNs550 *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This functions sends the specified buffer of data using the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART. If the UART is busy sending data, it will return and indicate zero bytes were sent.

    +

    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue sending data until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    BufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    +
    +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    +
    + This function and the XUartNs550_SetOptions() function modify shared data such that there may be a need for mutual exclusion in a multithreaded environment and if XUartNs550_SetOptions() if called from a handler.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_SetDataFormat (XUartNs550 *  InstancePtr,
    XUartNs550Format *  FormatPtr 
    )
    +
    +
    +

    Sets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance .
    FormatPtr is a pointer to a format structure containing the data format to be set.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if the data format was successfully set.
      • +
    • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
      • +
    • XST_INVALID_PARAM if one of the parameters was not valid.
      • +
    +
    Note:
    +

    The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning that is a bug with the GNU PowerPC compiler. The asserts in this function will cause a warning if these fields are bytes.
    +
    + The baud rates tested include: 1200, 2400, 4800, 9600, 19200, 38400, 57600 and 115200.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_SetFifoThreshold (XUartNs550 *  InstancePtr,
    u8  TriggerLevel 
    )
    +
    +
    +

    This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated. The FIFOs must be enabled to set the trigger level.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    TriggerLevel contains the trigger level to set. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if the trigger level was set
      • +
    • XST_UART_CONFIG_ERROR if the trigger level could not be set, either the hardware does not support the FIFOs or FIFOs are not enabled
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XUartNs550_SetHandler (XUartNs550 *  InstancePtr,
    XUartNs550_Handler  FuncPtr,
    void *  CallBackRef 
    )
    +
    +
    +

    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    +

    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_SetOptions (XUartNs550 *  InstancePtr,
    u16  Options 
    )
    +
    +
    +

    Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.

    +

    The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartNs550 instance.
    Options contains the options to be set which are bit masks contained in the file xuartns550.h and named XUN_OPTION_*.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if the options were set successfully.
      • +
    • XST_UART_CONFIG_ERROR if the options could not be set because the hardware does not support FIFOs
      • +
    +
    +
    Note:
    None.
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__format_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__format_8c.html index 9f726f1c..d75e2836 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__format_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__format_8c.html @@ -2,30 +2,44 @@ - xuartns550_format.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_format.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_format.c File Reference

    Detailed Description

    -This file contains the data format functions for the 16450/16550 UART driver. The data format functions allow the baud rate, number of data bits, number of stop bits and parity to be set and retrieved.

    + + +

    +
    +

    xuartns550_format.c File Reference

    #include "xstatus.h"
    +#include "xuartns550.h"
    +#include "xuartns550_i.h"
    +#include "xil_io.h"
    + + + + +

    Functions

    int XUartNs550_SetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *FormatPtr)
    void XUartNs550_GetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *FormatPtr)
    +

    Detailed Description

    +

    This file contains the data format functions for the 16450/16550 UART driver. The data format functions allow the baud rate, number of data bits, number of stop bits and parity to be set and retrieved.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
  1.00b rmm  05/15/03 Fixed diab compiler warnings.
@@ -33,116 +47,92 @@ This file contains the data format functions for the 16450/16550 UART driver. Th
  2.00a ktn  10/20/09 Converted all register accesses to 32 bit access.
 		      Updated to use HAL Processor APIs. _m is removed from the
 		      name of all the macro names/definitions.
-
    -

    -#include "xstatus.h"
    -#include "xuartns550.h"
    -#include "xuartns550_i.h"
    -#include "xil_io.h"
    - - - - - - - -

    Functions

    int XUartNs550_SetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *FormatPtr)
    void XUartNs550_GetDataFormat (XUartNs550 *InstancePtr, XUartNs550Format *FormatPtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_GetDataFormat ( XUartNs550 *  InstancePtr, void XUartNs550_GetDataFormat (XUartNs550 *  InstancePtr,
    XUartNs550Format *  FormatPtrXUartNs550Format *  FormatPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    -

    Parameters:
    + +
    +

    Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    FormatPtr is a pointer to a format structure that will contain the data format after this call completes.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XUartNs550_SetDataFormat ( XUartNs550 *  InstancePtr, int XUartNs550_SetDataFormat (XUartNs550 *  InstancePtr,
    XUartNs550Format *  FormatPtrXUartNs550Format *  FormatPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -Sets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    -

    Parameters:
    + +
    +

    Sets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance .
    FormatPtr is a pointer to a format structure containing the data format to be set.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the data format was successfully set.
    • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
    • XST_INVALID_PARAM if one of the parameters was not valid.
    -

    -

    Note:
    -The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning that is a bug with the GNU PowerPC compiler. The asserts in this function will cause a warning if these fields are bytes.
    -
    - The baud rates tested include: 1200, 2400, 4800, 9600, 19200, 38400, 57600 and 115200.
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

  • XST_SUCCESS if the data format was successfully set.
    • +
  • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
    • +
  • XST_INVALID_PARAM if one of the parameters was not valid.
    • + +
    Note:
    +

    The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning that is a bug with the GNU PowerPC compiler. The asserts in this function will cause a warning if these fields are bytes.
    +
    + The baud rates tested include: 1200, 2400, 4800, 9600, 19200, 38400, 57600 and 115200.

    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__g_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__g_8c.html index 8873eaf0..35cb1e5c 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__g_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__g_8c.html @@ -2,65 +2,56 @@ - xuartns550_g.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_g.c File Reference

    Detailed Description

    -This file contains a configuration table that specifies the configuration of NS16550 devices in the system.

    + + +

    +
    +

    xuartns550_g.c File Reference

    #include "xuartns550.h"
    +#include "xparameters.h"
    + + + +

    Variables

    XUartNs550_Config XUartNs550_ConfigTable []
    +

    Detailed Description

    +

    This file contains a configuration table that specifies the configuration of NS16550 devices in the system.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
-
    -

    -#include "xuartns550.h"
    -#include "xparameters.h"
    - - - - - -

    Variables

    XUartNs550_Config XUartNs550_ConfigTable []
    -

    Variable Documentation

    -

    - - - - -
    - +

    Variable Documentation

    + +
    +
    +
    - +
    XUartNs550_Config XUartNs550_ConfigTable[] XUartNs550_Config XUartNs550_ConfigTable[]
    -
    - - - - - -
    -   - - -

    + +

    Initial value:
     {
         {
@@ -69,7 +60,13 @@ This file contains a configuration table that specifies the configuration of NS1
                 XPAR_UARTNS550_0_CLOCK_HZ
         }
 }
-
    The configuration table for UART 16550/16450 devices in the table. Each device should have an entry in this table.
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    The configuration table for UART 16550/16450 devices in the table. Each device should have an entry in this table.

    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__i_8h.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__i_8h.html index 9cb84fc0..1019f0b4 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__i_8h.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__i_8h.html @@ -2,30 +2,47 @@ - xuartns550_i.h File Reference + Xilinx Driver uartns550 v3_1: xuartns550_i.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_i.h File Reference

    Detailed Description

    -This header file contains internal identifiers, which are those shared between the files of the driver. It is intended for internal use only.

    + + +

    +
    +

    xuartns550_i.h File Reference

    #include "xuartns550.h"
    + + + + + + + + + + +

    Defines

    #define XUARTNS550_I_H
    #define XUartNs550_UpdateStats(InstancePtr, CurrentLsr)

    Functions

    int XUartNs550_SetBaudRate (XUartNs550 *InstancePtr, u32 BaudRate)
    unsigned int XUartNs550_SendBuffer (XUartNs550 *InstancePtr)
    unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *InstancePtr)

    Variables

    XUartNs550_Config XUartNs550_ConfigTable []
    +

    Detailed Description

    +

    This header file contains internal identifiers, which are those shared between the files of the driver. It is intended for internal use only.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
@@ -35,121 +52,166 @@ This header file contains internal identifiers, which are those shared between t
 		      name of all the macro definitions. XUartNs550_mClearStats
 		      macro is removed, XUartNs550_ClearStats function should be
 		      used in its place.
-
    -

    -#include "xuartns550.h"
    - - - - - - - - - - -

    Functions

    unsigned int XUartNs550_SendBuffer (XUartNs550 *InstancePtr)
    unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *InstancePtr)

    Variables

    XUartNs550_Config XUartNs550_ConfigTable []
    -

    Function Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - +
    unsigned int XUartNs550_ReceiveBuffer ( XUartNs550 *  InstancePtr  ) #define XUARTNS550_I_H
    -
    - - - - - -
    -   - + +
    -

    -This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    -In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    -In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + + + + + + +
    #define XUartNs550_UpdateStats(InstancePtr,
    CurrentLsr  ) 
    +
    +
    +Value:
    {                                                               \
+        InstancePtr->LastErrors |= CurrentLsr;                  \
+                                                                \
+        if (CurrentLsr & XUN_LSR_OVERRUN_ERROR) {               \
+                InstancePtr->Stats.ReceiveOverrunErrors++;      \
+        }                                                       \
+        if (CurrentLsr & XUN_LSR_PARITY_ERROR) {                \
+                InstancePtr->Stats.ReceiveParityErrors++;       \
+        }                                                       \
+        if (CurrentLsr & XUN_LSR_FRAMING_ERROR) {               \
+                InstancePtr->Stats.ReceiveFramingErrors++;      \
+        }                                                       \
+        if (CurrentLsr & XUN_LSR_BREAK_INT) {                   \
+                InstancePtr->Stats.ReceiveBreakDetected++;      \
+        }                                                       \
+}
+
    +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    unsigned int XUartNs550_ReceiveBuffer (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function receives a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function will attempt to receive a specified number of bytes of data from the UART and store it into the specified buffer. This function is designed for either polled or interrupt driven modes. It is non-blocking such that it will return if there is no data has already received by the UART.

    +

    In a polled mode, this function will only receive as much data as the UART can buffer, either in the receiver or in the FIFO if present and enabled. The application may need to call it repeatedly to receive a buffer. Polled mode is the default mode of operation for the driver.

    +

    In interrupt mode, this function will start receiving and then the interrupt handler of the driver will continue until the buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of receiving the buffer or when any receive errors or timeouts occur. Interrupt mode must be enabled using the SetOptions function.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    unsigned int XUartNs550_SendBuffer ( XUartNs550 *  InstancePtr  ) unsigned int XUartNs550_SendBuffer (XUartNs550 *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    -This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    -In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    -In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    -

    Parameters:
    + +
    +

    This function sends a buffer that has been previously specified by setting up the instance variables of the instance. This function is designed to be an internal function for the XUartNs550 component such that it may be called from a shell function that sets up the buffer or from an interrupt handler.

    +

    This function sends the specified buffer of data to the UART in either polled or interrupt driven modes. This function is non-blocking such that it will return before the data has been sent by the UART.

    +

    In a polled mode, this function will only send as much data as the UART can buffer, either in the transmitter or in the FIFO if present and enabled. The application may need to call it repeatedly to send a buffer.

    +

    In interrupt mode, this function will start sending the specified buffer and then the interrupt handler of the driver will continue until the buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending the buffer.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART tranmitter and/or FIFO).
    -
    Note:
    None.
    -
    -

    Variable Documentation

    -

    - - - - -
    - +
    Returns:
    NumBytes is the number of bytes actually sent (put into the UART tranmitter and/or FIFO).
    +
    Note:
    None.
    + + + + +
    +
    +
    - + + + + + + + + + + + + + + +
    XUartNs550_Config XUartNs550_ConfigTable[] int XUartNs550_SetBaudRate (XUartNs550 *  InstancePtr,
    u32  BaudRate 
    )
    -
    - - - - - -
    -   - + +
    + +
    + +

    Variable Documentation

    + +
    +
    + + + + +
    XUartNs550_Config XUartNs550_ConfigTable[]
    +
    +
    +

    The configuration table for UART 16550/16450 devices in the table. Each device should have an entry in this table.

    + +
    +
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -The configuration table for UART 16550/16450 devices in the table. Each device should have an entry in this table.

    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__intr_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__intr_8c.html index 06aafc67..d4974e11 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__intr_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__intr_8c.html @@ -2,30 +2,45 @@ - xuartns550_intr.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_intr.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_intr.c File Reference

    Detailed Description

    -This file contains the functions that are related to interrupt processing for the 16450/16550 UART driver.

    + + +

    +
    +

    xuartns550_intr.c File Reference

    #include "xuartns550.h"
    +#include "xuartns550_i.h"
    +#include "xil_io.h"
    + + + + + + +

    Typedefs

    typedef void(* Handler )(XUartNs550 *InstancePtr)

    Functions

    void XUartNs550_SetHandler (XUartNs550 *InstancePtr, XUartNs550_Handler FuncPtr, void *CallBackRef)
    void XUartNs550_InterruptHandler (XUartNs550 *InstancePtr)
    +

    Detailed Description

    +

    This file contains the functions that are related to interrupt processing for the 16450/16550 UART driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
@@ -42,107 +57,96 @@ This file contains the functions that are related to interrupt processing for th
 		      data is equal to the threshold).
 		      The callback function with XUN_EVENT_RECV_DATA will be
 		      called when all the requested data has been received
-
    -

    -#include "xuartns550.h"
    -#include "xuartns550_i.h"
    -#include "xil_io.h"
    - - - - - - - -

    Functions

    void XUartNs550_SetHandler (XUartNs550 *InstancePtr, XUartNs550_Handler FuncPtr, void *CallBackRef)
    void XUartNs550_InterruptHandler (XUartNs550 *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Typedef Documentation

    + +
    +
    +
    - - - - - - +
    void XUartNs550_InterruptHandler ( XUartNs550 *  InstancePtr  ) typedef void(* Handler)(XUartNs550 *InstancePtr)
    -
    - - - - - -
    -   - + +
    -

    -This function is the interrupt handler for the 16450/16550 UART driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any 16450/16550 UART occurs. This function does not save or restore the processor context such that the user must ensure this occurs.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    void XUartNs550_InterruptHandler (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This function is the interrupt handler for the 16450/16550 UART driver. It must be connected to an interrupt system by the user such that it is called when an interrupt for any 16450/16550 UART occurs. This function does not save or restore the processor context such that the user must ensure this occurs.

    +
    Parameters:
    InstancePtr contains a pointer to the instance of the UART that the interrupt is for.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_SetHandler ( XUartNs550 *  InstancePtr, void XUartNs550_SetHandler (XUartNs550 *  InstancePtr,
    XUartNs550_Handler  FuncPtr, XUartNs550_Handler  FuncPtr,
    void *  CallBackRefvoid *  CallBackRef 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.

    -

    Parameters:
    + +
    +

    This function sets the handler that will be called when an event (interrupt) occurs in the driver. The purpose of the handler is to allow application specific processing to be performed.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    -
    Returns:
    None.
    -
    Note:
    -There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    +

    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)

    + +
    +
    + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8c.html index fb2c1bcd..078a23aa 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8c.html @@ -2,30 +2,42 @@ - xuartns550_l.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_l.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_l.c File Reference

    Detailed Description

    -This file contains low-level driver functions that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation.

    + + +

    +
    +

    xuartns550_l.c File Reference

    #include "xuartns550_l.h"
    + + + + + +

    Functions

    void XUartNs550_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartNs550_RecvByte (u32 BaseAddress)
    void XUartNs550_SetBaud (u32 BaseAddress, u32 InputClockHz, u32 BaudRate)
    +

    Detailed Description

    +

    This file contains low-level driver functions that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00b jhl  04/24/02 First release
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
@@ -33,153 +45,118 @@ This file contains low-level driver functions that can be used to access the dev
  2.00a ktn  10/20/09 Converted all register accesses to 32 bit access.
 		      Updated to use HAL Processor APIs. _m is removed from the
 		      name of all the macro definitions.
-
    -

    -#include "xuartns550_l.h"
    - - - - - - - - - -

    Functions

    void XUartNs550_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartNs550_RecvByte (u32 BaseAddress)
    void XUartNs550_SetBaud (u32 BaseAddress, u32 InputClockHz, u32 BaudRate)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartNs550_RecvByte ( u32  BaseAddress  ) u8 XUartNs550_RecvByte (u32  BaseAddress ) 
    -
    - - - - - -
    -   - - -

    -This function receives a byte from the UART. It operates in a polling mode and blocks until a byte of data is received.

    -

    Parameters:
    + +
    +

    This function receives a byte from the UART. It operates in a polling mode and blocks until a byte of data is received.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    +
    -
    Returns:
    The data byte received by the UART.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The data byte received by the UART.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_SendByte ( u32  BaseAddress, void XUartNs550_SendByte (u32  BaseAddress,
    u8  Datau8  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sends a data byte with the UART. This function operates in the polling mode and blocks until the data has been put into the UART transmit holding register.

    -

    Parameters:
    + +
    +

    This function sends a data byte with the UART. This function operates in the polling mode and blocks until the data has been put into the UART transmit holding register.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    Data contains the data byte to be sent.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_SetBaud ( u32  BaseAddress, void XUartNs550_SetBaud (u32  BaseAddress,
    u32  InputClockHz, u32  InputClockHz,
    u32  BaudRateu32  BaudRate 
    ) )
    -
    - - - - - -
    -   - - -

    -Set the baud rate for the UART.

    -

    Parameters:
    + +
    +

    Set the baud rate for the UART.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    InputClockHz is the frequency of the input clock to the device in Hertz.
    BaudRate is the baud rate to be set.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8h.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8h.html index b97bfb2a..32d48819 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8h.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__l_8h.html @@ -2,30 +2,127 @@ - xuartns550_l.h File Reference + Xilinx Driver uartns550 v3_1: xuartns550_l.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_l.h File Reference

    Detailed Description

    -This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation. High-level driver functions are defined in xuartns550.h.

    + + +

    +
    +

    xuartns550_l.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xil_io.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XUARTNS550_L_H
    #define XUN_REG_OFFSET   0x1000
    #define XUN_FIFO_SIZE   16
    #define XUN_DIVISOR_BYTE_MASK   0x000000FF
    #define XUartNs550_ReadReg(BaseAddress, RegOffset)   Xil_In32((BaseAddress) + (RegOffset))
    #define XUartNs550_WriteReg(BaseAddress, RegOffset, RegisterValue)   Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
    #define XUartNs550_GetLineStatusReg(BaseAddress)   XUartNs550_ReadReg((BaseAddress), XUN_LSR_OFFSET)
    #define XUartNs550_GetLineControlReg(BaseAddress)   XUartNs550_ReadReg((BaseAddress), XUN_LCR_OFFSET)
    #define XUartNs550_SetLineControlReg(BaseAddress, RegisterValue)   XUartNs550_WriteReg((BaseAddress), XUN_LCR_OFFSET, (RegisterValue))
    #define XUartNs550_EnableIntr(BaseAddress)
    #define XUartNs550_DisableIntr(BaseAddress)
    #define XUartNs550_IsReceiveData(BaseAddress)   (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_DATA_READY)
    #define XUartNs550_IsTransmitEmpty(BaseAddress)   (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_TX_BUFFER_EMPTY)
    Register Map

    Register offsets for the 16450/16550 compatible UART device.

    +

    #define XUN_RBR_OFFSET   (XUN_REG_OFFSET)
    #define XUN_THR_OFFSET   (XUN_REG_OFFSET)
    #define XUN_IER_OFFSET   (XUN_REG_OFFSET + 0x04)
    #define XUN_IIR_OFFSET   (XUN_REG_OFFSET + 0x08)
    #define XUN_FCR_OFFSET   (XUN_REG_OFFSET + 0x08)
    #define XUN_LCR_OFFSET   (XUN_REG_OFFSET + 0x0C)
    #define XUN_MCR_OFFSET   (XUN_REG_OFFSET + 0x10)
    #define XUN_LSR_OFFSET   (XUN_REG_OFFSET + 0x14)
    #define XUN_MSR_OFFSET   (XUN_REG_OFFSET + 0x18)
    #define XUN_DRLS_OFFSET   (XUN_REG_OFFSET + 0x00)
    #define XUN_DRLM_OFFSET   (XUN_REG_OFFSET + 0x04)
    Interrupt Enable Register (IER) mask(s)

    +

    #define XUN_IER_MODEM_STATUS   0x00000008
    #define XUN_IER_RX_LINE   0x00000004
    #define XUN_IER_TX_EMPTY   0x00000002
    #define XUN_IER_RX_DATA   0x00000001
    Interrupt ID Register (INT_ID) mask(s)

    +

    #define XUN_INT_ID_MASK   0x0000000F
    #define XUN_INT_ID_FIFOS_ENABLED   0x000000C0
    FIFO Control Register mask(s)

    +

    #define XUN_FIFO_RX_TRIG_MSB   0x00000080
    #define XUN_FIFO_RX_TRIG_LSB   0x00000040
    #define XUN_FIFO_TX_RESET   0x00000004
    #define XUN_FIFO_RX_RESET   0x00000002
    #define XUN_FIFO_ENABLE   0x00000001
    #define XUN_FIFO_RX_TRIGGER   0x000000C0
    Line Control Register(LCR) mask(s)

    +

    #define XUN_LCR_DLAB   0x00000080
    #define XUN_LCR_SET_BREAK   0x00000040
    #define XUN_LCR_STICK_PARITY   0x00000020
    #define XUN_LCR_EVEN_PARITY   0x00000010
    #define XUN_LCR_ENABLE_PARITY   0x00000008
    #define XUN_LCR_2_STOP_BITS   0x00000004
    #define XUN_LCR_8_DATA_BITS   0x00000003
    #define XUN_LCR_7_DATA_BITS   0x00000002
    #define XUN_LCR_6_DATA_BITS   0x00000001
    #define XUN_LCR_LENGTH_MASK   0x00000003
    #define XUN_LCR_PARITY_MASK   0x00000018
    Mode Control Register(MCR) mask(s)

    +

    #define XUN_MCR_LOOP   0x00000010
    #define XUN_MCR_OUT_2   0x00000008
    #define XUN_MCR_OUT_1   0x00000004
    #define XUN_MCR_RTS   0x00000002
    #define XUN_MCR_DTR   0x00000001
    Line Status Register(LSR) mask(s)

    +

    #define XUN_LSR_RX_FIFO_ERROR   0x00000080
    #define XUN_LSR_TX_EMPTY   0x00000040
    #define XUN_LSR_TX_BUFFER_EMPTY   0x00000020
    #define XUN_LSR_BREAK_INT   0x00000010
    #define XUN_LSR_FRAMING_ERROR   0x00000008
    #define XUN_LSR_PARITY_ERROR   0x00000004
    #define XUN_LSR_OVERRUN_ERROR   0x00000002
    #define XUN_LSR_DATA_READY   0x00000001
    #define XUN_LSR_ERROR_BREAK   0x0000001E

    Functions

    void XUartNs550_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartNs550_RecvByte (u32 BaseAddress)
    void XUartNs550_SetBaud (u32 BaseAddress, u32 InputClockHz, u32 BaudRate)
    +

    Detailed Description

    +

    This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation. High-level driver functions are defined in xuartns550.h.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date	 Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date	 Changes
  ----- ---- -------- -----------------------------------------------
  1.00b jhl  04/24/02 First release
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
@@ -33,1729 +130,1116 @@ This header file contains identifiers and low-level driver functions (or macros)
  2.00a ktn  10/20/09 Converted all register accesses to 32 bit access.
 		      Updated to use HAL Processor APIs. _m is removed from the
 		      name of all the macro definitions.
-
    -

    -#include "xil_types.h"
    -#include "xil_assert.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

    Register Map

    Register offsets for the 16450/16550 compatible UART device.

    #define XUN_RBR_OFFSET   (XUN_REG_OFFSET)
    #define XUN_THR_OFFSET   (XUN_REG_OFFSET)
    #define XUN_IER_OFFSET   (XUN_REG_OFFSET + 0x04)
    #define XUN_IIR_OFFSET   (XUN_REG_OFFSET + 0x08)
    #define XUN_FCR_OFFSET   (XUN_REG_OFFSET + 0x08)
    #define XUN_LCR_OFFSET   (XUN_REG_OFFSET + 0x0C)
    #define XUN_MCR_OFFSET   (XUN_REG_OFFSET + 0x10)
    #define XUN_LSR_OFFSET   (XUN_REG_OFFSET + 0x14)
    #define XUN_MSR_OFFSET   (XUN_REG_OFFSET + 0x18)
    #define XUN_DRLS_OFFSET   (XUN_REG_OFFSET + 0x00)
    #define XUN_DRLM_OFFSET   (XUN_REG_OFFSET + 0x04)

    Interrupt Enable Register (IER) mask(s)

    #define XUN_IER_MODEM_STATUS   0x00000008
    #define XUN_IER_RX_LINE   0x00000004
    #define XUN_IER_TX_EMPTY   0x00000002
    #define XUN_IER_RX_DATA   0x00000001

    Interrupt ID Register (INT_ID) mask(s)

    #define XUN_INT_ID_MASK   0x0000000F
    #define XUN_INT_ID_FIFOS_ENABLED   0x000000C0

    FIFO Control Register mask(s)

    #define XUN_FIFO_RX_TRIG_MSB   0x00000080
    #define XUN_FIFO_RX_TRIG_LSB   0x00000040
    #define XUN_FIFO_TX_RESET   0x00000004
    #define XUN_FIFO_RX_RESET   0x00000002
    #define XUN_FIFO_ENABLE   0x00000001
    #define XUN_FIFO_RX_TRIGGER   0x000000C0

    Line Control Register(LCR) mask(s)

    #define XUN_LCR_DLAB   0x00000080
    #define XUN_LCR_SET_BREAK   0x00000040
    #define XUN_LCR_STICK_PARITY   0x00000020
    #define XUN_LCR_EVEN_PARITY   0x00000010
    #define XUN_LCR_ENABLE_PARITY   0x00000008
    #define XUN_LCR_2_STOP_BITS   0x00000004
    #define XUN_LCR_8_DATA_BITS   0x00000003
    #define XUN_LCR_7_DATA_BITS   0x00000002
    #define XUN_LCR_6_DATA_BITS   0x00000001
    #define XUN_LCR_LENGTH_MASK   0x00000003
    #define XUN_LCR_PARITY_MASK   0x00000018

    Mode Control Register(MCR) mask(s)

    #define XUN_MCR_LOOP   0x00000010
    #define XUN_MCR_OUT_2   0x00000008
    #define XUN_MCR_OUT_1   0x00000004
    #define XUN_MCR_RTS   0x00000002
    #define XUN_MCR_DTR   0x00000001

    Line Status Register(LSR) mask(s)

    #define XUN_LSR_RX_FIFO_ERROR   0x00000080
    #define XUN_LSR_TX_EMPTY   0x00000040
    #define XUN_LSR_TX_BUFFER_EMPTY   0x00000020
    #define XUN_LSR_BREAK_INT   0x00000010
    #define XUN_LSR_FRAMING_ERROR   0x00000008
    #define XUN_LSR_PARITY_ERROR   0x00000004
    #define XUN_LSR_OVERRUN_ERROR   0x00000002
    #define XUN_LSR_DATA_READY   0x00000001
    #define XUN_LSR_ERROR_BREAK   0x0000001E

    Defines

    #define XUartNs550_ReadReg(BaseAddress, RegOffset)   Xil_In32((BaseAddress) + (RegOffset))
    #define XUartNs550_WriteReg(BaseAddress, RegOffset, RegisterValue)   Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
    #define XUartNs550_GetLineStatusReg(BaseAddress)   XUartNs550_ReadReg((BaseAddress), XUN_LSR_OFFSET)
    #define XUartNs550_GetLineControlReg(BaseAddress)   XUartNs550_ReadReg((BaseAddress), XUN_LCR_OFFSET)
    #define XUartNs550_SetLineControlReg(BaseAddress, RegisterValue)   XUartNs550_WriteReg((BaseAddress), XUN_LCR_OFFSET, (RegisterValue))
    #define XUartNs550_EnableIntr(BaseAddress)
    #define XUartNs550_DisableIntr(BaseAddress)
    #define XUartNs550_IsReceiveData(BaseAddress)   (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_DATA_READY)
    #define XUartNs550_IsTransmitEmpty(BaseAddress)   (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_TX_BUFFER_EMPTY)

    Functions

    void XUartNs550_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartNs550_RecvByte (u32 BaseAddress)
    void XUartNs550_SetBaud (u32 BaseAddress, u32 InputClockHz, u32 BaudRate)
    -

    Define Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_DisableIntr ( BaseAddress   ) #define XUartNs550_DisableIntr(BaseAddress  ) 
    -
    - - - - - -
    -   - - -

    -Value:

    XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET,              \
-                        XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) & \
-                        ~(XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
-
    Disable the transmit and receive interrupts of the UART.

    -

    Parameters:
    + +
    +Value:
    XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET,              \
+                        XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) & \
+                        ~(XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
+

    Disable the transmit and receive interrupts of the UART.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    None.
    -
    Note:
    C-Style signature: void XUartNs550_DisableIntr(u32 BaseAddress);,
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartNs550_DisableIntr(u32 BaseAddress);,
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_EnableIntr ( BaseAddress   ) #define XUartNs550_EnableIntr(BaseAddress  ) 
    -
    - - - - - -
    -   - - -

    -Value:

    XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET,              \
-                         XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) | \
-                         (XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
-
    Enable the transmit and receive interrupts of the UART.

    -

    Parameters:
    + +
    +Value:
    XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET,              \
+                         XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) | \
+                         (XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
+

    Enable the transmit and receive interrupts of the UART.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    None.
    -
    Note:
    C-Style signature: void XUartNs550_EnableIntr(u32 BaseAddress);,
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartNs550_EnableIntr(u32 BaseAddress);,
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_GetLineControlReg ( BaseAddress   )    XUartNs550_ReadReg((BaseAddress), XUN_LCR_OFFSET)#define XUartNs550_GetLineControlReg(BaseAddress  )    XUartNs550_ReadReg((BaseAddress), XUN_LCR_OFFSET)
    -
    - - - - - -
    -   - - -

    -Get the UART Line Status Register.

    -

    Parameters:
    + +
    +

    Get the UART Line Status Register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    The value read from the register.
    -
    Note:
    C-Style signature: u32 XUartNs550_GetLineControlReg(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    The value read from the register.
    +
    Note:
    C-Style signature: u32 XUartNs550_GetLineControlReg(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_GetLineStatusReg ( BaseAddress   )    XUartNs550_ReadReg((BaseAddress), XUN_LSR_OFFSET)#define XUartNs550_GetLineStatusReg(BaseAddress  )    XUartNs550_ReadReg((BaseAddress), XUN_LSR_OFFSET)
    -
    - - - - - -
    -   - - -

    -Get the UART Line Status Register.

    -

    Parameters:
    + +
    +

    Get the UART Line Status Register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    The value read from the register.
    -
    Note:
    C-Style signature: u32 XUartNs550_GetLineStatusReg(u32 BaseAddress);
    -
    -

    - - - - -
    - +
    Returns:
    The value read from the register.
    +
    Note:
    C-Style signature: u32 XUartNs550_GetLineStatusReg(u32 BaseAddress);
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_IsReceiveData ( BaseAddress   )    (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_DATA_READY)#define XUartNs550_IsReceiveData(BaseAddress  )    (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_DATA_READY)
    -
    - - - - - -
    -   - - -

    -Determine if there is receive data in the receiver and/or FIFO.

    -

    Parameters:
    + +
    +

    Determine if there is receive data in the receiver and/or FIFO.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    TRUE if there is receive data, FALSE otherwise.
    -
    Note:
    C-Style signature: int XUartNs550_IsReceiveData(u32 BaseAddress);,
    -
    -

    - - - - -
    - +
    Returns:
    TRUE if there is receive data, FALSE otherwise.
    +
    Note:
    C-Style signature: int XUartNs550_IsReceiveData(u32 BaseAddress);,
    + + + + +
    +
    +
    - - - - - - + + + + + +
    #define XUartNs550_IsTransmitEmpty ( BaseAddress   )    (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_TX_BUFFER_EMPTY)#define XUartNs550_IsTransmitEmpty(BaseAddress  )    (XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_TX_BUFFER_EMPTY)
    -
    - - - - - -
    -   - - -

    -Determine if a byte of data can be sent with the transmitter.

    -

    Parameters:
    + +
    +

    Determine if a byte of data can be sent with the transmitter.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    TRUE if a byte can be sent, FALSE otherwise.
    -
    Note:
    C-Style signature: int XUartNs550_IsTransmitEmpty(u32 BaseAddress);,
    -
    -

    - - - - -
    - +
    Returns:
    TRUE if a byte can be sent, FALSE otherwise.
    +
    Note:
    C-Style signature: int XUartNs550_IsTransmitEmpty(u32 BaseAddress);,
    + + + + +
    +
    +
    - - - - - - - - - +
    #define XUartNs550_ReadReg ( BaseAddress,
    RegOffset   )    Xil_In32((BaseAddress) + (RegOffset))#define XUARTNS550_L_H
    -
    - - - - - -
    -   - + +
    -

    -Read a UART register.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + + + + + + +
    #define XUartNs550_ReadReg(BaseAddress,
    RegOffset  )    Xil_In32((BaseAddress) + (RegOffset))
    +
    +
    +

    Read a UART register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    RegOffset contains the offset from the 1st register of the device to select the specific register.
    +
    -
    Returns:
    The value read from the register.
    -
    Note:
    C-Style signature: u32 XUartNs550_ReadReg(u32 BaseAddress, u32 RegOffset);
    -
    -

    - - - - -
    - +
    Returns:
    The value read from the register.
    +
    Note:
    C-Style signature: u32 XUartNs550_ReadReg(u32 BaseAddress, u32 RegOffset);
    + + + + +
    +
    +
    - - - - - - - - - + + + + + + + + + + +
    #define XUartNs550_SetLineControlReg ( BaseAddress,
    RegisterValue   )    XUartNs550_WriteReg((BaseAddress), XUN_LCR_OFFSET, (RegisterValue))#define XUartNs550_SetLineControlReg(BaseAddress,
    RegisterValue  )    XUartNs550_WriteReg((BaseAddress), XUN_LCR_OFFSET, (RegisterValue))
    -
    - - - - - -
    -   - - -

    -Set the UART Line Status Register.

    -

    Parameters:
    + +
    +

    Set the UART Line Status Register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    RegisterValue is the value to be written to the register.
    +
    -
    Returns:
    None.
    -
    Note:
    C-Style signature: void XUartNs550_SetLineControlReg(u32 BaseAddress, u32 RegisterValue);
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartNs550_SetLineControlReg(u32 BaseAddress, u32 RegisterValue);
    + + + + +
    +
    +
    - - - - - - - - - - - - + + + + + + + + + + + + + + + +
    #define XUartNs550_WriteReg ( BaseAddress,
    RegOffset,
    RegisterValue   )    Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))#define XUartNs550_WriteReg(BaseAddress,
    RegOffset,
    RegisterValue  )    Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
    -
    - - - - - -
    -   - - -

    -Write to a UART register.

    -

    Parameters:
    + +
    +

    Write to a UART register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    RegOffset contains the offset from the 1st register of the device to select the specific register.
    RegisterValue is the value to be written to the regsiter.
    +
    -
    Returns:
    None.
    -
    Note:
    C-Style signature: u32 XUartNs550_WriteReg(u32 BaseAddress, u32 RegOffset, u32 RegisterValue);
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    C-Style signature: u32 XUartNs550_WriteReg(u32 BaseAddress, u32 RegOffset, u32 RegisterValue);
    + + + + +
    +
    +
    - +
    #define XUN_DRLM_OFFSET   (XUN_REG_OFFSET + 0x04) #define XUN_DIVISOR_BYTE_MASK   0x000000FF
    -
    - - - - - -
    -   - + +
    -

    -Divisor Register MSB

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_DRLS_OFFSET   (XUN_REG_OFFSET + 0x00) #define XUN_DRLM_OFFSET   (XUN_REG_OFFSET + 0x04)
    -
    - - - - - -
    -   - + +
    +

    Divisor Register MSB

    -

    -Divisor Register LSB

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FCR_OFFSET   (XUN_REG_OFFSET + 0x08) #define XUN_DRLS_OFFSET   (XUN_REG_OFFSET + 0x00)
    -
    - - - - - -
    -   - + +
    +

    Divisor Register LSB

    -

    -Fifo control, write only

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_ENABLE   0x00000001 #define XUN_FCR_OFFSET   (XUN_REG_OFFSET + 0x08)
    -
    - - - - - -
    -   - + +
    +

    Fifo control, write only

    -

    -Enable the FIFOs

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_RX_RESET   0x00000002 #define XUN_FIFO_ENABLE   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Enable the FIFOs

    -

    -Reset the receive FIFO

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_RX_TRIG_LSB   0x00000040 #define XUN_FIFO_RX_RESET   0x00000002
    -
    - - - - - -
    -   - + +
    +

    Reset the receive FIFO

    -

    -Trigger level LSB

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_RX_TRIG_MSB   0x00000080 #define XUN_FIFO_RX_TRIG_LSB   0x00000040
    -
    - - - - - -
    -   - + +
    +

    Trigger level LSB

    -

    -Trigger level MSB

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_RX_TRIGGER   0x000000C0 #define XUN_FIFO_RX_TRIG_MSB   0x00000080
    -
    - - - - - -
    -   - + +
    +

    Trigger level MSB

    -

    -Both trigger level bits

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_FIFO_TX_RESET   0x00000004 #define XUN_FIFO_RX_TRIGGER   0x000000C0
    -
    - - - - - -
    -   - + +
    +

    Both trigger level bits

    -

    -Reset the transmit FIFO

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IER_MODEM_STATUS   0x00000008 #define XUN_FIFO_SIZE   16
    -
    - - - - - -
    -   - + +
    -

    -Modem status interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IER_OFFSET   (XUN_REG_OFFSET + 0x04) #define XUN_FIFO_TX_RESET   0x00000004
    -
    - - - - - -
    -   - + +
    +

    Reset the transmit FIFO

    -

    -Interrupt enable

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IER_RX_DATA   0x00000001 #define XUN_IER_MODEM_STATUS   0x00000008
    -
    - - - - - -
    -   - + +
    +

    Modem status interrupt

    -

    -Receiver data available

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IER_RX_LINE   0x00000004 #define XUN_IER_OFFSET   (XUN_REG_OFFSET + 0x04)
    -
    - - - - - -
    -   - + +
    +

    Interrupt enable

    -

    -Receive status interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IER_TX_EMPTY   0x00000002 #define XUN_IER_RX_DATA   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Receiver data available

    -

    -Transmitter empty interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_IIR_OFFSET   (XUN_REG_OFFSET + 0x08) #define XUN_IER_RX_LINE   0x00000004
    -
    - - - - - -
    -   - + +
    +

    Receive status interrupt

    -

    -Interrupt id, read only

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_INT_ID_FIFOS_ENABLED   0x000000C0 #define XUN_IER_TX_EMPTY   0x00000002
    -
    - - - - - -
    -   - + +
    +

    Transmitter empty interrupt

    -

    -Only the FIFOs enable

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_INT_ID_MASK   0x0000000F #define XUN_IIR_OFFSET   (XUN_REG_OFFSET + 0x08)
    -
    - - - - - -
    -   - + +
    +

    Interrupt id, read only

    -

    -Only the interrupt ID

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_2_STOP_BITS   0x00000004 #define XUN_INT_ID_FIFOS_ENABLED   0x000000C0
    -
    - - - - - -
    -   - + +
    +

    Only the FIFOs enable

    -

    -1= 2 stop bits,0 = 1 stop bit

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_6_DATA_BITS   0x00000001 #define XUN_INT_ID_MASK   0x0000000F
    -
    - - - - - -
    -   - + +
    +

    Only the interrupt ID

    -

    -6 Data bits selection

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_7_DATA_BITS   0x00000002 #define XUN_LCR_2_STOP_BITS   0x00000004
    -
    - - - - - -
    -   - + +
    +

    1= 2 stop bits,0 = 1 stop bit

    -

    -7 Data bits selection

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_8_DATA_BITS   0x00000003 #define XUN_LCR_6_DATA_BITS   0x00000001
    -
    - - - - - -
    -   - + +
    +

    6 Data bits selection

    -

    -8 Data bits selection

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_DLAB   0x00000080 #define XUN_LCR_7_DATA_BITS   0x00000002
    -
    - - - - - -
    -   - + +
    +

    7 Data bits selection

    -

    -Divisor latch access

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_ENABLE_PARITY   0x00000008 #define XUN_LCR_8_DATA_BITS   0x00000003
    -
    - - - - - -
    -   - + +
    +

    8 Data bits selection

    -

    -1 = Enable, 0 = Disable parity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_EVEN_PARITY   0x00000010 #define XUN_LCR_DLAB   0x00000080
    -
    - - - - - -
    -   - + +
    +

    Divisor latch access

    -

    -1 = even, 0 = odd parity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_LENGTH_MASK   0x00000003 #define XUN_LCR_ENABLE_PARITY   0x00000008
    -
    - - - - - -
    -   - + +
    +

    1 = Enable, 0 = Disable parity

    -

    -Both length bits mask

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_OFFSET   (XUN_REG_OFFSET + 0x0C) #define XUN_LCR_EVEN_PARITY   0x00000010
    -
    - - - - - -
    -   - + +
    +

    1 = even, 0 = odd parity

    -

    -Line Control Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_PARITY_MASK   0x00000018 #define XUN_LCR_LENGTH_MASK   0x00000003
    -
    - - - - - -
    -   - + +
    +

    Both length bits mask

    -

    -Both parity bits mask

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_SET_BREAK   0x00000040 #define XUN_LCR_OFFSET   (XUN_REG_OFFSET + 0x0C)
    -
    - - - - - -
    -   - + +
    +

    Line Control Register

    -

    -Cause a break condition

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LCR_STICK_PARITY   0x00000020 #define XUN_LCR_PARITY_MASK   0x00000018
    -
    - - - - - -
    -   - + +
    +

    Both parity bits mask

    -

    -Stick Parity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_BREAK_INT   0x00000010 #define XUN_LCR_SET_BREAK   0x00000040
    -
    - - - - - -
    -   - + +
    +

    Cause a break condition

    -

    -Break detected interrupt

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_DATA_READY   0x00000001 #define XUN_LCR_STICK_PARITY   0x00000020
    -
    - - - - - -
    -   - + +
    +

    Stick Parity

    -

    -Receive data ready

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_ERROR_BREAK   0x0000001E #define XUN_LSR_BREAK_INT   0x00000010
    -
    - - - - - -
    -   - + +
    +

    Break detected interrupt

    -

    -Errors except FIFO error and break detected

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_FRAMING_ERROR   0x00000008 #define XUN_LSR_DATA_READY   0x00000001
    -
    - - - - - -
    -   - + +
    +

    Receive data ready

    -

    -Framing error on current byte

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_OFFSET   (XUN_REG_OFFSET + 0x14) #define XUN_LSR_ERROR_BREAK   0x0000001E
    -
    - - - - - -
    -   - + +
    +

    Errors except FIFO error and break detected

    -

    -Line Status Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_OVERRUN_ERROR   0x00000002 #define XUN_LSR_FRAMING_ERROR   0x00000008
    -
    - - - - - -
    -   - + +
    +

    Framing error on current byte

    -

    -Overrun error on receive FIFO

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_PARITY_ERROR   0x00000004 #define XUN_LSR_OFFSET   (XUN_REG_OFFSET + 0x14)
    -
    - - - - - -
    -   - + +
    +

    Line Status Register

    -

    -Parity error on current byte

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_RX_FIFO_ERROR   0x00000080 #define XUN_LSR_OVERRUN_ERROR   0x00000002
    -
    - - - - - -
    -   - + +
    +

    Overrun error on receive FIFO

    -

    -An errored byte is in FIFO

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_TX_BUFFER_EMPTY   0x00000020 #define XUN_LSR_PARITY_ERROR   0x00000004
    -
    - - - - - -
    -   - + +
    +

    Parity error on current byte

    -

    -Transmit holding reg empty

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_LSR_TX_EMPTY   0x00000040 #define XUN_LSR_RX_FIFO_ERROR   0x00000080
    -
    - - - - - -
    -   - + +
    +

    An errored byte is in FIFO

    -

    -Transmitter is empty

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_DTR   0x00000001 #define XUN_LSR_TX_BUFFER_EMPTY   0x00000020
    -
    - - - - - -
    -   - + +
    +

    Transmit holding reg empty

    -

    -DTR signal

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_LOOP   0x00000010 #define XUN_LSR_TX_EMPTY   0x00000040
    -
    - - - - - -
    -   - + +
    +

    Transmitter is empty

    -

    -Local loopback

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_OFFSET   (XUN_REG_OFFSET + 0x10) #define XUN_MCR_DTR   0x00000001
    -
    - - - - - -
    -   - + +
    +

    DTR signal

    -

    -Modem Control Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_OUT_1   0x00000004 #define XUN_MCR_LOOP   0x00000010
    -
    - - - - - -
    -   - + +
    +

    Local loopback

    -

    -General output 1 signal

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_OUT_2   0x00000008 #define XUN_MCR_OFFSET   (XUN_REG_OFFSET + 0x10)
    -
    - - - - - -
    -   - + +
    +

    Modem Control Register

    -

    -General output 2 signal

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MCR_RTS   0x00000002 #define XUN_MCR_OUT_1   0x00000004
    -
    - - - - - -
    -   - + +
    +

    General output 1 signal

    -

    -RTS signal

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_MSR_OFFSET   (XUN_REG_OFFSET + 0x18) #define XUN_MCR_OUT_2   0x00000008
    -
    - - - - - -
    -   - + +
    +

    General output 2 signal

    -

    -Modem Status Register

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_RBR_OFFSET   (XUN_REG_OFFSET) #define XUN_MCR_RTS   0x00000002
    -
    - - - - - -
    -   - + +
    +

    RTS signal

    -

    -Receive buffer, read only

    -

    - - - - -
    - + + + +
    +
    +
    - +
    #define XUN_THR_OFFSET   (XUN_REG_OFFSET) #define XUN_MSR_OFFSET   (XUN_REG_OFFSET + 0x18)
    -
    - - - - - -
    -   - + +
    +

    Modem Status Register

    -

    -Transmit holding register

    -

    Function Documentation

    -

    - - - - -
    - + + + +
    +
    +
    - - - - - - +
    u8 XUartNs550_RecvByte ( u32  BaseAddress  ) #define XUN_RBR_OFFSET   (XUN_REG_OFFSET)
    -
    - - - - - -
    -   - + +
    +

    Receive buffer, read only

    -

    -This function receives a byte from the UART. It operates in a polling mode and blocks until a byte of data is received.

    -

    Parameters:
    +
    + + +
    +
    + + + + +
    #define XUN_REG_OFFSET   0x1000
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUN_THR_OFFSET   (XUN_REG_OFFSET)
    +
    +
    +

    Transmit holding register

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    u8 XUartNs550_RecvByte (u32  BaseAddress ) 
    +
    +
    +

    This function receives a byte from the UART. It operates in a polling mode and blocks until a byte of data is received.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    +
    -
    Returns:
    The data byte received by the UART.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The data byte received by the UART.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_SendByte ( u32  BaseAddress, void XUartNs550_SendByte (u32  BaseAddress,
    u8  Datau8  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sends a data byte with the UART. This function operates in the polling mode and blocks until the data has been put into the UART transmit holding register.

    -

    Parameters:
    + +
    +

    This function sends a data byte with the UART. This function operates in the polling mode and blocks until the data has been put into the UART transmit holding register.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    Data contains the data byte to be sent.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_SetBaud ( u32  BaseAddress, void XUartNs550_SetBaud (u32  BaseAddress,
    u32  InputClockHz, u32  InputClockHz,
    u32  BaudRateu32  BaudRate 
    ) )
    -
    - - - - - -
    -   - - -

    -Set the baud rate for the UART.

    -

    Parameters:
    + +
    +

    Set the baud rate for the UART.

    +
    Parameters:
    BaseAddress contains the base address of the UART.
    InputClockHz is the frequency of the input clock to the device in Hertz.
    BaudRate is the baud rate to be set.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__options_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__options_8c.html index 3bec2f10..153b5693 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__options_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__options_8c.html @@ -2,30 +2,52 @@ - xuartns550_options.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_options.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_options.c File Reference

    Detailed Description

    -The implementation of the options functions for the XUartNs550 driver.

    + + +

    +
    +

    xuartns550_options.c File Reference

    #include "xuartns550.h"
    +#include "xuartns550_i.h"
    +#include "xil_io.h"
    + + + + + + + + + + + + + +

    Classes

    struct  Mapping

    Defines

    #define XUN_NUM_OPTIONS   (sizeof(OptionsTable) / sizeof(Mapping))

    Functions

    u16 XUartNs550_GetOptions (XUartNs550 *InstancePtr)
    int XUartNs550_SetOptions (XUartNs550 *InstancePtr, u16 Options)
    u8 XUartNs550_GetFifoThreshold (XUartNs550 *InstancePtr)
    int XUartNs550_SetFifoThreshold (XUartNs550 *InstancePtr, u8 TriggerLevel)
    u8 XUartNs550_GetLastErrors (XUartNs550 *InstancePtr)
    u8 XUartNs550_GetModemStatus (XUartNs550 *InstancePtr)
    int XUartNs550_IsSending (XUartNs550 *InstancePtr)
    +

    Detailed Description

    +

    The implementation of the options functions for the XUartNs550 driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
  1.00b rpm  04/12/05 Added critical section protection in ReadFcrRegister
@@ -35,307 +57,245 @@ The implementation of the options functions for the xuartns550_i.h"
    
-#include "xil_io.h"
    
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-

    Functions
    u16 XUartNs550_GetOptions (XUartNs550 *InstancePtr)
    int XUartNs550_SetOptions (XUartNs550 *InstancePtr, u16 Options)
    u8 XUartNs550_GetFifoThreshold (XUartNs550 *InstancePtr)
    int XUartNs550_SetFifoThreshold (XUartNs550 *InstancePtr, u8 TriggerLevel)
    u8 XUartNs550_GetLastErrors (XUartNs550 *InstancePtr)
    u8 XUartNs550_GetModemStatus (XUartNs550 *InstancePtr)
    int XUartNs550_IsSending (XUartNs550 *InstancePtr)
    
-
    Function Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+ 
    Define Documentation
    
+
+
    
+
    
+      
     
    
-          
-          
-          
-          
-          
-          
+          
    
         
    u8 XUartNs550_GetFifoThreshold           ( XUartNs550 *  InstancePtr           ) #define XUN_NUM_OPTIONS   (sizeof(OptionsTable) / sizeof(Mapping))
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.
    
-
    Parameters:
    
+
    
+
+
    Function Documentation
    
+
+
    
+
    
+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
    u8 XUartNs550_GetFifoThreshold (XUartNs550 *  InstancePtr ) 
    
+
    
+
    
+
    This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartNs550 instance.
    
   
    
+  
    
 
    
-
    Returns:
    The current receive FIFO trigger level. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The current receive FIFO trigger level. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    u8 XUartNs550_GetLastErrors           ( XUartNs550 *  InstancePtr           ) u8 XUartNs550_GetLastErrors (XUartNs550 *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function returns the last errors that have occurred in the specified UART. It also clears the errors such that they cannot be retrieved again. The errors include parity error, receive overrun error, framing error, and break detection.
    
-The last errors is an accumulation of the errors each time an error is discovered in the driver. A status is checked for each received byte and this status is accumulated in the last errors.
    
-If this function is called after receiving a buffer of data, it will indicate any errors that occurred for the bytes of the buffer. It does not indicate which bytes contained errors.
    
-
    Parameters:
    
+
+
    
+
    This function returns the last errors that have occurred in the specified UART. It also clears the errors such that they cannot be retrieved again. The errors include parity error, receive overrun error, framing error, and break detection.
    
+
    The last errors is an accumulation of the errors each time an error is discovered in the driver. A status is checked for each received byte and this status is accumulated in the last errors.
    
+
    If this function is called after receiving a buffer of data, it will indicate any errors that occurred for the bytes of the buffer. It does not indicate which bytes contained errors.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartNs550 instance.
    
   
    
+  
    
 
    
-
    Returns:
    The last errors that occurred. The errors are bit masks that are contained in the file xuartns550.h and named XUN_ERROR_*.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The last errors that occurred. The errors are bit masks that are contained in the file xuartns550.h and named XUN_ERROR_*.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    u8 XUartNs550_GetModemStatus           ( XUartNs550 *  InstancePtr           ) u8 XUartNs550_GetModemStatus (XUartNs550 *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.
    
-
    Parameters:
    
+
+
    
+
    This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartNs550 instance .
    
   
    
+  
    
 
    
-
    Returns:
    The modem status which are bit masks that are contained in the file xuartns550.h and named XUN_MODEM_*.
    
-
    Note:
    
-The bit masks used for the modem status are the exact bits of the modem status register with no abstraction.     
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The modem status which are bit masks that are contained in the file xuartns550.h and named XUN_MODEM_*.
    
+
    Note:
    
+
    The bit masks used for the modem status are the exact bits of the modem status register with no abstraction. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    u16 XUartNs550_GetOptions           ( XUartNs550 *  InstancePtr           ) u16 XUartNs550_GetOptions (XUartNs550 *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.
    
-
    Parameters:
    
+
+
    
+
    Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartNs550 instance.
    
   
    
+  
    
 
    
-
    Returns:
    The current options for the UART. The optionss are bit masks that are contained in the file xuartns550.h and named XUN_OPTION_*.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The current options for the UART. The optionss are bit masks that are contained in the file xuartns550.h and named XUN_OPTION_*.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    int XUartNs550_IsSending           ( XUartNs550 *  InstancePtr           ) int XUartNs550_IsSending (XUartNs550 *  InstancePtr ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.
    
-
    Parameters:
    
+
+
    
+
    This function determines if the specified UART is sending data. If the transmitter register is not empty, it is sending data.
    
+
    Parameters:
    
   
    
     
    InstancePtr is a pointer to the XUartNs550 instance.
    
   
    
+  
    
 
    
-
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    A value of TRUE if the UART is sending data, otherwise FALSE.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
+          
+          
+          
    
         
    int XUartNs550_SetFifoThreshold           ( XUartNs550 *  InstancePtr, int XUartNs550_SetFifoThreshold (XUartNs550 *  InstancePtr, 
         
    
         
    u8  TriggerLevelu8  TriggerLevel 
         
    
         
    ) )
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated. The FIFOs must be enabled to set the trigger level.
    
-
    Parameters:
    
+
+
    
+
    This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated. The FIFOs must be enabled to set the trigger level.
    
+
    Parameters:
    
   
-    
+    
    
     
    InstancePtr is a pointer to the XUartNs550 instance. 
    TriggerLevel contains the trigger level to set. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    TriggerLevel contains the trigger level to set. Constants which define each trigger level are contained in the file xuartns550.h and named XUN_FIFO_TRIGGER_*.
    
   
    
+  
    
 
    
-
    Returns:
      
-
    • XST_SUCCESS if the trigger level was set
    • XST_UART_CONFIG_ERROR if the trigger level could not be set, either the hardware does not support the FIFOs or FIFOs are not enabled
    
+
    Returns:
      
+
    • XST_SUCCESS if the trigger level was set
      • 
+
    • XST_UART_CONFIG_ERROR if the trigger level could not be set, either the hardware does not support the FIFOs or FIFOs are not enabled
      • 
+
    
 
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
+          
+          
+          
    
         
    int XUartNs550_SetOptions           ( XUartNs550 *  InstancePtr, int XUartNs550_SetOptions (XUartNs550 *  InstancePtr, 
         
    
         
    u16  Optionsu16  Options 
         
    
         
    ) )
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.
    
-The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.
    
-
    Parameters:
    
+
+
    
+
    Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.
    
+
    The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.
    
+
    Parameters:
    
   
-    
+    
    
     
    InstancePtr is a pointer to the XUartNs550 instance. 
    Options contains the options to be set which are bit masks contained in the file xuartns550.h and named XUN_OPTION_*.
    Options contains the options to be set which are bit masks contained in the file xuartns550.h and named XUN_OPTION_*.
    
   
    
+  
    
 
    
-
    Returns:
      
-
    • XST_SUCCESS if the options were set successfully.
    • XST_UART_CONFIG_ERROR if the options could not be set because the hardware does not support FIFOs
    
+
    Returns:
      
+
    • XST_SUCCESS if the options were set successfully.
      • 
+
    • XST_UART_CONFIG_ERROR if the options could not be set because the hardware does not support FIFOs
      • 
+
    
 
    
-
    Note:
    None. 
    
-    
    
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
+
    Note:
    None. 
    
+
+
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__selftest_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__selftest_8c.html index 82768c81..486479a0 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__selftest_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__selftest_8c.html @@ -2,30 +2,45 @@ - xuartns550_selftest.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_selftest.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_selftest.c File Reference

    Detailed Description

    -This file contains the self-test functions for the 16450/16550 UART driver.

    + + +

    +
    +

    xuartns550_selftest.c File Reference

    #include "xstatus.h"
    +#include "xuartns550.h"
    +#include "xuartns550_i.h"
    +#include "xil_io.h"
    + + + + + +

    Defines

    #define XUN_TOTAL_BYTES   32

    Functions

    int XUartNs550_SelfTest (XUartNs550 *InstancePtr)
    +

    Detailed Description

    +

    This file contains the self-test functions for the 16450/16550 UART driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date	 Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date	 Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
@@ -34,58 +49,56 @@ This file contains the self-test functions for the 16450/16550 UART driver.
    
 		      Updated to use HAL Processor APIs. _m is removed from the
 		      name of all the macro definitions.
  2.01a bss  01/13/12 Updated the XUartNs550_SelfTest to use Xil_AssertNonvoid
-		      in place of XASSERT_NONVOID for CR 641344.

    -
    -

    -#include "xstatus.h"
    -#include "xuartns550.h"
    -#include "xuartns550_i.h"
    -#include "xil_io.h"
    - - - - - -

    Functions

    int XUartNs550_SelfTest (XUartNs550 *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - + in place of XASSERT_NONVOID for CR 641344.

    Define Documentation

    + +
    +
    +
    - - - - - - +
    int XUartNs550_SelfTest ( XUartNs550 *  InstancePtr  ) #define XUN_TOTAL_BYTES   32
    -
    - - - - - -
    -   - + +
    -

    -This functions runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    -The statistics are cleared at the end of the test. The time for this test to execute is proportional to the baud rate that has been set prior to calling this function.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    int XUartNs550_SelfTest (XUartNs550 *  InstancePtr ) 
    +
    +
    +

    This functions runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    +

    The statistics are cleared at the end of the test. The time for this test to execute is proportional to the baud rate that has been set prior to calling this function.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the test was successful
    • XST_UART_TEST_FAIL if the test failed looping back the data
    -

    -

    Note:
    This function can hang if the hardware is not functioning properly.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

  • XST_SUCCESS if the test was successful
    • +
  • XST_UART_TEST_FAIL if the test failed looping back the data
    • + +
    Note:
    This function can hang if the hardware is not functioning properly.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__sinit_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__sinit_8c.html index b6faecad..9e60dbd3 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__sinit_8c.html @@ -2,131 +2,135 @@ - xuartns550_sinit.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_sinit.c File Reference

    Detailed Description

    -The implementation of the XUartNs550 component's static initialzation functionality.

    + + +

    +
    +

    xuartns550_sinit.c File Reference

    #include "xstatus.h"
    +#include "xparameters.h"
    +#include "xuartns550_i.h"
    + + + + + + +

    Defines

    #define XPAR_DEFAULT_BAUD_RATE   19200

    Functions

    XUartNs550_Config * XUartNs550_LookupConfig (u16 DeviceId)
    int XUartNs550_Initialize (XUartNs550 *InstancePtr, u16 DeviceId)
    +

    Detailed Description

    +

    The implementation of the XUartNs550 component's static initialzation functionality.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date	 Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date	 Changes
  ----- ---- -------- -----------------------------------------------
  1.01a jvb  10/13/05 First release
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
- 2.00a ktn  10/20/09 Updated to use HAL Processor APIs.

    -
    -

    -#include "xstatus.h"
    -#include "xparameters.h"
    -#include "xuartns550_i.h"
    - - - - - - - -

    Functions

    XUartNs550_Config * XUartNs550_LookupConfig (u16 DeviceId)
    int XUartNs550_Initialize (XUartNs550 *InstancePtr, u16 DeviceId)
    -

    Function Documentation

    -

    - - - - -
    - + 2.00a ktn 10/20/09 Updated to use HAL Processor APIs.

    Define Documentation

    + +
    +
    +
    - - - - - - - - - - - - - - - +
    int XUartNs550_Initialize ( XUartNs550 *  InstancePtr,
    u16  DeviceId
    ) #define XPAR_DEFAULT_BAUD_RATE   19200
    -
    - - - - - -
    -   - + +
    -

    -Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by XPAR_DEFAULT_BAUD_RATE if the symbol is defined, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartNs550_Initialize (XUartNs550 *  InstancePtr,
    u16  DeviceId 
    )
    +
    +
    +

    Initializes a specific XUartNs550 instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by XPAR_DEFAULT_BAUD_RATE if the symbol is defined, otherwise it is set to 19.2K baud. If the device has FIFOs (16550), they are enabled and the a receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance .
    DeviceId is the unique id of the device controlled by this XUartNs550 instance. Passing in a device id associates the generic XUartNs550 instance to a specific device, as chosen by the caller or application developer.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if initialization was successful
    • XST_DEVICE_NOT_FOUND if the device ID could not be found in the configuration table
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error
    -

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
  • XST_SUCCESS if initialization was successful
    • +
  • XST_DEVICE_NOT_FOUND if the device ID could not be found in the configuration table
    • +
  • XST_UART_BAUD_ERROR if the baud rate is not possible because the input clock frequency is not divisible with an acceptable amount of error
    • + +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    XUartNs550_Config* XUartNs550_LookupConfig ( u16  DeviceId  ) XUartNs550_Config* XUartNs550_LookupConfig (u16  DeviceId ) 
    -
    - - - - - -
    -   - - -

    -Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    -

    Parameters:
    + +
    +

    Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.

    +
    Parameters:
    DeviceId contains the ID of the device to look up the configuration for.
    +
    -
    Returns:
    A pointer to the configuration found or NULL if the specified device ID was not found.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    A pointer to the configuration found or NULL if the specified device ID was not found.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__stats_8c.html b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__stats_8c.html index 799f44d7..de676c07 100755 --- a/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__stats_8c.html +++ b/XilinxProcessorIPLib/drivers/uartns550/doc/html/api/xuartns550__stats_8c.html @@ -2,129 +2,116 @@ - xuartns550_stats.c File Reference + Xilinx Driver uartns550 v3_1: xuartns550_stats.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartns550_stats.c File Reference

    Detailed Description

    -This file contains the statistics functions for the 16450/16550 UART driver.

    + + +

    +
    +

    xuartns550_stats.c File Reference

    #include "xuartns550.h"
    +#include "xuartns550_i.h"
    + + + + +

    Functions

    void XUartNs550_GetStats (XUartNs550 *InstancePtr, XUartNs550Stats *StatsPtr)
    void XUartNs550_ClearStats (XUartNs550 *InstancePtr)
    +

    Detailed Description

    +

    This file contains the statistics functions for the 16450/16550 UART driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:
     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a ecm  08/16/01 First release
  1.00b jhl  03/11/02 Repartitioned driver for smaller files.
  1.11a sv   03/20/07 Updated to use the new coding guidelines.
  2.00a ktn  10/20/09 Updated to use HAL processor APIs. XUartNs550_mClearStats
 		      macro is removed.
-
    -

    -#include "xuartns550.h"
    -#include "xuartns550_i.h"
    - - - - - - - -

    Functions

    void XUartNs550_GetStats (XUartNs550 *InstancePtr, XUartNs550Stats *StatsPtr)
    void XUartNs550_ClearStats (XUartNs550 *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    void XUartNs550_ClearStats ( XUartNs550 *  InstancePtr  ) void XUartNs550_ClearStats (XUartNs550 *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function zeros the statistics for the given instance.

    -

    Parameters:
    + +
    +

    This function zeros the statistics for the given instance.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartNs550_GetStats ( XUartNs550 *  InstancePtr, void XUartNs550_GetStats (XUartNs550 *  InstancePtr,
    XUartNs550Stats *  StatsPtrXUartNs550Stats *  StatsPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions returns a snapshot of the current statistics in the area provided.

    -

    Parameters:
    + +
    +

    This functions returns a snapshot of the current statistics in the area provided.

    +
    Parameters:
    InstancePtr is a pointer to the XUartNs550 instance.
    StatsPtr is a pointer to a XUartNs550Stats structure to where the statistics are to be copied to.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/annotated.html index a84ed143..def841fb 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/annotated.html @@ -2,28 +2,41 @@ - Class List + Xilinx Driver uartps v2_2: Class List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    + + + +

    Class List

    Here are the classes, structs, unions and interfaces with brief descriptions: + +
    Mapping
    XUartPs
    XUartPs_Config
    XUartPsBuffer
    XUartPsFormat
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/classes.html new file mode 100755 index 00000000..34d4575f --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/classes.html @@ -0,0 +1,40 @@ + + + + + Xilinx Driver uartps v2_2: Alphabetical List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Class Index

    M | X
    + +
      M  
    +
      X  
    +    		XUartPs_Config   XUartPsBuffer   XUartPsFormat   
    Mapping   XUartPs   
    M | X
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/doxygen.png b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/doxygen.png deleted file mode 100755 index d8021941..00000000 Binary files a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/doxygen.png and /dev/null differ diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/driver_api_doxygen.css b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/driver_api_doxygen.css deleted file mode 100755 index 8b5d35bb..00000000 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/driver_api_doxygen.css +++ /dev/null @@ -1,334 +0,0 @@ -BODY { - background-color: #FFFFFF; - font-family: Verdana, Arial, Helvetica, Sans-serif; -} - -H1 { - margin-bottom: 0em; - font-size: 2.00em; - font-style: normal; - color: #990033; -} - -H2 { - font-size: 1.05em; - font-style: normal; - color: #666666; -} - -H3 { - font-size: 1.00em; - font-style: normal; - color: #000000; -} - -H4 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -H5 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -H6 { - font-size: .90em; - font-style: italic; - color: #000000; -} - -OL { -} - -UL { -} - -LI { -} - -P { - color: #000000; -} - -P.Caution { - color: #990033; -} - -P.Code { - font-family: Courier New, Courier, Mono; - color: #003399; -} - -P.HeadingDBox { - font-weight: bold; -} - -P.HeadingGlossary { - font-weight: bold; -} - -P.LinkGlossary { - margin-bottom: .50em; -} - -P.Note { -} - -P.SysInOut { - font-family: Courier New, Courier, Mono; -} - -P.TableFootnote { - font-size: .80em; - margin-bottom: .70em; -} - -P.TableHeading { - font-weight: bold; - color: #FFFFFF; -} - -P.TableTitle { - font-style: italic; - font-weight: bold; -} - -SPAN.aEmphasis { - font-style: italic; -} - -SPAN.aFilename { - font-family: Courier New, Courier, Mono; -} - - -SPAN.aGUISysIn { - font-family: Verdana, Arial, Helvetica, Sans-serif; - font-weight: bold; -} - -SPAN.aReference { - font-style: italic; -} - -SPAN.aSysIn { - font-family: Courier New, Courier, Monospace; - font-weight: bold; -} - -SPAN.aSysOut { - font-family: Courier New, Courier, Monospace; -} - -SPAN.aSymbol { - font-family: Symbol; -} - -CAPTION { font-weight: bold } -DIV.qindex { - width: 100%; - background-color: #eeeeff; - border: 1px solid #B0B0B0; - text-align: center; - margin: 2px; - padding: 2px; -} -A.qindex { - text-decoration: none; - font-weight: bold; - color: #1A419D; - padding: 2px; -} -A.qindex:visited { - text-decoration: none; - font-weight: bold; - color: #1A419D - padding: 2px; -} -A.qindex:hover { - text-decoration: none; - background-color: #ddddff; - padding: 2px; -} -A.qindexHL { - text-decoration: none; - font-weight: bold; - background-color: #6666cc; - color: #ffffff; - padding: 2 6px; - border: 1px double #9295C2; - } -A.qindexHL:hover { - text-decoration: none; - background-color: #6666cc; - color: #ffffff; - padding: 2px 6px; -} -A.qindexHL:visited { text-decoration: none; background-color: #6666cc; color: #ffffff } -A.el { text-decoration: none; font-weight: bold } -A.elRef { font-weight: bold } -A.code { text-decoration: none; font-weight: normal; color: #1A419D} -A.codeRef { font-weight: normal; color: #1A419D} -A:hover { text-decoration: none; background-color: #f2f2ff } -DL.el { margin-left: -1cm } -PRE.fragment { - border: 1px solid #CCCCCC; - background-color: #f5f5f5; - margin-top: 4px; - margin-bottom: 4px; - margin-left: 2px; - margin-right: 8px; - padding-left: 6px; - padding-right: 6px; - padding-top: 4px; - padding-bottom: 4px; -} -DIV.fragment { - border: 1px solid #CCCCCC; - background-color: #f5f5f5; - padding: 6px; -} -DIV.ah { background-color: black; font-weight: bold; color: #ffffff; margin-bottom: 3px; margin-top: 3px } -TD.md { background-color: #F4F4FB; font-weight: bold; } -TD.mdname1 { background-color: #F4F4FB; font-weight: bold; color: #602020; } -TD.mdname { background-color: #F4F4FB; font-weight: bold; color: #602020; width: 600px; } -DIV.groupHeader { margin-left: 16px; margin-top: 12px; margin-bottom: 6px; font-weight: bold } -DIV.groupText { margin-left: 16px; font-style: italic; font-size: smaller } -BODY { - background: white; - color: black; - margin-right: 20px; - margin-left: 20px; -} -TD.indexkey { - background-color: #eeeeff; - font-weight: bold; - padding-right : 10px; - padding-top : 2px; - padding-left : 10px; - padding-bottom : 2px; - margin-left : 0px; - margin-right : 0px; - margin-top : 2px; - margin-bottom : 2px; - border: 1px solid #CCCCCC; -} -TD.indexvalue { - background-color: #eeeeff; - font-style: italic; - padding-right : 10px; - padding-top : 2px; - padding-left : 10px; - padding-bottom : 2px; - margin-left : 0px; - margin-right : 0px; - margin-top : 2px; - margin-bottom : 2px; - border: 1px solid #CCCCCC; -} -TR.memlist { - background-color: #f0f0f0; -} -P.formulaDsp { text-align: center; } -IMG.formulaDsp { } -IMG.formulaInl { vertical-align: middle; } -SPAN.keyword { color: #008000 } -SPAN.keywordtype { color: #604020 } -SPAN.keywordflow { color: #e08000 } -SPAN.comment { color: #800000 } -SPAN.preprocessor { color: #806020 } -SPAN.stringliteral { color: #002080 } -SPAN.charliteral { color: #008080 } -.mdTable { - border: 1px solid #868686; - background-color: #F4F4FB; -} -.mdRow { - padding: 8px 10px; -} -.mdescLeft { - font-size: smaller; - font-family: Verdana, Arial, Helvetica, sans-serif; - background-color: #FAFAFA; - padding-left: 8px; - border-top: 1px none #E0E0E0; - border-right: 1px none #E0E0E0; - border-bottom: 1px none #E0E0E0; - border-left: 1px none #E0E0E0; - margin: 0px; -} -.mdescRight { - font-size: smaller; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-style: italic; - background-color: #FAFAFA; - padding-left: 4px; - border-top: 1px none #E0E0E0; - border-right: 1px none #E0E0E0; - border-bottom: 1px none #E0E0E0; - border-left: 1px none #E0E0E0; - margin: 0px; - padding-bottom: 0px; - padding-right: 8px; -} -.memItemLeft { - padding: 1px 0px 0px 8px; - margin: 4px; - border-top-width: 1px; - border-right-width: 1px; - border-bottom-width: 1px; - border-left-width: 1px; - border-top-style: solid; - border-top-color: #E0E0E0; - border-right-color: #E0E0E0; - border-bottom-color: #E0E0E0; - border-left-color: #E0E0E0; - border-right-style: none; - border-bottom-style: none; - border-left-style: none; - background-color: #FAFAFA; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-size: 12px; -} -.memItemRight { - padding: 1px 0px 0px 8px; - margin: 4px; - border-top-width: 1px; - border-right-width: 1px; - border-bottom-width: 1px; - border-left-width: 1px; - border-top-style: solid; - border-top-color: #E0E0E0; - border-right-color: #E0E0E0; - border-bottom-color: #E0E0E0; - border-left-color: #E0E0E0; - border-right-style: none; - border-bottom-style: none; - border-left-style: none; - background-color: #FAFAFA; - font-family: Verdana, Arial, Helvetica, sans-serif; - font-size: 13px; -} -.search { color: #003399; - font-weight: bold; -} -FORM.search { - margin-bottom: 0px; - margin-top: 0px; -} -INPUT.search { font-size: 75%; - color: #000080; - font-weight: normal; - background-color: #eeeeff; -} -TD.tiny { font-size: 75%; -} -a { - color: #252E78; -} -a:visited { - color: #3D2185; -} diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/files.html index ce277b83..a0e5855c 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/files.html @@ -2,27 +2,34 @@ - File Index + Xilinx Driver uartps v2_2: File Index - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    File List

    Here is a list of all documented files with brief descriptions: + + + +
    +

    File List

    Here is a list of all files with brief descriptions:
    + @@ -31,4 +38,9 @@
    xuartps.c
    xuartps.h
    xuartps_g.c
    xuartps_hw.c
    xuartps_hw.h
    xuartps_selftest.c
    xuartps_sinit.c
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions.html index 8474004d..26b37be8 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions.html @@ -2,40 +2,104 @@ - Class Members + Xilinx Driver uartps v2_2: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -Here is a list of all documented class members with links to the class documentation for each member: -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions_vars.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions_vars.html index 9701f032..8bb75f08 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions_vars.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/functions_vars.html @@ -2,40 +2,104 @@ - Class Members - Variables + Xilinx Driver uartps v2_2: Class Members - Variables - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals.html index 91e970b9..28c23d0a 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals.html @@ -2,179 +2,57 @@ - Class Members + Xilinx Driver uartps v2_2: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    -
      -
    • x
      • -
    -
    -

    -Here is a list of all documented file members with links to the documentation: -

    -

    - x -

    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +
    +Here is a list of all file members with links to the files they belong to: + +

    - h -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_0x78.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_0x78.html new file mode 100755 index 00000000..badc11f7 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_0x78.html @@ -0,0 +1,642 @@ + + + + + Xilinx Driver uartps v2_2: Class Members + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +Here is a list of all file members with links to the files they belong to: + +

    - x -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_defs.html index 1d42283c..b5a4ddb0 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_defs.html @@ -2,151 +2,517 @@ - Class Members + Xilinx Driver uartps v2_2: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - -
    -
    -
      -
    • x
      • -
    -
    -

    + +

    +
      -

    -

    - x -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_func.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_func.html index 20b7788a..4a37cd37 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_func.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_func.html @@ -2,62 +2,168 @@ - Class Members + Xilinx Driver uartps v2_2: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + +
      -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_type.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_type.html new file mode 100755 index 00000000..96421623 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_type.html @@ -0,0 +1,52 @@ + + + + + Xilinx Driver uartps v2_2: Class Members + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +  +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_vars.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_vars.html index c9e7b738..66893da9 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_vars.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/globals_vars.html @@ -2,36 +2,49 @@ - Class Members + Xilinx Driver uartps v2_2: Class Members - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -
    - + + + -  -

    -

    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/index.html index 868933e7..f8a155e9 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/index.html @@ -2,55 +2,76 @@ - xuartps v2_1 + Xilinx Driver uartps v2_2: uartps v2_2 - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -

    xuartps v2_1

    -

    -This driver supports the following features:

    + + +

    +
    +

    uartps v2_2

    This driver supports the following features:

      -
    • Dynamic data format (baud rate, data bits, stop bits, parity)
    • Polled mode
    • Interrupt driven mode
    • Transmit and receive FIFOs (32 byte FIFO depth)
    • Access to the external modem control lines
    -

    -Initialization & Configuration

    -The XUartPs_Config structure is used by the driver to configure itself. Fields inside this structure are properties of XUartPs based on its hardware build.

    -To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in the following way:

    +

  • Dynamic data format (baud rate, data bits, stop bits, parity)
    • +
  • Polled mode
    • +
  • Interrupt driven mode
    • +
  • Transmit and receive FIFOs (32 byte FIFO depth)
    • +
  • Access to the external modem control lines
    • + +

    Initialization & Configuration

    +

    The XUartPs_Config structure is used by the driver to configure itself. Fields inside this structure are properties of XUartPs based on its hardware build.

    +

    To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in the following way:

      -
    • XUartPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the parameter EffectiveAddr should be the virtual address.
    -

    -Baud Rate

    -The UART has an internal baud rate generator, which furnishes the baud rate clock for both the receiver and the transmitter. Ther input clock frequency can be either the master clock or the master clock divided by 8, configured through the mode register.

    -Accompanied with the baud rate divider register, the baud rate is determined by: 

    -	baud_rate = input_clock / (bgen * (bdiv + 1)
-
    where bgen is the value of the baud rate generator, and bdiv is the value of baud rate divider.

    -Interrupts

    -The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    -The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for one of the following conditions.

    -

      -
    • A change in the modem signals
    • Data in the receive FIFO for a configuable time without receiver activity
    • A parity error
    • A framing error
    • An overrun error
    • Transmit FIFO is full
    • Transmit FIFO is empty
    • Receive FIFO is full
    • Receive FIFO is empty
    • Data in the receive FIFO equal to the receive threshold
    -

    -The application can control which interrupts are enabled using the XUartPs_SetInterruptMask() function.

    -In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, XUartPs_InterruptHandler(), to the interrupt system of the application. A separate handler should be provided by the application to communicate with the interrupt system, and conduct application specific interrupt handling. An application registers its own handler through the XUartPs_SetHandler() function.

    -Data Transfer

    -The functions, XUartPs_Send() and XUartPs_Recv(), are provided in the driver to allow data to be sent and received. They can be used in either polled or interrupt mode.

    -

    Note:
    -The default configuration for the UART after initialization is:

    -

      -
    • 9,600 bps or XPAR_DFT_BAUDRATE if defined
    • 8 data bits
    • 1 stop bit
    • no parity
    • FIFO's are enabled with a receive threshold of 8 bytes
    • The RX timeout is enabled with a timeout of 1 (4 char times)
    -

    +

  • XUartPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a configuration structure provided by the caller. If running in a system with address translation, the parameter EffectiveAddr should be the virtual address.
    • + +

    Baud Rate

    +

    The UART has an internal baud rate generator, which furnishes the baud rate clock for both the receiver and the transmitter. Ther input clock frequency can be either the master clock or the master clock divided by 8, configured through the mode register.

    +

    Accompanied with the baud rate divider register, the baud rate is determined by: 

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+	baud_rate = input_clock / (bgen * (bdiv + 1)
+

    where bgen is the value of the baud rate generator, and bdiv is the value of baud rate divider.

    +

    Interrupts

    +

    The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.

    +

    The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated for one of the following conditions.

    +
      +
    • A change in the modem signals
      • +
    • Data in the receive FIFO for a configuable time without receiver activity
      • +
    • A parity error
      • +
    • A framing error
      • +
    • An overrun error
      • +
    • Transmit FIFO is full
      • +
    • Transmit FIFO is empty
      • +
    • Receive FIFO is full
      • +
    • Receive FIFO is empty
      • +
    • Data in the receive FIFO equal to the receive threshold
      • +
    +

    The application can control which interrupts are enabled using the XUartPs_SetInterruptMask() function.

    +

    In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, XUartPs_InterruptHandler(), to the interrupt system of the application. A separate handler should be provided by the application to communicate with the interrupt system, and conduct application specific interrupt handling. An application registers its own handler through the XUartPs_SetHandler() function.

    +

    Data Transfer

    +

    The functions, XUartPs_Send() and XUartPs_Recv(), are provided in the driver to allow data to be sent and received. They can be used in either polled or interrupt mode.

    +
    Note:
    +

    The default configuration for the UART after initialization is:

    +
      +
    • 9,600 bps or XPAR_DFT_BAUDRATE if defined
      • +
    • 8 data bits
      • +
    • 1 stop bit
      • +
    • no parity
      • +
    • FIFO's are enabled with a receive threshold of 8 bytes
      • +
    • The RX timeout is enabled with a timeout of 1 (4 char times)
      • +
    +
    + MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- ----------------------------------------------
  1.00a	drg/jz 01/12/10 First Release
  1.00a sdm    09/27/11 Fixed compiler warnings and also a bug
@@ -77,5 +98,11 @@ The default configuration for the UART after initialization is:
    
  1.05a hk     08/22/13 Added API for uart reset and related
 			constant definitions.
  2.0   hk      03/07/14 Version number revised.
- 2.1   hk     04/16/14 Change XUARTPS_MAX_RATE to 921600. CR# 780625.

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + 2.1 hk 04/16/14 Change XUARTPS_MAX_RATE to 921600. CR# 780625. + 2.2 hk 06/23/14 SW reset of RX and TX should be done when changing + baud rate. CR# 804281.
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping-members.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping-members.html new file mode 100755 index 00000000..60ef6894 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping-members.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver uartps v2_2: Member List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Mapping Member List

    This is the complete list of members for Mapping, including all inherited members. + + + +
    MaskMapping
    OptionMapping
    RegisterOffsetMapping
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping.html new file mode 100755 index 00000000..5dbbf273 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_mapping.html @@ -0,0 +1,86 @@ + + + + + Xilinx Driver uartps v2_2: Mapping Struct Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    Mapping Struct Reference

    +

    List of all members.

    + + + + + +

    Public Attributes

    u16 Option
    u16 RegisterOffset
    u32 Mask
    +

    Member Data Documentation

    + +
    +
    + + + + +
    u32 Mapping::Mask
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u16 Mapping::Option
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u16 Mapping::RegisterOffset
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps-members.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps-members.html index 2b015f2b..2e7db531 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps-members.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps-members.html @@ -2,24 +2,43 @@ - Member List + Xilinx Driver uartps v2_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPs Member List

    This is the complete list of members for XUartPs, including all inherited members.

    -
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartPs Member List

    This is the complete list of members for XUartPs, including all inherited members. + + + + + + + + +
    BaudRateXUartPs
    CallBackRefXUartPs
    ConfigXUartPs
    HandlerXUartPs
    InputClockHzXUartPs
    IsReadyXUartPs
    ReceiveBufferXUartPs
    SendBufferXUartPs
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps.html index fc2cd914..04696be2 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps.html @@ -2,33 +2,159 @@ - XUartPs Struct Reference + Xilinx Driver uartps v2_2: XUartPs Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPs Struct Reference

    #include <xuartps.h> -

    -List of all members.

    Detailed Description

    -The XUartPs driver instance data structure. A pointer to an instance data structure is passed around by functions to refer to a specific driver instance. -

    + + +

    +
    +

    XUartPs Struct Reference

    +

    #include <xuartps.h>

    + +

    List of all members.

    - + + + + + + + + +

    Public Attributes

    XUartPs_Config Config
    u32 InputClockHz
    u32 IsReady
    u32 BaudRate
    XUartPsBuffer SendBuffer
    XUartPsBuffer ReceiveBuffer
    XUartPs_Handler Handler
    void * CallBackRef
    -
    The documentation for this struct was generated from the following file:
      -
    • xuartps.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Detailed Description

    +

    The XUartPs driver instance data structure. A pointer to an instance data structure is passed around by functions to refer to a specific driver instance.

    +

    Member Data Documentation

    + +
    +
    + + + + +
    u32 XUartPs::BaudRate
    +
    +
    + +
    +
    + +
    +
    + + + + +
    void* XUartPs::CallBackRef
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartPs_Config XUartPs::Config
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartPs_Handler XUartPs::Handler
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u32 XUartPs::InputClockHz
    +
    +
    + +
    +
    + +
    +
    + + + + +
    u32 XUartPs::IsReady
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartPsBuffer XUartPs::ReceiveBuffer
    +
    +
    + +
    +
    + +
    +
    + + + + +
    XUartPsBuffer XUartPs::SendBuffer
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config-members.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config-members.html index 2fe40ce1..fae571a7 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config-members.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config-members.html @@ -2,27 +2,39 @@ - Member List + Xilinx Driver uartps v2_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPs_Config Member List

    This is the complete list of members for XUartPs_Config, including all inherited members.

    - - - -
    BaseAddressXUartPs_Config
    DeviceIdXUartPs_Config
    InputClockHzXUartPs_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartPs_Config Member List

    This is the complete list of members for XUartPs_Config, including all inherited members. + + + + +
    BaseAddressXUartPs_Config
    DeviceIdXUartPs_Config
    InputClockHzXUartPs_Config
    ModemPinsConnectedXUartPs_Config
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config.html index de01d5f8..60eeac7b 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps___config.html @@ -2,110 +2,107 @@ - XUartPs_Config Struct Reference + Xilinx Driver uartps v2_2: XUartPs_Config Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPs_Config Struct Reference

    #include <xuartps.h> -

    -List of all members.

    Detailed Description

    -This typedef contains configuration information for the device. -

    + + +

    +
    +

    XUartPs_Config Struct Reference

    +

    #include <xuartps.h>

    + +

    List of all members.

    - - - - - - - - + + + + +

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz

    Public Attributes

    u16 DeviceId
    u32 BaseAddress
    u32 InputClockHz
    int ModemPinsConnected
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    This typedef contains configuration information for the device.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartPs_Config::BaseAddress u32 XUartPs_Config::BaseAddress
    -
    - - - - - -
    -   - + +
    +

    Base address of device (IPIF)

    -

    -Base address of device (IPIF)

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u16 XUartPs_Config::DeviceId u16 XUartPs_Config::DeviceId
    -
    - - - - - -
    -   - + +
    +

    Unique ID of device

    -

    -Unique ID of device

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartPs_Config::InputClockHz u32 XUartPs_Config::InputClockHz
    -
    - - - - - -
    -   - + +
    +

    Input clock frequency

    + +
    + + +
    +
    + + + + +
    int XUartPs_Config::ModemPinsConnected
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Input clock frequency

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartps.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer-members.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer-members.html new file mode 100755 index 00000000..8722dd04 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer-members.html @@ -0,0 +1,39 @@ + + + + + Xilinx Driver uartps v2_2: Member List + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    XUartPsBuffer Member List

    This is the complete list of members for XUartPsBuffer, including all inherited members. + + + +
    NextBytePtrXUartPsBuffer
    RemainingBytesXUartPsBuffer
    RequestedBytesXUartPsBuffer
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer.html new file mode 100755 index 00000000..60753120 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_buffer.html @@ -0,0 +1,88 @@ + + + + + Xilinx Driver uartps v2_2: XUartPsBuffer Struct Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    XUartPsBuffer Struct Reference

    +

    #include <xuartps.h>

    + +

    List of all members.

    + + + + + +

    Public Attributes

    u8 * NextBytePtr
    unsigned int RequestedBytes
    unsigned int RemainingBytes
    +

    Member Data Documentation

    + +
    +
    + + + + +
    u8* XUartPsBuffer::NextBytePtr
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartPsBuffer::RemainingBytes
    +
    +
    + +
    +
    + +
    +
    + + + + +
    unsigned int XUartPsBuffer::RequestedBytes
    +
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format-members.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format-members.html index 079e136b..85d8ad0e 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format-members.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format-members.html @@ -2,28 +2,39 @@ - Member List + Xilinx Driver uartps v2_2: Member List - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPsFormat Member List

    This is the complete list of members for XUartPsFormat, including all inherited members.

    - - - - -
    BaudRateXUartPsFormat
    DataBitsXUartPsFormat
    ParityXUartPsFormat
    StopBitsXUartPsFormat
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. + + +

    +
    +

    XUartPsFormat Member List

    This is the complete list of members for XUartPsFormat, including all inherited members. + + + + +
    BaudRateXUartPsFormat
    DataBitsXUartPsFormat
    ParityXUartPsFormat
    StopBitsXUartPsFormat
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format.html index e2d970f7..ad128cce 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/struct_x_uart_ps_format.html @@ -2,135 +2,108 @@ - XUartPsFormat Struct Reference + Xilinx Driver uartps v2_2: XUartPsFormat Struct Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    XUartPsFormat Struct Reference

    #include <xuartps.h> -

    -List of all members.

    Detailed Description

    -Keep track of data format setting of a device. -

    + + +

    +
    +

    XUartPsFormat Struct Reference

    +

    #include <xuartps.h>

    + +

    List of all members.

    - - - - - - - - - - + + + + +

    Public Attributes

    u32 BaudRate
    u32 DataBits
    u32 Parity
    u8 StopBits

    Public Attributes

    u32 BaudRate
    u32 DataBits
    u32 Parity
    u8 StopBits
    -

    Member Data Documentation

    -

    - - - - -
    - +

    Detailed Description

    +

    Keep track of data format setting of a device.

    +

    Member Data Documentation

    + +
    +
    +
    - +
    u32 XUartPsFormat::BaudRate u32 XUartPsFormat::BaudRate
    -
    - - - - - -
    -   - + +
    +

    In bps, ie 1200

    -

    -In bps, ie 1200

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartPsFormat::DataBits u32 XUartPsFormat::DataBits
    -
    - - - - - -
    -   - + +
    +

    Number of data bits

    -

    -Number of data bits

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u32 XUartPsFormat::Parity u32 XUartPsFormat::Parity
    -
    - - - - - -
    -   - + +
    +

    Parity

    -

    -Parity

    -

    - - - - -
    - + + + +
    +
    +
    - +
    u8 XUartPsFormat::StopBits u8 XUartPsFormat::StopBits
    -
    - - - - - -
    -   - + +
    +

    Number of stop bits

    + +
    + +
    The documentation for this struct was generated from the following file: + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + -

    -Number of stop bits

    -

    The documentation for this struct was generated from the following file:
      -
    • xuartps.h
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/tabs.css index a61552a6..a4441634 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs INPUT +DIV.tabs #MSearchBox { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs INPUT DIV.tabs TD { - font-size : x-small; + font-size : 80%; font-weight : bold; text-decoration : none; } @@ -82,21 +82,24 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI#current A +DIV.tabs LI.current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI#current SPAN +DIV.tabs LI.current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.nav +DIV.navpath { background : none; border : none; border-bottom : 1px solid #84B0C7; + text-align : center; + margin : 2px; + padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8c.html index 198af265..d18fdd9c 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8c.html @@ -2,268 +2,302 @@ - xuartps.c File Reference + Xilinx Driver uartps v2_2: xuartps.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps.c File Reference

    Detailed Description

    -This file contains the implementation of the interface functions for XUartPs driver. Refer to the header file xuartps.h for more detailed information.

    + + +

    +
    +

    xuartps.c File Reference

    #include "xstatus.h"
    +#include "xuartps.h"
    +#include "xil_io.h"
    + + + + + + + + + + +

    Defines

    #define XUARTPS_MAX_BAUD_ERROR_RATE   3

    Functions

    unsigned int XUartPs_SendBuffer (XUartPs *InstancePtr)
    unsigned int XUartPs_ReceiveBuffer (XUartPs *InstancePtr)
    int XUartPs_CfgInitialize (XUartPs *InstancePtr, XUartPs_Config *Config, u32 EffectiveAddr)
    unsigned int XUartPs_Send (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartPs_Recv (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    int XUartPs_SetBaudRate (XUartPs *InstancePtr, u32 BaudRate)
    +

    Detailed Description

    +

    This file contains the implementation of the interface functions for XUartPs driver. Refer to the header file xuartps.h for more detailed information.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	 Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	 Changes
  ----- ------ -------- ----------------------------------------------
  1.00	drg/jz 01/13/10 First Release
-
    -

    -#include "xstatus.h"
    -#include "xuartps.h"
    -#include "xil_io.h"
    - - - - - - - - - - - -

    Functions

    int XUartPs_CfgInitialize (XUartPs *InstancePtr, XUartPs_Config *Config, u32 EffectiveAddr)
    unsigned int XUartPs_Send (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartPs_Recv (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    int XUartPs_SetBaudRate (XUartPs *InstancePtr, u32 BaudRate)
    -

    Function Documentation

    -

    - - - - -
    - + 2.2 hk 06/23/14 SW reset of RX and TX should be done when changing + baud rate. CR# 804281. +

    Define Documentation

    + +
    +
    +
    - - - - - - - - - - - - - - - - - - - - - +
    int XUartPs_CfgInitialize ( XUartPs *  InstancePtr,
    XUartPs_Config *  Config,
    u32  EffectiveAddr
    ) #define XUARTPS_MAX_BAUD_ERROR_RATE   3
    -
    - - - - - -
    -   - + +
    -

    -Initializes a specific XUartPs instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. The receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XUartPs_CfgInitialize (XUartPs *  InstancePtr,
    XUartPs_Config *  Config,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initializes a specific XUartPs instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. The receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    Config is a reference to a structure containing information about a specific XUartPs driver.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.
    +
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if initialization was successful
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the inputclock frequency is not divisible with an acceptable amount of error
    -

    -

    Note:
    -The default configuration for the UART after initialization is:

    +

  • XST_SUCCESS if initialization was successful
    • +
  • XST_UART_BAUD_ERROR if the baud rate is not possible because the inputclock frequency is not divisible with an acceptable amount of error
    • + +
    Note:
    +

    The default configuration for the UART after initialization is:

      -
    • 19,200 bps or XPAR_DFT_BAUDRATE if defined
    • 8 data bits
    • 1 stop bit
    • no parity
    • FIFO's are enabled with a receive threshold of 8 bytes
    • The RX timeout is enabled with a timeout of 1 (4 char times)
    -

    -All interrupts are disabled.

    -

    - - - - -
    - +
  • 19,200 bps or XPAR_DFT_BAUDRATE if defined
    • +
  • 8 data bits
    • +
  • 1 stop bit
    • +
  • no parity
    • +
  • FIFO's are enabled with a receive threshold of 8 bytes
    • +
  • The RX timeout is enabled with a timeout of 1 (4 char times)
    • + +

    All interrupts are disabled.

    + + + + +
    +
    +
    - - - - - - - - - - - - - - - - - - - - - + + + + + +
    unsigned int XUartPs_Recv ( XUartPs *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes
    ) unsigned int XUartPs_ReceiveBuffer (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - + +
    -

    -This function attempts to receive a specified number of bytes of data from the device and store it into the specified buffer. This function works for both polled or interrupt driven modes. It is non-blocking.

    -In a polled mode, this function will only receive the data already in the RX FIFO. The application may need to call it repeatedly to receive the entire buffer. Polled mode is the default mode of operation for the device.

    -In interrupt mode, this function will start the receiving, if not the entire buffer has been received, the interrupt handler will continue receiving data until the entire buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of the receiving or error conditions.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartPs_Recv (XUartPs *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This function attempts to receive a specified number of bytes of data from the device and store it into the specified buffer. This function works for both polled or interrupt driven modes. It is non-blocking.

    +

    In a polled mode, this function will only receive the data already in the RX FIFO. The application may need to call it repeatedly to receive the entire buffer. Polled mode is the default mode of operation for the device.

    +

    In interrupt mode, this function will start the receiving, if not the entire buffer has been received, the interrupt handler will continue receiving data until the entire buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of the receiving or error conditions.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance
    BufferPtr is pointer to buffer for data to be received into
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    -
    Returns:
    The number of bytes received.
    -
    Note:
    -The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -

    - - - - -
    - +
    Returns:
    The number of bytes received.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.

    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - - + + + + - - - + + +
    unsigned int XUartPs_Send ( XUartPs *  InstancePtr, unsigned int XUartPs_Send (XUartPs *  InstancePtr,
    u8 *  BufferPtr, u8 *  BufferPtr,
    unsigned int  NumBytesunsigned int  NumBytes 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sends the specified buffer using the device in either polled or interrupt driven mode. This function is non-blocking, if the device is busy sending data, it will return and indicate zero bytes were sent. Otherwise, it fills the TX FIFO as much as it can, and return the number of bytes sent.

    -In a polled mode, this function will only send as much data as TX FIFO can buffer. The application may need to call it repeatedly to send the entire buffer.

    -In interrupt mode, this function will start sending the specified buffer, then the interrupt handler will continue sending data until the entire buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending.

    -

    Parameters:
    + +
    +

    This functions sends the specified buffer using the device in either polled or interrupt driven mode. This function is non-blocking, if the device is busy sending data, it will return and indicate zero bytes were sent. Otherwise, it fills the TX FIFO as much as it can, and return the number of bytes sent.

    +

    In a polled mode, this function will only send as much data as TX FIFO can buffer. The application may need to call it repeatedly to send the entire buffer.

    +

    In interrupt mode, this function will start sending the specified buffer, then the interrupt handler will continue sending data until the entire buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    BufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    -
    Returns:
    The number of bytes actually sent.
    -
    Note:
    -The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    -
    -
    -

    - - - - -
    - +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    +
    +

    + + + + +
    +
    +
    - - - - - - - - - - - - - - - + + + + + +
    int XUartPs_SetBaudRate ( XUartPs *  InstancePtr,
    u32  BaudRate
    ) unsigned int XUartPs_SendBuffer (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - + +
    -

    -Sets the baud rate for the device. Checks the input value for validity and also verifies that the requested rate can be configured to within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE. If the provided rate is not possible, the current setting is unchanged.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartPs_SetBaudRate (XUartPs *  InstancePtr,
    u32  BaudRate 
    )
    +
    +
    +

    Sets the baud rate for the device. Checks the input value for validity and also verifies that the requested rate can be configured to within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE. If the provided rate is not possible, the current setting is unchanged.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance
    BaudRate to be set
    +
    -
    Returns:
      -
    • XST_SUCCESS if everything configured as expected
    • XST_UART_BAUD_ERROR if the requested rate is not available because there was too much error
    +
    Returns:
      +
    • XST_SUCCESS if everything configured as expected
      • +
    • XST_UART_BAUD_ERROR if the requested rate is not available because there was too much error
      • +
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Note:
    None.
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8h.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8h.html new file mode 100755 index 00000000..e2d68731 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps_8h.html @@ -0,0 +1,1636 @@ + + + + + Xilinx Driver uartps v2_2: xuartps.h File Reference + + + +

    Xilinx Processor IP Library

    +Software Drivers +
    + + + +
    +

    xuartps.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xstatus.h"
    +#include "xuartps_hw.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XUartPs_Config
    struct  XUartPsBuffer
    struct  XUartPsFormat
    struct  XUartPs

    Defines

    #define XUARTPS_H
    #define XUARTPS_MAX_RATE   921600
    #define XUARTPS_MIN_RATE   110
    #define XUARTPS_DFT_BAUDRATE   115200
    #define XUartPs_GetChannelStatus(InstancePtr)   Xil_In32(((InstancePtr)->Config.BaseAddress) + XUARTPS_SR_OFFSET)
    #define XUartPs_GetModeControl(InstancePtr)   Xil_In32(((InstancePtr)->Config.BaseAddress) + XUARTPS_CR_OFFSET)
    #define XUartPs_SetModeControl(InstancePtr, RegisterValue)
    #define XUartPs_EnableUart(InstancePtr)
    #define XUartPs_DisableUart(InstancePtr)
    #define XUartPs_IsTransmitEmpty(InstancePtr)
    Configuration options

    +

    #define XUARTPS_OPTION_SET_BREAK   0x0080
    #define XUARTPS_OPTION_STOP_BREAK   0x0040
    #define XUARTPS_OPTION_RESET_TMOUT   0x0020
    #define XUARTPS_OPTION_RESET_TX   0x0010
    #define XUARTPS_OPTION_RESET_RX   0x0008
    #define XUARTPS_OPTION_ASSERT_RTS   0x0004
    #define XUARTPS_OPTION_ASSERT_DTR   0x0002
    #define XUARTPS_OPTION_SET_FCM   0x0001
    Channel Operational Mode

    The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    +

    #define XUARTPS_OPER_MODE_NORMAL   0x00
    #define XUARTPS_OPER_MODE_AUTO_ECHO   0x01
    #define XUARTPS_OPER_MODE_LOCAL_LOOP   0x02
    #define XUARTPS_OPER_MODE_REMOTE_LOOP   0x03
    Data format values

    These constants specify the data format that the driver supports. The data format includes the number of data bits, the number of stop bits and parity.

    +

    #define XUARTPS_FORMAT_8_BITS   0
    #define XUARTPS_FORMAT_7_BITS   2
    #define XUARTPS_FORMAT_6_BITS   3
    #define XUARTPS_FORMAT_NO_PARITY   4
    #define XUARTPS_FORMAT_MARK_PARITY   3
    #define XUARTPS_FORMAT_SPACE_PARITY   2
    #define XUARTPS_FORMAT_ODD_PARITY   1
    #define XUARTPS_FORMAT_EVEN_PARITY   0
    #define XUARTPS_FORMAT_2_STOP_BIT   2
    #define XUARTPS_FORMAT_1_5_STOP_BIT   1
    #define XUARTPS_FORMAT_1_STOP_BIT   0
    Callback events

    These constants specify the handler events that an application can handle using its specific handler function. Note that these constants are not bit mask, so only one event can be passed to an application at a time.

    +

    #define XUARTPS_EVENT_RECV_DATA   1
    #define XUARTPS_EVENT_RECV_TOUT   2
    #define XUARTPS_EVENT_SENT_DATA   3
    #define XUARTPS_EVENT_RECV_ERROR   4
    #define XUARTPS_EVENT_MODEM   5

    Typedefs

    typedef void(* XUartPs_Handler )(void *CallBackRef, u32 Event, unsigned int EventData)

    Functions

    XUartPs_Config * XUartPs_LookupConfig (u16 DeviceId)
    int XUartPs_CfgInitialize (XUartPs *InstancePtr, XUartPs_Config *Config, u32 EffectiveAddr)
    unsigned int XUartPs_Send (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    unsigned int XUartPs_Recv (XUartPs *InstancePtr, u8 *BufferPtr, unsigned int NumBytes)
    int XUartPs_SetBaudRate (XUartPs *InstancePtr, u32 BaudRate)
    void XUartPs_SetOptions (XUartPs *InstancePtr, u16 Options)
    u16 XUartPs_GetOptions (XUartPs *InstancePtr)
    void XUartPs_SetFifoThreshold (XUartPs *InstancePtr, u8 TriggerLevel)
    u8 XUartPs_GetFifoThreshold (XUartPs *InstancePtr)
    u16 XUartPs_GetModemStatus (XUartPs *InstancePtr)
    u32 XUartPs_IsSending (XUartPs *InstancePtr)
    u8 XUartPs_GetOperMode (XUartPs *InstancePtr)
    void XUartPs_SetOperMode (XUartPs *InstancePtr, u8 OperationMode)
    u8 XUartPs_GetFlowDelay (XUartPs *InstancePtr)
    void XUartPs_SetFlowDelay (XUartPs *InstancePtr, u8 FlowDelayValue)
    u8 XUartPs_GetRecvTimeout (XUartPs *InstancePtr)
    void XUartPs_SetRecvTimeout (XUartPs *InstancePtr, u8 RecvTimeout)
    int XUartPs_SetDataFormat (XUartPs *InstancePtr, XUartPsFormat *Format)
    void XUartPs_GetDataFormat (XUartPs *InstancePtr, XUartPsFormat *Format)
    u32 XUartPs_GetInterruptMask (XUartPs *InstancePtr)
    void XUartPs_SetInterruptMask (XUartPs *InstancePtr, u32 Mask)
    void XUartPs_InterruptHandler (XUartPs *InstancePtr)
    void XUartPs_SetHandler (XUartPs *InstancePtr, XUartPs_Handler FuncPtr, void *CallBackRef)
    int XUartPs_SelfTest (XUartPs *InstancePtr)
    +

    Detailed Description

    +

    Define Documentation

    + +
    +
    + + + + +
    #define XUARTPS_DFT_BAUDRATE   115200
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XUartPs_DisableUart(InstancePtr  ) 
    +
    +
    +Value:
    Xil_Out32(((InstancePtr)->Config.BaseAddress + XUARTPS_CR_OFFSET), \
+          (((Xil_In32((InstancePtr)->Config.BaseAddress + XUARTPS_CR_OFFSET)) & \
+          ~XUARTPS_CR_EN_DIS_MASK) | (XUARTPS_CR_RX_DIS | XUARTPS_CR_TX_DIS)))
+

    Disable the transmitter and receiver of the UART.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartPs_DisableUart(XUartPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XUartPs_EnableUart(InstancePtr  ) 
    +
    +
    +Value:
    Xil_Out32(((InstancePtr)->Config.BaseAddress + XUARTPS_CR_OFFSET), \
+          ((Xil_In32((InstancePtr)->Config.BaseAddress + XUARTPS_CR_OFFSET) & \
+          ~XUARTPS_CR_EN_DIS_MASK) | (XUARTPS_CR_RX_EN | XUARTPS_CR_TX_EN)))
+

    Enable the transmitter and receiver of the UART.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartPs_EnableUart(XUartPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_EVENT_MODEM   5
    +
    +
    +

    Modem status changed

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_EVENT_RECV_DATA   1
    +
    +
    +

    Data receiving done

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_EVENT_RECV_ERROR   4
    +
    +
    +

    A receive error detected

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_EVENT_RECV_TOUT   2
    +
    +
    +

    A receive timeout occurred

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_EVENT_SENT_DATA   3
    +
    +
    +

    Data transmission done

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_1_5_STOP_BIT   1
    +
    +
    +

    1.5 stop bits

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_1_STOP_BIT   0
    +
    +
    +

    1 stop bit

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_2_STOP_BIT   2
    +
    +
    +

    2 stop bits

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_6_BITS   3
    +
    +
    +

    6 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_7_BITS   2
    +
    +
    +

    7 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_8_BITS   0
    +
    +
    +

    8 data bits

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_EVEN_PARITY   0
    +
    +
    +

    Even parity

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_MARK_PARITY   3
    +
    +
    +

    Mark parity

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_NO_PARITY   4
    +
    +
    +

    No parity

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_ODD_PARITY   1
    +
    +
    +

    Odd parity

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_FORMAT_SPACE_PARITY   2
    +
    +
    +

    parity

    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XUartPs_GetChannelStatus(InstancePtr  )    Xil_In32(((InstancePtr)->Config.BaseAddress) + XUARTPS_SR_OFFSET)
    +
    +
    +

    Get the UART Channel Status Register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    The value read from the register.
    +
    Note:
    C-Style signature: u16 XUartPs_GetChannelStatus(XUartPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XUartPs_GetModeControl(InstancePtr  )    Xil_In32(((InstancePtr)->Config.BaseAddress) + XUARTPS_CR_OFFSET)
    +
    +
    +

    Get the UART Mode Control Register.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    The value read from the register.
    +
    Note:
    C-Style signature: u32 XUartPs_GetControl(XUartPs *InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_H
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + +
    #define XUartPs_IsTransmitEmpty(InstancePtr  ) 
    +
    +
    +Value:
    ((Xil_In32(((InstancePtr)->Config.BaseAddress) + XUARTPS_SR_OFFSET) & \
+         XUARTPS_SR_TXEMPTY) == XUARTPS_SR_TXEMPTY)
+

    Determine if the transmitter FIFO is empty.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
      +
    • TRUE if a byte can be sent
      • +
    • FALSE if the Transmitter Fifo is not empty
      • +
    +
    +
    Note:
    C-Style signature: u32 XUartPs_IsTransmitEmpty(XUartPs InstancePtr)
    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_MAX_RATE   921600
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_MIN_RATE   110
    +
    +
    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPER_MODE_AUTO_ECHO   0x01
    +
    +
    +

    Auto Echo Mode

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPER_MODE_LOCAL_LOOP   0x02
    +
    +
    +

    Local Loopback Mode

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPER_MODE_NORMAL   0x00
    +
    +
    +

    Normal Mode

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPER_MODE_REMOTE_LOOP   0x03
    +
    +
    +

    Remote Loopback Mode

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_ASSERT_DTR   0x0002
    +
    +
    +

    Assert the DTR bit

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_ASSERT_RTS   0x0004
    +
    +
    +

    Assert the RTS bit

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_RESET_RX   0x0008
    +
    +
    +

    Reset the receiver

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_RESET_TMOUT   0x0020
    +
    +
    +

    Reset the receive timeout

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_RESET_TX   0x0010
    +
    +
    +

    Reset the transmitter

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_SET_BREAK   0x0080
    +
    +
    +

    These constants specify the options that may be set or retrieved with the driver, each is a unique bit mask such that multiple options may be specified. These constants indicate the available options in active state. Starts break transmission

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_SET_FCM   0x0001
    +
    +
    +

    Turn on flow control mode

    + +
    +
    + +
    +
    + + + + +
    #define XUARTPS_OPTION_STOP_BREAK   0x0040
    +
    +
    +

    Stops break transmission

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + +
    #define XUartPs_SetModeControl(InstancePtr,
    RegisterValue  ) 
    +
    +
    +Value:
    Xil_Out32(((InstancePtr)->Config.BaseAddress) + XUARTPS_CR_OFFSET, \
+                        (RegisterValue))
+

    Set the UART Mode Control Register.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    RegisterValue is the value to be written to the register.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    C-Style signature: void XUartPs_SetModeControl(XUartPs *InstancePtr, u16 RegisterValue)
    + +
    +
    +

    Typedef Documentation

    + +
    +
    + + + + +
    typedef void(* XUartPs_Handler)(void *CallBackRef, u32 Event, unsigned int EventData)
    +
    +
    +

    This data type defines a handler that an application defines to communicate with interrupt system to retrieve state information about an application.

    +
    Parameters:
    + + + + +
    CallBackRef is a callback reference passed in by the upper layer when setting the handler, and is passed back to the upper layer when the handler is called. It is used to find the device driver instance.
    Event contains one of the event constants indicating events that have occurred.
    EventData contains the number of bytes sent or received at the time of the call for send and receive events and contains the modem status for modem events.
    +
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    int XUartPs_CfgInitialize (XUartPs *  InstancePtr,
    XUartPs_Config *  Config,
    u32  EffectiveAddr 
    )
    +
    +
    +

    Initializes a specific XUartPs instance such that it is ready to be used. The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. The receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartPs instance.
    Config is a reference to a structure containing information about a specific XUartPs driver.
    EffectiveAddr is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.
    +
    +
    +
    Returns:
    +
      +
    • XST_SUCCESS if initialization was successful
      • +
    • XST_UART_BAUD_ERROR if the baud rate is not possible because the inputclock frequency is not divisible with an acceptable amount of error
      • +
    +
    Note:
    +

    The default configuration for the UART after initialization is:

    +
      +
    • 19,200 bps or XPAR_DFT_BAUDRATE if defined
      • +
    • 8 data bits
      • +
    • 1 stop bit
      • +
    • no parity
      • +
    • FIFO's are enabled with a receive threshold of 8 bytes
      • +
    • The RX timeout is enabled with a timeout of 1 (4 char times)
      • +
    +

    All interrupts are disabled.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_GetDataFormat (XUartPs *  InstancePtr,
    XUartPsFormat *  FormatPtr 
    )
    +
    +
    +

    Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    FormatPtr is a pointer to a format structure that will contain the data format after this call completes.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartPs_GetFifoThreshold (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    The current receive FIFO trigger level. This is a value from 0-31.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartPs_GetFlowDelay (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    +

    The Flow Delay is specified by constants defined in xuartps_hw.h. The constants are named XUARTPS_FLOWDEL*

    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u32 XUartPs_GetInterruptMask (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the interrupt mask

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    The current interrupt mask. The mask indicates which interupts are enabled.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u16 XUartPs_GetModemStatus (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    +

    The modem status which are bit masks that are contained in the file xuartps.h and named XUARTPS_MODEM_*.

    +
    Note:
    +

    The bit masks used for the modem status are the exact bits of the modem status register with no abstraction.

    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartPs_GetOperMode (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    +

    The operational mode is specified by constants defined in xuartps.h. The constants are named XUARTPS_OPER_MODE_*

    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u16 XUartPs_GetOptions (XUartPs *  InstancePtr ) 
    +
    +
    +

    Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    +

    The current options for the UART. The optionss are bit masks that are contained in the file xuartps.h and named XUARTPS_OPTION_*.

    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u8 XUartPs_GetRecvTimeout (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the Receive Timeout of the UART.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
    The current setting for receive time out.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    void XUartPs_InterruptHandler (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function is the interrupt handler for the driver. It must be connected to an interrupt system by the application such that it can be called when an interrupt occurs.

    +
    Parameters:
    + + +
    InstancePtr contains a pointer to the driver instance
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    u32 XUartPs_IsSending (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function determines if the specified UART is sending data.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance.
    +
    +
    +
    Returns:
      +
    • TRUE if the UART is sending data
      • +
    • FALSE if UART is not sending data
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + +
    XUartPs_Config* XUartPs_LookupConfig (u16  DeviceId ) 
    +
    +
    +

    Looks up the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

    +
    Parameters:
    + + +
    DeviceId contains the ID of the device
    +
    +
    +
    Returns:
    A pointer to the configuration structure or NULL if the specified device is not in the system.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartPs_Recv (XUartPs *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This function attempts to receive a specified number of bytes of data from the device and store it into the specified buffer. This function works for both polled or interrupt driven modes. It is non-blocking.

    +

    In a polled mode, this function will only receive the data already in the RX FIFO. The application may need to call it repeatedly to receive the entire buffer. Polled mode is the default mode of operation for the device.

    +

    In interrupt mode, this function will start the receiving, if not the entire buffer has been received, the interrupt handler will continue receiving data until the entire buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of the receiving or error conditions.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartPs instance
    BufferPtr is pointer to buffer for data to be received into
    NumBytes is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.
    +
    +
    +
    Returns:
    The number of bytes received.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.

    + +
    +
    + +
    +
    + + + + + + + + + +
    int XUartPs_SelfTest (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    +

    The time for this test is proportional to the baud rate that has been set prior to calling this function.

    +

    The mode and control registers are restored before return.

    +
    Parameters:
    + + +
    InstancePtr is a pointer to the XUartPs instance
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if the test was successful
      • +
    +
    +
      +
    • XST_UART_TEST_FAIL if the test failed looping back the data
      • +
    +
    Note:
    +

    This function can hang if the hardware is not functioning properly.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    unsigned int XUartPs_Send (XUartPs *  InstancePtr,
    u8 *  BufferPtr,
    unsigned int  NumBytes 
    )
    +
    +
    +

    This functions sends the specified buffer using the device in either polled or interrupt driven mode. This function is non-blocking, if the device is busy sending data, it will return and indicate zero bytes were sent. Otherwise, it fills the TX FIFO as much as it can, and return the number of bytes sent.

    +

    In a polled mode, this function will only send as much data as TX FIFO can buffer. The application may need to call it repeatedly to send the entire buffer.

    +

    In interrupt mode, this function will start sending the specified buffer, then the interrupt handler will continue sending data until the entire buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartPs instance.
    BufferPtr is pointer to a buffer of data to be sent.
    NumBytes contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.
    +
    +
    +
    Returns:
    The number of bytes actually sent.
    +
    Note:
    +

    The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress.
    +
    +

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartPs_SetBaudRate (XUartPs *  InstancePtr,
    u32  BaudRate 
    )
    +
    +
    +

    Sets the baud rate for the device. Checks the input value for validity and also verifies that the requested rate can be configured to within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE. If the provided rate is not possible, the current setting is unchanged.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance
    BaudRate to be set
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if everything configured as expected
      • +
    • XST_UART_BAUD_ERROR if the requested rate is not available because there was too much error
      • +
    +
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    int XUartPs_SetDataFormat (XUartPs *  InstancePtr,
    XUartPsFormat *  FormatPtr 
    )
    +
    +
    +

    Sets the data format for the device. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    FormatPtr is a pointer to a format structure containing the data format to be set.
    +
    +
    +
    Returns:
      +
    • XST_SUCCESS if the data format was successfully set.
      • +
    • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
      • +
    • XST_INVALID_PARAM if one of the parameters was not valid.
      • +
    +
    +
    Note:
    +

    The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning. The asserts in this function will cause a warning if these fields are bytes.
    +
    +

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetFifoThreshold (XUartPs *  InstancePtr,
    u8  TriggerLevel 
    )
    +
    +
    +

    This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    TriggerLevel contains the trigger level to set.
    +
    +
    +
    Returns:
    None
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetFlowDelay (XUartPs *  InstancePtr,
    u8  FlowDelayValue 
    )
    +
    +
    +

    This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    FlowDelayValue is the Setting for the flow delay.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetHandler (XUartPs *  InstancePtr,
    XUartPs_Handler  FuncPtr,
    void *  CallBackRef 
    )
    +
    +
    +

    This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention.

    +
    Parameters:
    + + + + +
    InstancePtr is a pointer to the XUartPs instance
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    +

    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetInterruptMask (XUartPs *  InstancePtr,
    u32  Mask 
    )
    +
    +
    +

    This function sets the interrupt mask.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance
    Mask contains the interrupts to be enabled or disabled. A '1' enables an interupt, and a '0' disables.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetOperMode (XUartPs *  InstancePtr,
    u8  OperationMode 
    )
    +
    +
    +

    This function sets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    OperationMode is the mode of the UART.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetOptions (XUartPs *  InstancePtr,
    u16  Options 
    )
    +
    +
    +

    Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.

    +

    The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    Options contains the options to be set which are bit masks contained in the file xuartps.h and named XUARTPS_OPTION_*.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetRecvTimeout (XUartPs *  InstancePtr,
    u8  RecvTimeout 
    )
    +
    +
    +

    This function sets the Receive Timeout of the UART.

    +
    Parameters:
    + + + +
    InstancePtr is a pointer to the XUartPs instance.
    RecvTimeout setting allows the UART to detect an idle connection on the reciever data line. Timeout duration = RecvTimeout x 4 x Bit Period. 0 disables the timeout function.
    +
    +
    +
    Returns:
    None.
    +
    Note:
    None.
    + +
    +
    +
    +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__g_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__g_8c.html index 04dbe566..179f5053 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__g_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__g_8c.html @@ -2,64 +2,55 @@ - xuartps_g.c File Reference + Xilinx Driver uartps v2_2: xuartps_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_g.c File Reference

    Detailed Description

    -This file contains a configuration table where each entry is a configuration structure for an XUartPs device in the system.

    + + +

    +
    +

    xuartps_g.c File Reference

    #include "xparameters.h"
    +#include "xuartps.h"
    + + + +

    Variables

    XUartPs_Config XUartPs_ConfigTable []
    +

    Detailed Description

    +

    This file contains a configuration table where each entry is a configuration structure for an XUartPs device in the system.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- -----------------------------------------------
  1.00  drg/jz 05/13/08 First Release
  2.00  hk     22/01/14 Added check for selecting uart0 instance.
-
    -

    -#include "xparameters.h"
    -#include "xuartps.h"
    - - - - - -

    Variables

    XUartPs_Config XUartPs_ConfigTable []
    -

    Variable Documentation

    -

    - - - - -
    - +

    Variable Documentation

    + +
    +
    +
    - +
    XUartPs_Config XUartPs_ConfigTable[] XUartPs_Config XUartPs_ConfigTable[]
    -
    - - - - - -
    -   - - -

    + +

    Initial value:
     {
 
 
@@ -74,7 +65,13 @@ This file contains a configuration table where each entry is a configuration str
                 XPAR_PS7_UART_1_UART_CLK_FREQ_HZ
         }
 }
-
    Each XUartPs device in the system has an entry in this table.
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Each XUartPs device in the system has an entry in this table.

    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8c.html index dfb12f1a..b78c8096 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8c.html @@ -2,162 +2,139 @@ - xuartps_hw.c File Reference + Xilinx Driver uartps v2_2: xuartps_hw.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_hw.c File Reference

    Detailed Description

    + + + +
    +

    xuartps_hw.c File Reference

    #include "xuartps_hw.h"
    + + + + + +

    Functions

    void XUartPs_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartPs_RecvByte (u32 BaseAddress)
    void XUartPs_ResetHw (u32 BaseAddress)
    +

    Detailed Description

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- ----------------------------------------------
  1.00	drg/jz 01/12/10 First Release
  1.05a hk     08/22/13 Added reset function
-
    -

    -#include "xuartps_hw.h"
    - - - - - - - - - -

    Functions

    void XUartPs_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartPs_RecvByte (u32 BaseAddress)
    void XUartPs_ResetHw (u32 BaseAddress)
    -

    Function Documentation

    -

    - - - - -
    - +

    Function Documentation

    + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartPs_RecvByte ( u32  BaseAddress  ) u8 XUartPs_RecvByte (u32  BaseAddress ) 
    -
    - - - - - -
    -   - - -

    -This function receives a byte from the device. It operates in polled mode and blocks until a byte has received.

    -

    Parameters:
    + +
    +

    This function receives a byte from the device. It operates in polled mode and blocks until a byte has received.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    The data byte received.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The data byte received.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    void XUartPs_ResetHw ( u32  BaseAddress  ) void XUartPs_ResetHw (u32  BaseAddress ) 
    -
    - - - - - -
    -   - - -

    -This function resets UART

    -

    Parameters:
    + +
    +

    This function resets UART

    +
    Parameters:
    BaseAddress contains the base address of the device.
    +
    -
    Returns:
    None
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SendByte ( u32  BaseAddress, void XUartPs_SendByte (u32  BaseAddress,
    u8  Datau8  Data 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sends one byte using the device. This function operates in polled mode and blocks until the data has been put into the TX FIFO register.

    -

    Parameters:
    + +
    +

    This function sends one byte using the device. This function operates in polled mode and blocks until the data has been put into the TX FIFO register.

    +
    Parameters:
    BaseAddress contains the base address of the device.
    Data contains the byte to be sent.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8h.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8h.html index 1b8858c9..7ce115e4 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8h.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__hw_8h.html @@ -2,30 +2,204 @@ - xuartps_hw.h File Reference + Xilinx Driver uartps v2_2: xuartps_hw.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_hw.h File Reference

    Detailed Description

    -This header file contains the hardware interface of an XUartPs device.

    + + +

    +
    +

    xuartps_hw.h File Reference

    #include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xil_io.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XUARTPS_HW_H
    #define XUARTPS_MEDEMSR_DCDX   XUARTPS_MODEMSR_DDCD
    #define XUARTPS_MEDEMSR_RIX   XUARTPS_MODEMSR_TERI
    #define XUARTPS_MEDEMSR_DSRX   XUARTPS_MODEMSR_DDSR
    #define XUARTPS_MEDEMSR_CTSX   XUARTPS_MODEMSR_DCTS
    #define XUartPs_ReadReg(BaseAddress, RegOffset)   Xil_In32((BaseAddress) + (RegOffset))
    #define XUartPs_WriteReg(BaseAddress, RegOffset, RegisterValue)   Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
    #define XUartPs_IsReceiveData(BaseAddress)
    #define XUartPs_IsTransmitFull(BaseAddress)
    Register Map

    Register offsets for the UART.

    +

    #define XUARTPS_CR_OFFSET   0x00
    #define XUARTPS_MR_OFFSET   0x04
    #define XUARTPS_IER_OFFSET   0x08
    #define XUARTPS_IDR_OFFSET   0x0C
    #define XUARTPS_IMR_OFFSET   0x10
    #define XUARTPS_ISR_OFFSET   0x14
    #define XUARTPS_BAUDGEN_OFFSET   0x18
    #define XUARTPS_RXTOUT_OFFSET   0x1C
    #define XUARTPS_RXWM_OFFSET   0x20
    #define XUARTPS_MODEMCR_OFFSET   0x24
    #define XUARTPS_MODEMSR_OFFSET   0x28
    #define XUARTPS_SR_OFFSET   0x2C
    #define XUARTPS_FIFO_OFFSET   0x30
    #define XUARTPS_BAUDDIV_OFFSET   0x34
    #define XUARTPS_FLOWDEL_OFFSET   0x38
    #define XUARTPS_TXWM_OFFSET   0x44
    Control Register

    The Control register (CR) controls the major functions of the device.

    +

    Control Register Bit Definition

    +

    #define XUARTPS_CR_STOPBRK   0x00000100
    #define XUARTPS_CR_STARTBRK   0x00000080
    #define XUARTPS_CR_TORST   0x00000040
    #define XUARTPS_CR_TX_DIS   0x00000020
    #define XUARTPS_CR_TX_EN   0x00000010
    #define XUARTPS_CR_RX_DIS   0x00000008
    #define XUARTPS_CR_RX_EN   0x00000004
    #define XUARTPS_CR_EN_DIS_MASK   0x0000003C
    #define XUARTPS_CR_TXRST   0x00000002
    #define XUARTPS_CR_RXRST   0x00000001
    Mode Register

    The mode register (MR) defines the mode of transfer as well as the data format. If this register is modified during transmission or reception, data validity cannot be guaranteed.

    +

    Mode Register Bit Definition

    +

    #define XUARTPS_MR_CCLK   0x00000400
    #define XUARTPS_MR_CHMODE_R_LOOP   0x00000300
    #define XUARTPS_MR_CHMODE_L_LOOP   0x00000200
    #define XUARTPS_MR_CHMODE_ECHO   0x00000100
    #define XUARTPS_MR_CHMODE_NORM   0x00000000
    #define XUARTPS_MR_CHMODE_SHIFT   8
    #define XUARTPS_MR_CHMODE_MASK   0x00000300
    #define XUARTPS_MR_STOPMODE_2_BIT   0x00000080
    #define XUARTPS_MR_STOPMODE_1_5_BIT   0x00000040
    #define XUARTPS_MR_STOPMODE_1_BIT   0x00000000
    #define XUARTPS_MR_STOPMODE_SHIFT   6
    #define XUARTPS_MR_STOPMODE_MASK   0x000000A0
    #define XUARTPS_MR_PARITY_NONE   0x00000020
    #define XUARTPS_MR_PARITY_MARK   0x00000018
    #define XUARTPS_MR_PARITY_SPACE   0x00000010
    #define XUARTPS_MR_PARITY_ODD   0x00000008
    #define XUARTPS_MR_PARITY_EVEN   0x00000000
    #define XUARTPS_MR_PARITY_SHIFT   3
    #define XUARTPS_MR_PARITY_MASK   0x00000038
    #define XUARTPS_MR_CHARLEN_6_BIT   0x00000006
    #define XUARTPS_MR_CHARLEN_7_BIT   0x00000004
    #define XUARTPS_MR_CHARLEN_8_BIT   0x00000000
    #define XUARTPS_MR_CHARLEN_SHIFT   1
    #define XUARTPS_MR_CHARLEN_MASK   0x00000006
    #define XUARTPS_MR_CLKSEL   0x00000001
    Interrupt Registers

    Interrupt control logic uses the interrupt enable register (IER) and the interrupt disable register (IDR) to set the value of the bits in the interrupt mask register (IMR). The IMR determines whether to pass an interrupt to the interrupt status register (ISR). Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an interrupt. IMR and ISR are read only, and IER and IDR are write only. Reading either IER or IDR returns 0x00.

    +

    All four registers have the same bit definitions.

    +

    #define XUARTPS_IXR_TOVR   0x00001000
    #define XUARTPS_IXR_TNFUL   0x00000800
    #define XUARTPS_IXR_TTRIG   0x00000400
    #define XUARTPS_IXR_DMS   0x00000200
    #define XUARTPS_IXR_TOUT   0x00000100
    #define XUARTPS_IXR_PARITY   0x00000080
    #define XUARTPS_IXR_FRAMING   0x00000040
    #define XUARTPS_IXR_OVER   0x00000020
    #define XUARTPS_IXR_TXFULL   0x00000010
    #define XUARTPS_IXR_TXEMPTY   0x00000008
    #define XUARTPS_IXR_RXFULL   0x00000004
    #define XUARTPS_IXR_RXEMPTY   0x00000002
    #define XUARTPS_IXR_RXOVR   0x00000001
    #define XUARTPS_IXR_MASK   0x00001FFF
    Baud Rate Generator Register

    The baud rate generator control register (BRGR) is a 16 bit register that controls the receiver bit sample clock and baud rate. Valid values are 1 - 65535.

    +

    Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit in the MR register.

    +

    #define XUARTPS_BAUDGEN_DISABLE   0x00000000
    #define XUARTPS_BAUDGEN_MASK   0x0000FFFF
    #define XUARTPS_BAUDGEN_RESET_VAL   0x0000028B
    Baud Divisor Rate register

    The baud rate divider register (BDIV) controls how much the bit sample rate is divided by. It sets the baud rate. Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.

    +

    Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by the MR_CCLK bit in the MR register.

    +

    #define XUARTPS_BAUDDIV_MASK   0x000000FF
    #define XUARTPS_BAUDDIV_RESET_VAL   0x0000000F
    Receiver Timeout Register

    Use the receiver timeout register (RTR) to detect an idle condition on the receiver data line.

    +

    #define XUARTPS_RXTOUT_DISABLE   0x00000000
    #define XUARTPS_RXTOUT_MASK   0x000000FF
    Receiver FIFO Trigger Level Register

    Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at which the RX FIFO triggers an interrupt event.

    +

    #define XUARTPS_RXWM_DISABLE   0x00000000
    #define XUARTPS_RXWM_MASK   0x0000003F
    #define XUARTPS_RXWM_RESET_VAL   0x00000020
    Transmit FIFO Trigger Level Register

    Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at which the TX FIFO triggers an interrupt event.

    +

    #define XUARTPS_TXWM_MASK   0x0000003F
    #define XUARTPS_TXWM_RESET_VAL   0x00000020
    Modem Control Register

    This register (MODEMCR) controls the interface with the modem or data set, or a peripheral device emulating a modem.

    +

    #define XUARTPS_MODEMCR_FCM   0x00000010
    #define XUARTPS_MODEMCR_RTS   0x00000002
    #define XUARTPS_MODEMCR_DTR   0x00000001
    Modem Status Register

    This register (MODEMSR) indicates the current state of the control lines from a modem, or another peripheral device, to the CPU. In addition, four bits of the modem status register provide change information. These bits are set to a logic 1 whenever a control input from the modem changes state.

    +

    Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem status interrupt is generated and this is reflected in the modem status register.

    +

    #define XUARTPS_MODEMSR_FCMS   0x00000100
    #define XUARTPS_MODEMSR_DCD   0x00000080
    #define XUARTPS_MODEMSR_RI   0x00000040
    #define XUARTPS_MODEMSR_DSR   0x00000020
    #define XUARTPS_MODEMSR_CTS   0x00000010
    #define XUARTPS_MODEMSR_DDCD   0x00000008
    #define XUARTPS_MODEMSR_TERI   0x00000004
    #define XUARTPS_MODEMSR_DDSR   0x00000002
    #define XUARTPS_MODEMSR_DCTS   0x00000001
    Channel Status Register

    The channel status register (CSR) is provided to enable the control logic to monitor the status of bits in the channel interrupt status register, even if these are masked out by the interrupt mask register.

    +

    #define XUARTPS_SR_TNFUL   0x00004000
    #define XUARTPS_SR_TTRIG   0x00002000
    #define XUARTPS_SR_FLOWDEL   0x00001000
    #define XUARTPS_SR_TACTIVE   0x00000800
    #define XUARTPS_SR_RACTIVE   0x00000400
    #define XUARTPS_SR_DMS   0x00000200
    #define XUARTPS_SR_TOUT   0x00000100
    #define XUARTPS_SR_PARITY   0x00000080
    #define XUARTPS_SR_FRAME   0x00000040
    #define XUARTPS_SR_OVER   0x00000020
    #define XUARTPS_SR_TXFULL   0x00000010
    #define XUARTPS_SR_TXEMPTY   0x00000008
    #define XUARTPS_SR_RXFULL   0x00000004
    #define XUARTPS_SR_RXEMPTY   0x00000002
    #define XUARTPS_SR_RXOVR   0x00000001
    Flow Delay Register

    Operation of the flow delay register (FLOWDEL) is very similar to the receive FIFO trigger register. An internal trigger signal activates when the FIFO is filled to the level set by this register. This trigger will not cause an interrupt, although it can be read through the channel status register. In hardware flow control mode, RTS is deactivated when the trigger becomes active. RTS only resets when the FIFO level is four less than the level of the flow delay trigger and the flow delay trigger is not activated. A value less than 4 disables the flow delay.

    +

    #define XUARTPS_FLOWDEL_MASK   XUARTPS_RXWM_MASK

    Functions

    void XUartPs_SendByte (u32 BaseAddress, u8 Data)
    u8 XUartPs_RecvByte (u32 BaseAddress)
    void XUartPs_ResetHw (u32 BaseAddress)
    +

    Detailed Description

    +

    This header file contains the hardware interface of an XUartPs device.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- ----------------------------------------------
  1.00	drg/jz 01/12/10 First Release
  1.03a sg     09/04/12 Added defines for XUARTPS_IXR_TOVR,  XUARTPS_IXR_TNFUL
@@ -36,2966 +210,1767 @@ This header file contains the hardware interface of an 
-
-
    Register Map
    
-Register offsets for the UART. 

    
-#define     XUARTPS_CR_OFFSET   0x00
-
-#define XUARTPS_MR_OFFSET   0x04
-
-#define XUARTPS_IER_OFFSET   0x08
-
-#define XUARTPS_IDR_OFFSET   0x0C
-
-#define XUARTPS_IMR_OFFSET   0x10
-
-#define XUARTPS_ISR_OFFSET   0x14
-
-#define XUARTPS_BAUDGEN_OFFSET   0x18
-
-#define XUARTPS_RXTOUT_OFFSET   0x1C
-
-#define XUARTPS_RXWM_OFFSET   0x20
-
-#define XUARTPS_MODEMCR_OFFSET   0x24
-
-#define XUARTPS_MODEMSR_OFFSET   0x28
-
-#define XUARTPS_SR_OFFSET   0x2C
-
-#define XUARTPS_FIFO_OFFSET   0x30
-
-#define XUARTPS_BAUDDIV_OFFSET   0x34
-
-#define XUARTPS_FLOWDEL_OFFSET   0x38
-
-#define XUARTPS_TXWM_OFFSET   0x44
-
-
    Control Register
    
-The Control register (CR) controls the major functions of the device.
    
-Control Register Bit Definition 

    
-#define XUARTPS_CR_STOPBRK   0x00000100
-
-#define XUARTPS_CR_STARTBRK   0x00000080
-
-#define XUARTPS_CR_TORST   0x00000040
-
-#define XUARTPS_CR_TX_DIS   0x00000020
-
-#define XUARTPS_CR_TX_EN   0x00000010
-
-#define XUARTPS_CR_RX_DIS   0x00000008
-
-#define XUARTPS_CR_RX_EN   0x00000004
-
-#define XUARTPS_CR_EN_DIS_MASK   0x0000003C
-
-#define XUARTPS_CR_TXRST   0x00000002
-
-#define XUARTPS_CR_RXRST   0x00000001
-
-
    Mode Register
    
-The mode register (MR) defines the mode of transfer as well as the data format. If this register is modified during transmission or reception, data validity cannot be guaranteed.
    
-Mode Register Bit Definition 

    
-#define XUARTPS_MR_CCLK   0x00000400
-
-#define XUARTPS_MR_CHMODE_R_LOOP   0x00000300
-
-#define XUARTPS_MR_CHMODE_L_LOOP   0x00000200
-
-#define XUARTPS_MR_CHMODE_ECHO   0x00000100
-
-#define XUARTPS_MR_CHMODE_NORM   0x00000000
-
-#define XUARTPS_MR_CHMODE_SHIFT   8
-
-#define XUARTPS_MR_CHMODE_MASK   0x00000300
-
-#define XUARTPS_MR_STOPMODE_2_BIT   0x00000080
-
-#define XUARTPS_MR_STOPMODE_1_5_BIT   0x00000040
-
-#define XUARTPS_MR_STOPMODE_1_BIT   0x00000000
-
-#define XUARTPS_MR_STOPMODE_SHIFT   6
-
-#define XUARTPS_MR_STOPMODE_MASK   0x000000A0
-
-#define XUARTPS_MR_PARITY_NONE   0x00000020
-
-#define XUARTPS_MR_PARITY_MARK   0x00000018
-
-#define XUARTPS_MR_PARITY_SPACE   0x00000010
-
-#define XUARTPS_MR_PARITY_ODD   0x00000008
-
-#define XUARTPS_MR_PARITY_EVEN   0x00000000
-
-#define XUARTPS_MR_PARITY_SHIFT   3
-
-#define XUARTPS_MR_PARITY_MASK   0x00000038
-
-#define XUARTPS_MR_CHARLEN_6_BIT   0x00000006
-
-#define XUARTPS_MR_CHARLEN_7_BIT   0x00000004
-
-#define XUARTPS_MR_CHARLEN_8_BIT   0x00000000
-
-#define XUARTPS_MR_CHARLEN_SHIFT   1
-
-#define XUARTPS_MR_CHARLEN_MASK   0x00000006
-
-#define XUARTPS_MR_CLKSEL   0x00000001
-
-
    Interrupt Registers
    
-Interrupt control logic uses the interrupt enable register (IER) and the interrupt disable register (IDR) to set the value of the bits in the interrupt mask register (IMR). The IMR determines whether to pass an interrupt to the interrupt status register (ISR). Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an interrupt. IMR and ISR are read only, and IER and IDR are write only. Reading either IER or IDR returns 0x00.
    
-All four registers have the same bit definitions. 

    
-#define XUARTPS_IXR_TOVR   0x00001000
-
-#define XUARTPS_IXR_TNFUL   0x00000800
-
-#define XUARTPS_IXR_TTRIG   0x00000400
-
-#define XUARTPS_IXR_DMS   0x00000200
-
-#define XUARTPS_IXR_TOUT   0x00000100
-
-#define XUARTPS_IXR_PARITY   0x00000080
-
-#define XUARTPS_IXR_FRAMING   0x00000040
-
-#define XUARTPS_IXR_OVER   0x00000020
-
-#define XUARTPS_IXR_TXFULL   0x00000010
-
-#define XUARTPS_IXR_TXEMPTY   0x00000008
-
-#define XUARTPS_IXR_RXFULL   0x00000004
-
-#define XUARTPS_IXR_RXEMPTY   0x00000002
-
-#define XUARTPS_IXR_RXOVR   0x00000001
-
-#define XUARTPS_IXR_MASK   0x00001FFF
-
-
    Baud Rate Generator Register
    
-The baud rate generator control register (BRGR) is a 16 bit register that controls the receiver bit sample clock and baud rate. Valid values are 1 - 65535.
    
-Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit in the MR register. 

    
-#define XUARTPS_BAUDGEN_DISABLE   0x00000000
-
-#define XUARTPS_BAUDGEN_MASK   0x0000FFFF
-
-#define XUARTPS_BAUDGEN_RESET_VAL   0x0000028B
-
-
    Baud Divisor Rate register
    
-The baud rate divider register (BDIV) controls how much the bit sample rate is divided by. It sets the baud rate. Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.
    
-Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by the MR_CCLK bit in the MR register. 

    
-#define XUARTPS_BAUDDIV_MASK   0x000000FF
-
-#define XUARTPS_BAUDDIV_RESET_VAL   0x0000000F
-
-
    Receiver Timeout Register
    
-Use the receiver timeout register (RTR) to detect an idle condition on the receiver data line. 

    
-#define XUARTPS_RXTOUT_DISABLE   0x00000000
-
-#define XUARTPS_RXTOUT_MASK   0x000000FF
-
-
    Receiver FIFO Trigger Level Register
    
-Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at which the RX FIFO triggers an interrupt event. 

    
-#define XUARTPS_RXWM_DISABLE   0x00000000
-
-#define XUARTPS_RXWM_MASK   0x0000003F
-
-#define XUARTPS_RXWM_RESET_VAL   0x00000020
-
-
    Transmit FIFO Trigger Level Register
    
-Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at which the TX FIFO triggers an interrupt event. 

    
-#define XUARTPS_TXWM_MASK   0x0000003F
-
-#define XUARTPS_TXWM_RESET_VAL   0x00000020
-
-
    Modem Control Register
    
-This register (MODEMCR) controls the interface with the modem or data set, or a peripheral device emulating a modem. 

    
-#define XUARTPS_MODEMCR_FCM   0x00000010
-
-#define XUARTPS_MODEMCR_RTS   0x00000002
-
-#define XUARTPS_MODEMCR_DTR   0x00000001
-
-
    Modem Status Register
    
-This register (MODEMSR) indicates the current state of the control lines from a modem, or another peripheral device, to the CPU. In addition, four bits of the modem status register provide change information. These bits are set to a logic 1 whenever a control input from the modem changes state.
    
-Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem status interrupt is generated and this is reflected in the modem status register. 

    
-#define XUARTPS_MODEMSR_FCMS   0x00000100
-
-#define XUARTPS_MODEMSR_DCD   0x00000080
-
-#define XUARTPS_MODEMSR_RI   0x00000040
-
-#define XUARTPS_MODEMSR_DSR   0x00000020
-
-#define XUARTPS_MODEMSR_CTS   0x00000010
-
-#define XUARTPS_MODEMSR_DDCD   0x00000008
-
-#define XUARTPS_MODEMSR_TERI   0x00000004
-
-#define XUARTPS_MODEMSR_DDSR   0x00000002
-
-#define XUARTPS_MODEMSR_DCTS   0x00000001
-
-
    Channel Status Register
    
-The channel status register (CSR) is provided to enable the control logic to monitor the status of bits in the channel interrupt status register, even if these are masked out by the interrupt mask register. 

    
-#define XUARTPS_SR_TNFUL   0x00004000
-
-#define XUARTPS_SR_TTRIG   0x00002000
-
-#define XUARTPS_SR_FLOWDEL   0x00001000
-
-#define XUARTPS_SR_TACTIVE   0x00000800
-
-#define XUARTPS_SR_RACTIVE   0x00000400
-
-#define XUARTPS_SR_DMS   0x00000200
-
-#define XUARTPS_SR_TOUT   0x00000100
-
-#define XUARTPS_SR_PARITY   0x00000080
-
-#define XUARTPS_SR_FRAME   0x00000040
-
-#define XUARTPS_SR_OVER   0x00000020
-
-#define XUARTPS_SR_TXFULL   0x00000010
-
-#define XUARTPS_SR_TXEMPTY   0x00000008
-
-#define XUARTPS_SR_RXFULL   0x00000004
-
-#define XUARTPS_SR_RXEMPTY   0x00000002
-
-#define XUARTPS_SR_RXOVR   0x00000001
-
-
    Flow Delay Register
    
-Operation of the flow delay register (FLOWDEL) is very similar to the receive FIFO trigger register. An internal trigger signal activates when the FIFO is filled to the level set by this register. This trigger will not cause an interrupt, although it can be read through the channel status register. In hardware flow control mode, RTS is deactivated when the trigger becomes active. RTS only resets when the FIFO level is four less than the level of the flow delay trigger and the flow delay trigger is not activated. A value less than 4 disables the flow delay. 

    
-#define XUARTPS_FLOWDEL_MASK   XUARTPS_RXWM_MASK
-
-
    Defines
    
-#define XUartPs_ReadReg(BaseAddress, RegOffset)   Xil_In32((BaseAddress) + (RegOffset))
-
-#define XUartPs_WriteReg(BaseAddress, RegOffset, RegisterValue)   Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
-
-#define XUartPs_IsReceiveData(BaseAddress)
-
-#define XUartPs_IsTransmitFull(BaseAddress)
-
-
    Functions
    
-void XUartPs_SendByte (u32 BaseAddress, u8 Data)
-
-u8 XUartPs_RecvByte (u32 BaseAddress)
-
-void XUartPs_ResetHw (u32 BaseAddress)
-
-
-
    Define Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+			constant definitions.
     
    Define Documentation
    
+
+
    
+
    
+      
     
    
-          
+          
    
         
    #define XUARTPS_BAUDDIV_MASK   0x000000FF          #define XUARTPS_BAUDDIV_MASK   0x000000FF
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    8 bit baud divider mask 
    
 
-
    
-8 bit baud divider mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDDIV_OFFSET   0x34          #define XUARTPS_BAUDDIV_OFFSET   0x34
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Baud Rate Divider [7:0] 
    
 
-
    
-Baud Rate Divider [7:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDDIV_RESET_VAL   0x0000000F          #define XUARTPS_BAUDDIV_RESET_VAL   0x0000000F
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Reset value 
    
 
-
    
-Reset value     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDGEN_DISABLE   0x00000000          #define XUARTPS_BAUDGEN_DISABLE   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Disable clock 
    
 
-
    
-Disable clock     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDGEN_MASK   0x0000FFFF          #define XUARTPS_BAUDGEN_MASK   0x0000FFFF
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bits mask 
    
 
-
    
-Valid bits mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDGEN_OFFSET   0x18          #define XUARTPS_BAUDGEN_OFFSET   0x18
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Baud Rate Generator [15:0] 
    
 
-
    
-Baud Rate Generator [15:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_BAUDGEN_RESET_VAL   0x0000028B          #define XUARTPS_BAUDGEN_RESET_VAL   0x0000028B
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Reset value 
    
 
-
    
-Reset value     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_EN_DIS_MASK   0x0000003C          #define XUARTPS_CR_EN_DIS_MASK   0x0000003C
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Enable/disable Mask 
    
 
-
    
-Enable/disable Mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_OFFSET   0x00          #define XUARTPS_CR_OFFSET   0x00
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Control Register [8:0] 
    
 
-
    
-Control Register [8:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_RX_DIS   0x00000008          #define XUARTPS_CR_RX_DIS   0x00000008
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX disabled. 
    
 
-
    
-RX disabled.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_RX_EN   0x00000004          #define XUARTPS_CR_RX_EN   0x00000004
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX enabled 
    
 
-
    
-RX enabled     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_RXRST   0x00000001          #define XUARTPS_CR_RXRST   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX logic reset 
    
 
-
    
-RX logic reset     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_STARTBRK   0x00000080          #define XUARTPS_CR_STARTBRK   0x00000080
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Set break 
    
 
-
    
-Set break     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_STOPBRK   0x00000100          #define XUARTPS_CR_STOPBRK   0x00000100
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Stop transmission of break 
    
 
-
    
-Stop transmission of break     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_TORST   0x00000040          #define XUARTPS_CR_TORST   0x00000040
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX timeout counter restart 
    
 
-
    
-RX timeout counter restart     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_TX_DIS   0x00000020          #define XUARTPS_CR_TX_DIS   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX disabled. 
    
 
-
    
-TX disabled.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_TX_EN   0x00000010          #define XUARTPS_CR_TX_EN   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX enabled 
    
 
-
    
-TX enabled     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_CR_TXRST   0x00000002          #define XUARTPS_CR_TXRST   0x00000002
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX logic reset 
    
 
-
    
-TX logic reset     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_FIFO_OFFSET   0x30          #define XUARTPS_FIFO_OFFSET   0x30
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    FIFO [7:0] 
    
 
-
    
-FIFO [7:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_FLOWDEL_MASK   XUARTPS_RXWM_MASK          #define XUARTPS_FLOWDEL_MASK   XUARTPS_RXWM_MASK
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bit mask 
    
 
-
    
-Valid bit mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_FLOWDEL_OFFSET   0x38          #define XUARTPS_FLOWDEL_OFFSET   0x38
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Flow Delay [5:0] 
    
 
-
    
-Flow Delay [5:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IDR_OFFSET   0x0C          #define XUARTPS_HW_H
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-Interrupt Disable [12:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IER_OFFSET   0x08          #define XUARTPS_IDR_OFFSET   0x0C
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Interrupt Disable [12:0] 
    
 
-
    
-Interrupt Enable [12:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IMR_OFFSET   0x10          #define XUARTPS_IER_OFFSET   0x08
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Interrupt Enable [12:0] 
    
 
-
    
-Interrupt Mask [12:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_ISR_OFFSET   0x14          #define XUARTPS_IMR_OFFSET   0x10
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Interrupt Mask [12:0] 
    
 
-
    
-Interrupt Status [12:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
    
         
    #define XUartPs_IsReceiveData          ( BaseAddress            ) #define XUARTPS_ISR_OFFSET   0x14
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Interrupt Status [12:0] 
    
 
-
    
-Value:
    !((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) &        \
-        XUARTPS_SR_RXEMPTY) == XUARTPS_SR_RXEMPTY)
-
    Determine if there is receive data in the receiver and/or FIFO.
    
-
    Parameters:
    
+
    
+
+
+
    
+
    
+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
    #define XUartPs_IsReceiveData(BaseAddress  ) 
    
+
    
+
    
+Value:
    !((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) &        \
+        XUARTPS_SR_RXEMPTY) == XUARTPS_SR_RXEMPTY)
+
    Determine if there is receive data in the receiver and/or FIFO.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device.
    
   
    
+  
    
 
    
-
    Returns:
    TRUE if there is receive data, FALSE otherwise.
    
-
    Note:
    C-Style signature: u32 XUartPs_IsReceiveData(u32 BaseAddress) 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    TRUE if there is receive data, FALSE otherwise.
    
+
    Note:
    C-Style signature: u32 XUartPs_IsReceiveData(u32 BaseAddress) 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    #define XUartPs_IsTransmitFull          ( BaseAddress            ) #define XUartPs_IsTransmitFull(BaseAddress  ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-Value:
    ((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) &         \
-         XUARTPS_SR_TXFULL) == XUARTPS_SR_TXFULL)
-
    Determine if a byte of data can be sent with the transmitter.
    
-
    Parameters:
    
+
+
    
+Value:
    ((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) &         \
+         XUARTPS_SR_TXFULL) == XUARTPS_SR_TXFULL)
+
    Determine if a byte of data can be sent with the transmitter.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device.
    
   
    
+  
    
 
    
-
    Returns:
    TRUE if the TX FIFO is full, FALSE if a byte can be put in the FIFO.
    
-
    Note:
    C-Style signature: u32 XUartPs_IsTransmitFull(u32 BaseAddress) 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    TRUE if the TX FIFO is full, FALSE if a byte can be put in the FIFO.
    
+
    Note:
    C-Style signature: u32 XUartPs_IsTransmitFull(u32 BaseAddress) 
    
+
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_DMS   0x00000200          #define XUARTPS_IXR_DMS   0x00000200
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Modem status change interrupt 
    
 
-
    
-Modem status change interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_FRAMING   0x00000040          #define XUARTPS_IXR_FRAMING   0x00000040
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Framing error interrupt 
    
 
-
    
-Framing error interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_MASK   0x00001FFF          #define XUARTPS_IXR_MASK   0x00001FFF
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bit mask 
    
 
-
    
-Valid bit mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_OVER   0x00000020          #define XUARTPS_IXR_OVER   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Overrun error interrupt 
    
 
-
    
-Overrun error interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_PARITY   0x00000080          #define XUARTPS_IXR_PARITY   0x00000080
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Parity error interrupt 
    
 
-
    
-Parity error interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_RXEMPTY   0x00000002          #define XUARTPS_IXR_RXEMPTY   0x00000002
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO empty interrupt. 
    
 
-
    
-RX FIFO empty interrupt.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_RXFULL   0x00000004          #define XUARTPS_IXR_RXFULL   0x00000004
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO full interrupt. 
    
 
-
    
-RX FIFO full interrupt.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_RXOVR   0x00000001          #define XUARTPS_IXR_RXOVR   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO trigger interrupt. 
    
 
-
    
-RX FIFO trigger interrupt.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TNFUL   0x00000800          #define XUARTPS_IXR_TNFUL   0x00000800
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Tx FIFO Nearly Full interrupt 
    
 
-
    
-Tx FIFO Nearly Full interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TOUT   0x00000100          #define XUARTPS_IXR_TOUT   0x00000100
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Timeout error interrupt 
    
 
-
    
-Timeout error interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TOVR   0x00001000          #define XUARTPS_IXR_TOVR   0x00001000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Tx FIFO Overflow interrupt 
    
 
-
    
-Tx FIFO Overflow interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TTRIG   0x00000400          #define XUARTPS_IXR_TTRIG   0x00000400
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Tx Trig interrupt 
    
 
-
    
-Tx Trig interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TXEMPTY   0x00000008          #define XUARTPS_IXR_TXEMPTY   0x00000008
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO empty interrupt. 
    
 
-
    
-TX FIFO empty interrupt.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_IXR_TXFULL   0x00000010          #define XUARTPS_IXR_TXFULL   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO full interrupt. 
    
 
-
    
-TX FIFO full interrupt.     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMCR_DTR   0x00000001          #define XUARTPS_MEDEMSR_CTSX   XUARTPS_MODEMSR_DCTS
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-Data terminal ready     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMCR_FCM   0x00000010          #define XUARTPS_MEDEMSR_DCDX   XUARTPS_MODEMSR_DDCD
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-Flow control mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMCR_OFFSET   0x24          #define XUARTPS_MEDEMSR_DSRX   XUARTPS_MODEMSR_DDSR
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-Modem Control [5:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMCR_RTS   0x00000002          #define XUARTPS_MEDEMSR_RIX   XUARTPS_MODEMSR_TERI
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
 
-
    
-Request to send     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_CTS   0x00000010          #define XUARTPS_MODEMCR_DTR   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Data terminal ready 
    
 
-
    
-Complement of CTS input     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_DCD   0x00000080          #define XUARTPS_MODEMCR_FCM   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Flow control mode 
    
 
-
    
-Complement of DCD input     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_DCTS   0x00000001          #define XUARTPS_MODEMCR_OFFSET   0x24
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Modem Control [5:0] 
    
 
-
    
-Change of CTS     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_DDCD   0x00000008          #define XUARTPS_MODEMCR_RTS   0x00000002
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Request to send 
    
 
-
    
-Delta DCD indicator     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_DDSR   0x00000002          #define XUARTPS_MODEMSR_CTS   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Complement of CTS input 
    
 
-
    
-Change of DSR     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_DSR   0x00000020          #define XUARTPS_MODEMSR_DCD   0x00000080
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Complement of DCD input 
    
 
-
    
-Complement of DSR input     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_FCMS   0x00000100          #define XUARTPS_MODEMSR_DCTS   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Change of CTS 
    
 
-
    
-Flow control mode (FCMS)     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_OFFSET   0x28          #define XUARTPS_MODEMSR_DDCD   0x00000008
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Delta DCD indicator 
    
 
-
    
-Modem Status [8:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_RI   0x00000040          #define XUARTPS_MODEMSR_DDSR   0x00000002
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Change of DSR 
    
 
-
    
-Complement of RI input     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MODEMSR_TERI   0x00000004          #define XUARTPS_MODEMSR_DSR   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Complement of DSR input 
    
 
-
    
-Trailing Edge Ring Indicator     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CCLK   0x00000400          #define XUARTPS_MODEMSR_FCMS   0x00000100
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Flow control mode (FCMS) 
    
 
-
    
-Input clock selection     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHARLEN_6_BIT   0x00000006          #define XUARTPS_MODEMSR_OFFSET   0x28
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Modem Status [8:0] 
    
 
-
    
-6 bits data     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHARLEN_7_BIT   0x00000004          #define XUARTPS_MODEMSR_RI   0x00000040
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Complement of RI input 
    
 
-
    
-7 bits data     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHARLEN_8_BIT   0x00000000          #define XUARTPS_MODEMSR_TERI   0x00000004
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Trailing Edge Ring Indicator 
    
 
-
    
-8 bits data     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHARLEN_MASK   0x00000006          #define XUARTPS_MR_CCLK   0x00000400
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Input clock selection 
    
 
-
    
-Data length mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHARLEN_SHIFT   1          #define XUARTPS_MR_CHARLEN_6_BIT   0x00000006
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    6 bits data 
    
 
-
    
-Data Length shift     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_ECHO   0x00000100          #define XUARTPS_MR_CHARLEN_7_BIT   0x00000004
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    7 bits data 
    
 
-
    
-Auto echo mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_L_LOOP   0x00000200          #define XUARTPS_MR_CHARLEN_8_BIT   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    8 bits data 
    
 
-
    
-Local loopback mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_MASK   0x00000300          #define XUARTPS_MR_CHARLEN_MASK   0x00000006
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Data length mask 
    
 
-
    
-Mode mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_NORM   0x00000000          #define XUARTPS_MR_CHARLEN_SHIFT   1
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Data Length shift 
    
 
-
    
-Normal mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_R_LOOP   0x00000300          #define XUARTPS_MR_CHMODE_ECHO   0x00000100
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Auto echo mode 
    
 
-
    
-Remote loopback mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CHMODE_SHIFT   8          #define XUARTPS_MR_CHMODE_L_LOOP   0x00000200
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Local loopback mode 
    
 
-
    
-Mode shift     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_CLKSEL   0x00000001          #define XUARTPS_MR_CHMODE_MASK   0x00000300
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Mode mask 
    
 
-
    
-Input clock selection     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_OFFSET   0x04          #define XUARTPS_MR_CHMODE_NORM   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Normal mode 
    
 
-
    
-Mode Register [9:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_EVEN   0x00000000          #define XUARTPS_MR_CHMODE_R_LOOP   0x00000300
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Remote loopback mode 
    
 
-
    
-Even parity mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_MARK   0x00000018          #define XUARTPS_MR_CHMODE_SHIFT   8
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Mode shift 
    
 
-
    
-Mark parity mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_MASK   0x00000038          #define XUARTPS_MR_CLKSEL   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Input clock selection 
    
 
-
    
-Parity mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_NONE   0x00000020          #define XUARTPS_MR_OFFSET   0x04
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Mode Register [9:0] 
    
 
-
    
-No parity mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_ODD   0x00000008          #define XUARTPS_MR_PARITY_EVEN   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Even parity mode 
    
 
-
    
-Odd parity mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_SHIFT   3          #define XUARTPS_MR_PARITY_MARK   0x00000018
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Mark parity mode 
    
 
-
    
-Parity setting shift     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_PARITY_SPACE   0x00000010          #define XUARTPS_MR_PARITY_MASK   0x00000038
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Parity mask 
    
 
-
    
-Space parity mode     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_STOPMODE_1_5_BIT   0x00000040          #define XUARTPS_MR_PARITY_NONE   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    No parity mode 
    
 
-
    
-1.5 stop bits     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_STOPMODE_1_BIT   0x00000000          #define XUARTPS_MR_PARITY_ODD   0x00000008
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Odd parity mode 
    
 
-
    
-1 stop bit     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_STOPMODE_2_BIT   0x00000080          #define XUARTPS_MR_PARITY_SHIFT   3
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Parity setting shift 
    
 
-
    
-2 stop bits     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_STOPMODE_MASK   0x000000A0          #define XUARTPS_MR_PARITY_SPACE   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Space parity mode 
    
 
-
    
-Stop bits mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_MR_STOPMODE_SHIFT   6          #define XUARTPS_MR_STOPMODE_1_5_BIT   0x00000040
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    1.5 stop bits 
    
 
-
    
-Stop bits shift     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
-          
-          
-          
+          
    
         
    #define XUartPs_ReadReg          ( BaseAddress,         
    RegOffset            )    Xil_In32((BaseAddress) + (RegOffset))#define XUARTPS_MR_STOPMODE_1_BIT   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    1 stop bit 
    
 
-
    
-Read a UART register.
    
-
    Parameters:
    
+
    
+
+
+
    
+
    
+      
+        
+          
+        
+      
    #define XUARTPS_MR_STOPMODE_2_BIT   0x00000080
    
+
    
+
    
+
    2 stop bits 
    
+
+
    
+
    
+
+
    
+
    
+      
+        
+          
+        
+      
    #define XUARTPS_MR_STOPMODE_MASK   0x000000A0
    
+
    
+
    
+
    Stop bits mask 
    
+
+
    
+
    
+
+
    
+
    
+      
+        
+          
+        
+      
    #define XUARTPS_MR_STOPMODE_SHIFT   6
    
+
    
+
    
+
    Stop bits shift 
    
+
+
    
+
    
+
+
    
+
    
+      
+        
+          
+          
+          
+        
+        
+          
+          
+          
+          
+          
+          
+        
+      
    #define XUartPs_ReadReg(BaseAddress, 
    RegOffset  )    Xil_In32((BaseAddress) + (RegOffset))
    
+
    
+
    
+
    Read a UART register.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device. 
    
     
    RegOffset contains the offset from the base address of the device.
    
   
    
+  
    
 
    
-
    Returns:
    The value read from the register.
    
-
    Note:
    C-Style signature: u32 XUartPs_ReadReg(u32 BaseAddress, int RegOffset) 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The value read from the register.
    
+
    Note:
    C-Style signature: u32 XUartPs_ReadReg(u32 BaseAddress, int RegOffset) 
    
+
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXTOUT_DISABLE   0x00000000          #define XUARTPS_RXTOUT_DISABLE   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Disable time out 
    
 
-
    
-Disable time out     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXTOUT_MASK   0x000000FF          #define XUARTPS_RXTOUT_MASK   0x000000FF
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bits mask 
    
 
-
    
-Valid bits mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXTOUT_OFFSET   0x1C          #define XUARTPS_RXTOUT_OFFSET   0x1C
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX Timeout [7:0] 
    
 
-
    
-RX Timeout [7:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXWM_DISABLE   0x00000000          #define XUARTPS_RXWM_DISABLE   0x00000000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Disable RX trigger interrupt 
    
 
-
    
-Disable RX trigger interrupt     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXWM_MASK   0x0000003F          #define XUARTPS_RXWM_MASK   0x0000003F
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bits mask 
    
 
-
    
-Valid bits mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXWM_OFFSET   0x20          #define XUARTPS_RXWM_OFFSET   0x20
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO Trigger Level [5:0] 
    
 
-
    
-RX FIFO Trigger Level [5:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_RXWM_RESET_VAL   0x00000020          #define XUARTPS_RXWM_RESET_VAL   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Reset value 
    
 
-
    
-Reset value     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_DMS   0x00000200          #define XUARTPS_SR_DMS   0x00000200
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Delta modem status change 
    
 
-
    
-Delta modem status change     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_FLOWDEL   0x00001000          #define XUARTPS_SR_FLOWDEL   0x00001000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO fill over flow delay 
    
 
-
    
-RX FIFO fill over flow delay     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_FRAME   0x00000040          #define XUARTPS_SR_FRAME   0x00000040
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX frame error 
    
 
-
    
-RX frame error     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_OFFSET   0x2C          #define XUARTPS_SR_OFFSET   0x2C
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Channel Status [14:0] 
    
 
-
    
-Channel Status [14:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_OVER   0x00000020          #define XUARTPS_SR_OVER   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX overflow error 
    
 
-
    
-RX overflow error     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_PARITY   0x00000080          #define XUARTPS_SR_PARITY   0x00000080
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX parity error 
    
 
-
    
-RX parity error     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_RACTIVE   0x00000400          #define XUARTPS_SR_RACTIVE   0x00000400
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX active 
    
 
-
    
-RX active     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_RXEMPTY   0x00000002          #define XUARTPS_SR_RXEMPTY   0x00000002
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO empty 
    
 
-
    
-RX FIFO empty     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_RXFULL   0x00000004          #define XUARTPS_SR_RXFULL   0x00000004
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO full 
    
 
-
    
-RX FIFO full     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_RXOVR   0x00000001          #define XUARTPS_SR_RXOVR   0x00000001
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX FIFO fill over trigger 
    
 
-
    
-RX FIFO fill over trigger     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TACTIVE   0x00000800          #define XUARTPS_SR_TACTIVE   0x00000800
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX active 
    
 
-
    
-TX active     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TNFUL   0x00004000          #define XUARTPS_SR_TNFUL   0x00004000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO Nearly Full Status 
    
 
-
    
-TX FIFO Nearly Full Status     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TOUT   0x00000100          #define XUARTPS_SR_TOUT   0x00000100
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    RX timeout 
    
 
-
    
-RX timeout     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TTRIG   0x00002000          #define XUARTPS_SR_TTRIG   0x00002000
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO Trigger Status 
    
 
-
    
-TX FIFO Trigger Status     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TXEMPTY   0x00000008          #define XUARTPS_SR_TXEMPTY   0x00000008
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO empty 
    
 
-
    
-TX FIFO empty     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_SR_TXFULL   0x00000010          #define XUARTPS_SR_TXFULL   0x00000010
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO full 
    
 
-
    
-TX FIFO full     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_TXWM_MASK   0x0000003F          #define XUARTPS_TXWM_MASK   0x0000003F
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Valid bits mask 
    
 
-
    
-Valid bits mask     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_TXWM_OFFSET   0x44          #define XUARTPS_TXWM_OFFSET   0x44
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    TX FIFO Trigger Level [5:0] 
    
 
-
    
-TX FIFO Trigger Level [5:0]     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
+          
    
         
    #define XUARTPS_TXWM_RESET_VAL   0x00000020          #define XUARTPS_TXWM_RESET_VAL   0x00000020
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
+
+
    
+
    Reset value 
    
 
-
    
-Reset value     
    
-
    
-
-  
-    
-  
-
    
-      
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
-          
-          
-          
-          
-          
-          
+          
+          
+          
+        
+        
+          
+          
+          
+        
+        
+          
+          
+          
+          
+          
+          
    
         
    #define XUartPs_WriteReg          ( BaseAddress,         
    RegOffset,         
    RegisterValue            )    Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))#define XUartPs_WriteReg(BaseAddress, 
    RegOffset, 
    RegisterValue  )    Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-Write a UART register.
    
-
    Parameters:
    
+
+
    
+
    Write a UART register.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device. 
    
     
    RegOffset contains the offset from the base address of the device. 
    
     
    RegisterValue is the value to be written to the register.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    C-Style signature: void XUartPs_WriteReg(u32 BaseAddress, int RegOffset, u16 RegisterValue) 
    
-    
    
-
    Function Documentation
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None.
    
+
    Note:
    C-Style signature: void XUartPs_WriteReg(u32 BaseAddress, int RegOffset, u16 RegisterValue) 
    
+
+
+
+
    Function Documentation
    
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    u8 XUartPs_RecvByte           ( u32  BaseAddress           ) u8 XUartPs_RecvByte (u32  BaseAddress ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function receives a byte from the device. It operates in polled mode and blocks until a byte has received.
    
-
    Parameters:
    
+
+
    
+
    This function receives a byte from the device. It operates in polled mode and blocks until a byte has received.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device.
    
   
    
+  
    
 
    
-
    Returns:
    The data byte received.
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    The data byte received.
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
-          
-          
+          
+          
+          
+          
+          
+          
    
         
    void XUartPs_ResetHw           ( u32  BaseAddress           ) void XUartPs_ResetHw (u32  BaseAddress ) 
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function resets UART
    
-
    Parameters:
    
+
+
    
+
    This function resets UART
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device.
    
   
    
+  
    
 
    
-
    Returns:
    None
    
-
    Note:
    None. 
    
-    
    
-
    
-
-  
-    
-  
-
    
-      
+
    Returns:
    None
    
+
    Note:
    None. 
    
+
+
+
+
+
    
+
    
+      
    
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
-          
+          
+          
+          
+          
-          
-          
-          
+          
+          
+          
    
         
    void XUartPs_SendByte           ( u32  BaseAddress, void XUartPs_SendByte (u32  BaseAddress, 
         
    
         
    u8  Datau8  Data 
         
    
         
    ) )
         
    
       
    
-    
    
-
-  
-    
-    
-  
-
    
-       
-    
-
-
    
-This function sends one byte using the device. This function operates in polled mode and blocks until the data has been put into the TX FIFO register.
    
-
    Parameters:
    
+
+
    
+
    This function sends one byte using the device. This function operates in polled mode and blocks until the data has been put into the TX FIFO register.
    
+
    Parameters:
    
   
    
     
    BaseAddress contains the base address of the device. 
    
     
    Data contains the byte to be sent.
    
   
    
+  
    
 
    
-
    Returns:
    None.
    
-
    Note:
    None. 
    
-    
    
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
+
    Returns:
    None.
    
+
    Note:
    None. 
    
+
+
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__intr_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__intr_8c.html index daa4a0d4..d1a217d3 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__intr_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__intr_8c.html @@ -2,217 +2,239 @@ - xuartps_intr.c File Reference + Xilinx Driver uartps v2_2: xuartps_intr.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_intr.c File Reference

    Detailed Description

    -This file contains the functions for interrupt handling

    + + +

    +
    +

    xuartps_intr.c File Reference

    #include "xuartps.h"
    + + + + + + + + + + +

    Typedefs

    typedef void(* Handler )(XUartPs *InstancePtr)

    Functions

    unsigned int XUartPs_ReceiveBuffer (XUartPs *InstancePtr)
    unsigned int XUartPs_SendBuffer (XUartPs *InstancePtr)
    u32 XUartPs_GetInterruptMask (XUartPs *InstancePtr)
    void XUartPs_SetInterruptMask (XUartPs *InstancePtr, u32 Mask)
    void XUartPs_SetHandler (XUartPs *InstancePtr, XUartPs_Handler FuncPtr, void *CallBackRef)
    void XUartPs_InterruptHandler (XUartPs *InstancePtr)
    +

    Detailed Description

    +

    This file contains the functions for interrupt handling

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- -----------------------------------------------
  1.00  drg/jz 01/13/10 First Release
-
    -

    -#include "xuartps.h"
    - - - - - - - - - - - -

    Functions

    u32 XUartPs_GetInterruptMask (XUartPs *InstancePtr)
    void XUartPs_SetInterruptMask (XUartPs *InstancePtr, u32 Mask)
    void XUartPs_SetHandler (XUartPs *InstancePtr, XUartPs_Handler FuncPtr, void *CallBackRef)
    void XUartPs_InterruptHandler (XUartPs *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Typedef Documentation

    + +
    +
    +
    - - - - - - +
    u32 XUartPs_GetInterruptMask ( XUartPs *  InstancePtr  ) typedef void(* Handler)(XUartPs *InstancePtr)
    -
    - - - - - -
    -   - + +
    -

    -This function gets the interrupt mask

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    u32 XUartPs_GetInterruptMask (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function gets the interrupt mask

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    The current interrupt mask. The mask indicates which interupts are enabled.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The current interrupt mask. The mask indicates which interupts are enabled.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    void XUartPs_InterruptHandler ( XUartPs *  InstancePtr  ) void XUartPs_InterruptHandler (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function is the interrupt handler for the driver. It must be connected to an interrupt system by the application such that it can be called when an interrupt occurs.

    -

    Parameters:
    + +
    +

    This function is the interrupt handler for the driver. It must be connected to an interrupt system by the application such that it can be called when an interrupt occurs.

    +
    Parameters:
    InstancePtr contains a pointer to the driver instance
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - - - - - - - - - - - - - - - - + + + + + +
    void XUartPs_SetHandler ( XUartPs *  InstancePtr,
    XUartPs_Handler  FuncPtr,
    void *  CallBackRef
    ) unsigned int XUartPs_ReceiveBuffer (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - + +
    -

    -This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention.

    -

    Parameters:
    +
    + + +
    +
    + + + + + + + + + +
    unsigned int XUartPs_SendBuffer (XUartPs *  InstancePtr ) 
    +
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void XUartPs_SetHandler (XUartPs *  InstancePtr,
    XUartPs_Handler  FuncPtr,
    void *  CallBackRef 
    )
    +
    +
    +

    This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance
    FuncPtr is the pointer to the callback function.
    CallBackRef is the upper layer callback reference passed back when the callback function is invoked.
    +
    -
    Returns:
    None.
    -
    Note:
    -There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    +

    There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it)

    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetInterruptMask ( XUartPs *  InstancePtr, void XUartPs_SetInterruptMask (XUartPs *  InstancePtr,
    u32  Masku32  Mask 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the interrupt mask.

    -

    Parameters:
    + +
    +

    This function sets the interrupt mask.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance
    Mask contains the interrupts to be enabled or disabled. A '1' enables an interupt, and a '0' disables.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__options_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__options_8c.html index 23ff022d..6751ca1c 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__options_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__options_8c.html @@ -2,653 +2,544 @@ - xuartps_options.c File Reference + Xilinx Driver uartps v2_2: xuartps_options.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_options.c File Reference

    Detailed Description

    -The implementation of the options functions for the XUartPs driver.

    + + +

    +
    +

    xuartps_options.c File Reference

    #include "xuartps.h"
    + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  Mapping

    Defines

    #define XUARTPS_NUM_OPTIONS   (sizeof(OptionsTable) / sizeof(Mapping))

    Functions

    u16 XUartPs_GetOptions (XUartPs *InstancePtr)
    void XUartPs_SetOptions (XUartPs *InstancePtr, u16 Options)
    u8 XUartPs_GetFifoThreshold (XUartPs *InstancePtr)
    void XUartPs_SetFifoThreshold (XUartPs *InstancePtr, u8 TriggerLevel)
    u16 XUartPs_GetModemStatus (XUartPs *InstancePtr)
    u32 XUartPs_IsSending (XUartPs *InstancePtr)
    u8 XUartPs_GetOperMode (XUartPs *InstancePtr)
    void XUartPs_SetOperMode (XUartPs *InstancePtr, u8 OperationMode)
    u8 XUartPs_GetFlowDelay (XUartPs *InstancePtr)
    void XUartPs_SetFlowDelay (XUartPs *InstancePtr, u8 FlowDelayValue)
    u8 XUartPs_GetRecvTimeout (XUartPs *InstancePtr)
    void XUartPs_SetRecvTimeout (XUartPs *InstancePtr, u8 RecvTimeout)
    int XUartPs_SetDataFormat (XUartPs *InstancePtr, XUartPsFormat *FormatPtr)
    void XUartPs_GetDataFormat (XUartPs *InstancePtr, XUartPsFormat *FormatPtr)
    +

    Detailed Description

    +

    The implementation of the options functions for the XUartPs driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- -----------------------------------------------
  1.00  drg/jz 01/13/10 First Release
  1.00  sdm    09/27/11 Fixed a bug in XUartPs_SetFlowDelay where the input
-			value was not being written to the register.

    -
    -

    -#include "xuartps.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

    Functions

    u16 XUartPs_GetOptions (XUartPs *InstancePtr)
    void XUartPs_SetOptions (XUartPs *InstancePtr, u16 Options)
    u8 XUartPs_GetFifoThreshold (XUartPs *InstancePtr)
    void XUartPs_SetFifoThreshold (XUartPs *InstancePtr, u8 TriggerLevel)
    u16 XUartPs_GetModemStatus (XUartPs *InstancePtr)
    u32 XUartPs_IsSending (XUartPs *InstancePtr)
    u8 XUartPs_GetOperMode (XUartPs *InstancePtr)
    void XUartPs_SetOperMode (XUartPs *InstancePtr, u8 OperationMode)
    u8 XUartPs_GetFlowDelay (XUartPs *InstancePtr)
    void XUartPs_SetFlowDelay (XUartPs *InstancePtr, u8 FlowDelayValue)
    u8 XUartPs_GetRecvTimeout (XUartPs *InstancePtr)
    void XUartPs_SetRecvTimeout (XUartPs *InstancePtr, u8 RecvTimeout)
    int XUartPs_SetDataFormat (XUartPs *InstancePtr, XUartPsFormat *FormatPtr)
    void XUartPs_GetDataFormat (XUartPs *InstancePtr, XUartPsFormat *FormatPtr)
    -

    Function Documentation

    -

    - - - - -
    - + value was not being written to the register.

    Define Documentation

    + +
    +
    +
    - - - - - - - - - - - - - - - +
    void XUartPs_GetDataFormat ( XUartPs *  InstancePtr,
    XUartPsFormat *  FormatPtr
    ) #define XUARTPS_NUM_OPTIONS   (sizeof(OptionsTable) / sizeof(Mapping))
    -
    - - - - - -
    -   - + +
    -

    -Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void XUartPs_GetDataFormat (XUartPs *  InstancePtr,
    XUartPsFormat *  FormatPtr 
    )
    +
    +
    +

    Gets the data format for the specified UART. The data format includes the baud rate, number of data bits, number of stop bits, and parity.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    FormatPtr is a pointer to a format structure that will contain the data format after this call completes.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartPs_GetFifoThreshold ( XUartPs *  InstancePtr  ) u8 XUartPs_GetFifoThreshold (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    -

    Parameters:
    + +
    +

    This function gets the receive FIFO trigger level. The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    The current receive FIFO trigger level. This is a value from 0-31.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The current receive FIFO trigger level. This is a value from 0-31.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartPs_GetFlowDelay ( XUartPs *  InstancePtr  ) u8 XUartPs_GetFlowDelay (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    -

    Parameters:
    + +
    +

    This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    -The Flow Delay is specified by constants defined in xuartps_hw.h. The constants are named XUARTPS_FLOWDEL*

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    +

    The Flow Delay is specified by constants defined in xuartps_hw.h. The constants are named XUARTPS_FLOWDEL*

    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u16 XUartPs_GetModemStatus ( XUartPs *  InstancePtr  ) u16 XUartPs_GetModemStatus (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.

    -

    Parameters:
    + +
    +

    This function gets the modem status from the specified UART. The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    -The modem status which are bit masks that are contained in the file xuartps.h and named XUARTPS_MODEM_*.

    -

    Note:
    -The bit masks used for the modem status are the exact bits of the modem status register with no abstraction.
    -

    - - - - -
    - +
    Returns:
    +

    The modem status which are bit masks that are contained in the file xuartps.h and named XUARTPS_MODEM_*.

    +
    Note:
    +

    The bit masks used for the modem status are the exact bits of the modem status register with no abstraction.

    + + + + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartPs_GetOperMode ( XUartPs *  InstancePtr  ) u8 XUartPs_GetOperMode (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function gets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    -

    Parameters:
    + +
    +

    This function gets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    -The operational mode is specified by constants defined in xuartps.h. The constants are named XUARTPS_OPER_MODE_*

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    +

    The operational mode is specified by constants defined in xuartps.h. The constants are named XUARTPS_OPER_MODE_*

    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u16 XUartPs_GetOptions ( XUartPs *  InstancePtr  ) u16 XUartPs_GetOptions (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.

    -

    Parameters:
    + +
    +

    Gets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simulataneously.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    -The current options for the UART. The optionss are bit masks that are contained in the file xuartps.h and named XUARTPS_OPTION_*.

    -

    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    +

    The current options for the UART. The optionss are bit masks that are contained in the file xuartps.h and named XUARTPS_OPTION_*.

    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u8 XUartPs_GetRecvTimeout ( XUartPs *  InstancePtr  ) u8 XUartPs_GetRecvTimeout (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function gets the Receive Timeout of the UART.

    -

    Parameters:
    + +
    +

    This function gets the Receive Timeout of the UART.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
    The current setting for receive time out.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    The current setting for receive time out.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - - - + + + + + +
    u32 XUartPs_IsSending ( XUartPs *  InstancePtr  ) u32 XUartPs_IsSending (XUartPs *  InstancePtr ) 
    -
    - - - - - -
    -   - - -

    -This function determines if the specified UART is sending data.

    -

    Parameters:
    + +
    +

    This function determines if the specified UART is sending data.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    +
    -
    Returns:
      -
    • TRUE if the UART is sending data
    • FALSE if UART is not sending data
    +
    Returns:
      +
    • TRUE if the UART is sending data
      • +
    • FALSE if UART is not sending data
      • +
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    int XUartPs_SetDataFormat ( XUartPs *  InstancePtr, int XUartPs_SetDataFormat (XUartPs *  InstancePtr,
    XUartPsFormat *  FormatPtrXUartPsFormat *  FormatPtr 
    ) )
    -
    - - - - - -
    -   - - -

    -Sets the data format for the device. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    -

    Parameters:
    + +
    +

    Sets the data format for the device. The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    FormatPtr is a pointer to a format structure containing the data format to be set.
    +
    -
    Returns:
      -
    • XST_SUCCESS if the data format was successfully set.
    • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
    • XST_INVALID_PARAM if one of the parameters was not valid.
    +
    Returns:
      +
    • XST_SUCCESS if the data format was successfully set.
      • +
    • XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.
      • +
    • XST_INVALID_PARAM if one of the parameters was not valid.
      • +
    -
    Note:
    -The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning. The asserts in this function will cause a warning if these fields are bytes.
    -
    -
    -

    - - - - -
    - +
    Note:
    +

    The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning. The asserts in this function will cause a warning if these fields are bytes.
    +
    +

    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetFifoThreshold ( XUartPs *  InstancePtr, void XUartPs_SetFifoThreshold (XUartPs *  InstancePtr,
    u8  TriggerLevelu8  TriggerLevel 
    ) )
    -
    - - - - - -
    -   - - -

    -This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    -

    Parameters:
    + +
    +

    This functions sets the receive FIFO trigger level. The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    TriggerLevel contains the trigger level to set.
    +
    -
    Returns:
    None
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetFlowDelay ( XUartPs *  InstancePtr, void XUartPs_SetFlowDelay (XUartPs *  InstancePtr,
    u8  FlowDelayValueu8  FlowDelayValue 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    -

    Parameters:
    + +
    +

    This function sets the Flow Delay. 0 - 3: Flow delay inactive 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    FlowDelayValue is the Setting for the flow delay.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetOperMode ( XUartPs *  InstancePtr, void XUartPs_SetOperMode (XUartPs *  InstancePtr,
    u8  OperationModeu8  OperationMode 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    -

    Parameters:
    + +
    +

    This function sets the operational mode of the UART. The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    OperationMode is the mode of the UART.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetOptions ( XUartPs *  InstancePtr, void XUartPs_SetOptions (XUartPs *  InstancePtr,
    u16  Optionsu16  Options 
    ) )
    -
    - - - - - -
    -   - - -

    -Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.

    -The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.

    -

    Parameters:
    + +
    +

    Sets the options for the specified driver instance. The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.

    +

    The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.

    +
    Parameters:
    - +
    InstancePtr is a pointer to the XUartPs instance.
    Options contains the options to be set which are bit masks contained in the file xuartps.h and named XUARTPS_OPTION_*.
    Options contains the options to be set which are bit masks contained in the file xuartps.h and named XUARTPS_OPTION_*.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -

    - - - - -
    - +
    Returns:
    None.
    +
    Note:
    None.
    + + + + +
    +
    +
    - - - - + + + + - - - - + + + + - - - + + +
    void XUartPs_SetRecvTimeout ( XUartPs *  InstancePtr, void XUartPs_SetRecvTimeout (XUartPs *  InstancePtr,
    u8  RecvTimeoutu8  RecvTimeout 
    ) )
    -
    - - - - - -
    -   - - -

    -This function sets the Receive Timeout of the UART.

    -

    Parameters:
    + +
    +

    This function sets the Receive Timeout of the UART.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance.
    RecvTimeout setting allows the UART to detect an idle connection on the reciever data line. Timeout duration = RecvTimeout x 4 x Bit Period. 0 disables the timeout function.
    +
    -
    Returns:
    None.
    -
    Note:
    None.
    -
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

    Returns:
    None.
    +
    Note:
    None.
    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__selftest_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__selftest_8c.html index 93a8f586..8f67f8c1 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__selftest_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__selftest_8c.html @@ -2,84 +2,99 @@ - xuartps_selftest.c File Reference + Xilinx Driver uartps v2_2: xuartps_selftest.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - -
    -
    -
    -
    -

    xuartps_selftest.c File Reference

    Detailed Description

    -This file contains the self-test functions for the XUartPs driver.

    + + +

    +
    +

    xuartps_selftest.c File Reference

    #include "xstatus.h"
    +#include "xuartps.h"
    + + + + + +

    Defines

    #define XUARTPS_TOTAL_BYTES   32

    Functions

    int XUartPs_SelfTest (XUartPs *InstancePtr)
    +

    Detailed Description

    +

    This file contains the self-test functions for the XUartPs driver.

    - MODIFICATION HISTORY:

    -

     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- -----------------------------------------------
  1.00	drg/jz 01/13/108First Release
-
    -

    -#include "xstatus.h"
    -#include "xuartps.h"
    - - - - - -

    Functions

    int XUartPs_SelfTest (XUartPs *InstancePtr)
    -

    Function Documentation

    -

    - - - - -
    - +

    Define Documentation

    + +
    +
    +
    - - - - - - +
    int XUartPs_SelfTest ( XUartPs *  InstancePtr  ) #define XUARTPS_TOTAL_BYTES   32
    -
    - - - - - -
    -   - + +
    -

    -This function runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    -The time for this test is proportional to the baud rate that has been set prior to calling this function.

    -The mode and control registers are restored before return.

    -

    Parameters:
    +
    + +

    Function Documentation

    + +
    +
    + + + + + + + + + +
    int XUartPs_SelfTest (XUartPs *  InstancePtr ) 
    +
    +
    +

    This function runs a self-test on the driver and hardware device. This self test performs a local loopback and verifies data can be sent and received.

    +

    The time for this test is proportional to the baud rate that has been set prior to calling this function.

    +

    The mode and control registers are restored before return.

    +
    Parameters:
    InstancePtr is a pointer to the XUartPs instance
    +
    -
    Returns:
      -
    • XST_SUCCESS if the test was successful
    +
    Returns:
      +
    • XST_SUCCESS if the test was successful
      • +
      -
    • XST_UART_TEST_FAIL if the test failed looping back the data
    -

    -

    Note:
    -This function can hang if the hardware is not functioning properly.
    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +

  • XST_UART_TEST_FAIL if the test failed looping back the data
    • + +
    Note:
    +

    This function can hang if the hardware is not functioning properly.

    + +
    + + +

    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

    + + diff --git a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__sinit_8c.html b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__sinit_8c.html index bd30a4aa..a027202f 100755 --- a/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/uartps/doc/html/api/xuartps__sinit_8c.html @@ -2,105 +2,93 @@ - xuartps_sinit.c File Reference + Xilinx Driver uartps v2_2: xuartps_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
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    xuartps_sinit.c File Reference

    Detailed Description

    -The implementation of the XUartPs driver's static initialzation functionality.

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    xuartps_sinit.c File Reference

    #include "xstatus.h"
    +#include "xparameters.h"
    +#include "xuartps.h"
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    Functions

    XUartPs_Config * XUartPs_LookupConfig (u16 DeviceId)

    Variables

    XUartPs_Config XUartPs_ConfigTable []
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    Detailed Description

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    The implementation of the XUartPs driver's static initialzation functionality.

    - MODIFICATION HISTORY:

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     Ver   Who    Date	Changes
+ MODIFICATION HISTORY:
     Ver   Who    Date	Changes
  ----- ------ -------- -----------------------------------------------
  1.00  drg/jz 01/13/10 First Release
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    -#include "xstatus.h"
    -#include "xparameters.h"
    -#include "xuartps.h"
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    Functions

    XUartPs_Config * XUartPs_LookupConfig (u16 DeviceId)

    Variables

    XUartPs_Config XUartPs_ConfigTable []
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    Function Documentation

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    Function Documentation

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    XUartPs_Config* XUartPs_LookupConfig ( u16  DeviceId  ) XUartPs_Config* XUartPs_LookupConfig (u16  DeviceId ) 
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    -Looks up the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

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    Parameters:
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    Looks up the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

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    Parameters:
    DeviceId contains the ID of the device
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    Returns:
    A pointer to the configuration structure or NULL if the specified device is not in the system.
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    Note:
    None.
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    Variable Documentation

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    Returns:
    A pointer to the configuration structure or NULL if the specified device is not in the system.
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    Note:
    None.
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    Variable Documentation

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    XUartPs_Config XUartPs_ConfigTable[] XUartPs_Config XUartPs_ConfigTable[]
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    Each XUartPs device in the system has an entry in this table.

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    +Copyright © 1995-2014 Xilinx, Inc. All rights reserved. +

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    -Each XUartPs device in the system has an entry in this table.

    -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.