From 2b64f34e3c19ad5d4d061d7fb4cafcf5ce1f0de0 Mon Sep 17 00:00:00 2001 From: P L Sai Krishna Date: Mon, 5 Jan 2015 15:28:45 +0530 Subject: [PATCH] sdps: Removed IAR compilation errors in the driver. This patch removes alignment for Buffers since cacheInvalidate will take care of it and used cacheInvalidate API instaed of cacheFlush in changeBusSpeed API. Signed-off-by: P L Sai Krishna --- XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c b/XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c index ceb7ed71..095fa650 100755 --- a/XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c +++ b/XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c @@ -450,13 +450,7 @@ int XSdPs_Change_BusSpeed(XSdPs *InstancePtr) #ifndef MMC_CARD u32 ClockReg; -#ifdef __ICCARM__ -#pragma data_alignment = 32 u8 ReadBuff[64]; -#pragma data_alignment = 4 -#else - u8 ReadBuff[64] __attribute__ ((aligned(32))); -#endif u16 BlkCnt; u16 BlkSize; #endif @@ -474,7 +468,7 @@ int XSdPs_Change_BusSpeed(XSdPs *InstancePtr) XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, ReadBuff); - Xil_DCacheFlushRange(ReadBuff, 64); + Xil_DCacheInvalidateRange(ReadBuff, 64); XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_XFER_MODE_OFFSET,