diff --git a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_hello_world_example.c b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_hello_world_example.c index 83346b42..0fbcc285 100644 --- a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_hello_world_example.c +++ b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_hello_world_example.c @@ -153,9 +153,7 @@ int UartPsHelloWorldExample(u16 DeviceId) XUartPs_SetBaudRate(&Uart_Ps, 115200); while (SentCount < (sizeof(HelloWorld) - 1)) { - /* - * Transmit the data - */ + /* Transmit the data */ SentCount += XUartPs_Send(&Uart_Ps, &HelloWorld[SentCount], 1); } diff --git a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c index 54d93fb8..7fd2d85f 100644 --- a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c +++ b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c @@ -140,9 +140,7 @@ int main(void) { int Status; - /* - * Run the UartPs Interrupt example, specify the the Device ID - */ + /* Run the UartPs Interrupt example, specify the the Device ID */ Status = UartPsIntrExample(&InterruptController, &UartPs, UART_DEVICE_ID, UART_INT_IRQ_ID); if (Status != XST_SUCCESS) { @@ -212,9 +210,7 @@ int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr, return XST_FAILURE; } - /* - * Check hardware build - */ + /* Check hardware build */ Status = XUartPs_SelfTest(UartInstPtr); if (Status != XST_SUCCESS) { return XST_FAILURE; @@ -303,9 +299,7 @@ int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr, } } - /* - * Verify the entire receive buffer was successfully received - */ + /* Verify the entire receive buffer was successfully received */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { if (RecvBuffer[Index] != SendBuffer[Index]) { BadByteCount++; @@ -314,15 +308,11 @@ int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr, - /* - * Set the UART in Normal Mode - */ + /* Set the UART in Normal Mode */ XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_NORMAL); - /* - * If any bytes were not correct, return an error - */ + /* If any bytes were not correct, return an error */ if (BadByteCount != 0) { return XST_FAILURE; } @@ -353,16 +343,12 @@ int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr, ***************************************************************************/ void Handler(void *CallBackRef, u32 Event, unsigned int EventData) { - /* - * All of the data has been sent - */ + /* All of the data has been sent */ if (Event == XUARTPS_EVENT_SENT_DATA) { TotalSentCount = EventData; } - /* - * All of the data has been received - */ + /* All of the data has been received */ if (Event == XUARTPS_EVENT_RECV_DATA) { TotalReceivedCount = EventData; } @@ -433,9 +419,7 @@ static int SetupInterruptSystem(XScuGic *IntcInstancePtr, #ifndef TESTAPP_GEN XScuGic_Config *IntcConfig; /* Config for interrupt controller */ - /* - * Initialize the interrupt controller driver - */ + /* Initialize the interrupt controller driver */ IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID); if (NULL == IntcConfig) { return XST_FAILURE; @@ -468,16 +452,12 @@ static int SetupInterruptSystem(XScuGic *IntcInstancePtr, return XST_FAILURE; } - /* - * Enable the interrupt for the device - */ + /* Enable the interrupt for the device */ XScuGic_Enable(IntcInstancePtr, UartIntrId); #ifndef TESTAPP_GEN - /* - * Enable interrupts - */ + /* Enable interrupts */ Xil_ExceptionEnable(); #endif diff --git a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_low_echo_example.c b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_low_echo_example.c index b584060d..0484aef9 100644 --- a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_low_echo_example.c +++ b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_low_echo_example.c @@ -153,9 +153,7 @@ int UartPsEchoExample(u32 UartBaseAddress) CntrlRegister = XUartPs_ReadReg(UartBaseAddress, XUARTPS_CR_OFFSET); - /* - * Enable TX and RX for the device - */ + /* Enable TX and RX for the device */ XUartPs_WriteReg(UartBaseAddress, XUARTPS_CR_OFFSET, ((CntrlRegister & ~XUARTPS_CR_EN_DIS_MASK) | XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN)); @@ -167,27 +165,19 @@ int UartPsEchoExample(u32 UartBaseAddress) SendBuffer[Index] = Index + '0'; } - /* - * Send the entire transmit buffer. - */ + /* Send the entire transmit buffer. */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { - /* - * Wait until there is space in TX FIFO - */ + /* Wait until there is space in TX FIFO */ while (XUartPs_IsTransmitFull(UartBaseAddress)); - /* - * Write the byte into the TX FIFO - */ + /* Write the byte into the TX FIFO */ XUartPs_WriteReg(UartBaseAddress, XUARTPS_FIFO_OFFSET, SendBuffer[Index]); } Running = TRUE; while (Running) { - /* - * Wait until there is data - */ + /* Wait until there is data */ while (!XUartPs_IsReceiveData(UartBaseAddress)); RecvChar = XUartPs_ReadReg(UartBaseAddress, diff --git a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_polled_example.c b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_polled_example.c index 6e5737e4..dee5b986 100644 --- a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_polled_example.c +++ b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_polled_example.c @@ -167,17 +167,13 @@ int UartPsPolledExample(u16 DeviceId) return XST_FAILURE; } - /* - * Check hardware build. - */ + /* Check hardware build. */ Status = XUartPs_SelfTest(&Uart_PS); if (Status != XST_SUCCESS) { return XST_FAILURE; } - /* - * Use local loopback mode. - */ + /* Use local loopback mode. */ XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_LOCAL_LOOP); /* @@ -189,9 +185,7 @@ int UartPsPolledExample(u16 DeviceId) RecvBuffer[Index] = 0; } - /* - * Block sending the buffer. - */ + /* Block sending the buffer. */ SentCount = XUartPs_Send(&Uart_PS, SendBuffer, TEST_BUFFER_SIZE); if (SentCount != TEST_BUFFER_SIZE) { return XST_FAILURE; @@ -206,9 +200,7 @@ int UartPsPolledExample(u16 DeviceId) LoopCount++; } - /* - * Block receiving the buffer. - */ + /* Block receiving the buffer. */ ReceivedCount = 0; while (ReceivedCount < TEST_BUFFER_SIZE) { ReceivedCount += @@ -226,9 +218,7 @@ int UartPsPolledExample(u16 DeviceId) } } - /* - * Restore to normal mode. - */ + /* Restore to normal mode. */ XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_NORMAL); return XST_SUCCESS; diff --git a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_selftest_example.c b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_selftest_example.c index dedb5ac8..05df3c42 100644 --- a/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_selftest_example.c +++ b/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_selftest_example.c @@ -97,9 +97,7 @@ int main(void) { int Status; - /* - * Run the selftest example - */ + /* Run the selftest example */ Status = UartPsSelfTestExample(UART_DEVICE_ID); if (Status != XST_SUCCESS) { xil_printf("UART Selftest Example Failed\r\n"); @@ -144,9 +142,7 @@ int UartPsSelfTestExample(u16 DeviceId) return XST_FAILURE; } - /* - * Perform a self-test to check hardware build. - */ + /* Perform a self-test to check hardware build. */ Status = XUartPs_SelfTest(&Uart_Ps); if (Status != XST_SUCCESS) { return XST_FAILURE; diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps.c b/XilinxProcessorIPLib/drivers/uartps/src/xuartps.c index 9347ee26..344c05be 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps.c +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps.c @@ -132,22 +132,16 @@ s32 XUartPs_CfgInitialize(XUartPs *InstancePtr, u32 ModeRegister; u32 BaudRate; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(Config != NULL); - /* - * Setup the driver instance using passed in parameters - */ + /* Setup the driver instance using passed in parameters */ InstancePtr->Config.BaseAddress = EffectiveAddr; InstancePtr->Config.InputClockHz = Config->InputClockHz; InstancePtr->Config.ModemPinsConnected = Config->ModemPinsConnected; - /* - * Initialize other instance data to default values - */ + /* Initialize other instance data to default values */ InstancePtr->Handler = XUartPs_StubHandler; InstancePtr->SendBuffer.NextBytePtr = NULL; @@ -161,9 +155,7 @@ s32 XUartPs_CfgInitialize(XUartPs *InstancePtr, /* Initialize the platform data */ InstancePtr->Platform = XGetPlatform_Info(); - /* - * Flag that the driver instance is ready to use - */ + /* Flag that the driver instance is ready to use */ InstancePtr->IsReady = XIL_COMPONENT_IS_READY; /* @@ -183,41 +175,29 @@ s32 XUartPs_CfgInitialize(XUartPs *InstancePtr, ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); - /* - * Mask off what's already there - */ + /* Mask off what's already there */ ModeRegister &= (~((u32)XUARTPS_MR_CHARLEN_MASK | (u32)XUARTPS_MR_STOPMODE_MASK | (u32)XUARTPS_MR_PARITY_MASK)); - /* - * Set the register value to the desired data format - */ + /* Set the register value to the desired data format */ ModeRegister |= ((u32)XUARTPS_MR_CHARLEN_8_BIT | (u32)XUARTPS_MR_STOPMODE_1_BIT | (u32)XUARTPS_MR_PARITY_NONE); - /* - * Write the mode register out - */ + /* Write the mode register out */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET, ModeRegister); - /* - * Set the RX FIFO trigger at 8 data bytes. - */ + /* Set the RX FIFO trigger at 8 data bytes. */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_RXWM_OFFSET, 0x08U); - /* - * Set the RX timeout to 1, which will be 4 character time - */ + /* Set the RX timeout to 1, which will be 4 character time */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_RXTOUT_OFFSET, 0x01U); - /* - * Disable all interrupts, polled mode is the default - */ + /* Disable all interrupts, polled mode is the default */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK); @@ -265,9 +245,7 @@ u32 XUartPs_Send(XUartPs *InstancePtr, u8 *BufferPtr, { u32 BytesSent; - /* - * Asserts validate the input arguments - */ + /* Asserts validate the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(BufferPtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -279,9 +257,7 @@ u32 XUartPs_Send(XUartPs *InstancePtr, u8 *BufferPtr, XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET, (XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_TXFULL)); - /* - * Setup the buffer parameters - */ + /* Setup the buffer parameters */ InstancePtr->SendBuffer.RequestedBytes = NumBytes; InstancePtr->SendBuffer.RemainingBytes = NumBytes; InstancePtr->SendBuffer.NextBytePtr = BufferPtr; @@ -332,9 +308,7 @@ u32 XUartPs_Recv(XUartPs *InstancePtr, u32 ReceivedCount; u32 ImrRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(BufferPtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -348,21 +322,15 @@ u32 XUartPs_Recv(XUartPs *InstancePtr, XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK); - /* - * Setup the buffer parameters - */ + /* Setup the buffer parameters */ InstancePtr->ReceiveBuffer.RequestedBytes = NumBytes; InstancePtr->ReceiveBuffer.RemainingBytes = NumBytes; InstancePtr->ReceiveBuffer.NextBytePtr = BufferPtr; - /* - * Receive the data from the device - */ + /* Receive the data from the device */ ReceivedCount = XUartPs_ReceiveBuffer(InstancePtr); - /* - * Restore the interrupt state - */ + /* Restore the interrupt state */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET, ImrRegister); @@ -410,23 +378,17 @@ u32 XUartPs_SendBuffer(XUartPs *InstancePtr) while ((!XUartPs_IsTransmitFull(InstancePtr->Config.BaseAddress)) && (InstancePtr->SendBuffer.RemainingBytes > SentCount)) { - /* - * Fill the FIFO from the buffer - */ + /* Fill the FIFO from the buffer */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_FIFO_OFFSET, ((u32)InstancePtr->SendBuffer. NextBytePtr[SentCount])); - /* - * Increment the send count. - */ + /* Increment the send count. */ SentCount++; } - /* - * Update the buffer to reflect the bytes that were sent from it - */ + /* Update the buffer to reflect the bytes that were sent from it */ InstancePtr->SendBuffer.NextBytePtr += SentCount; InstancePtr->SendBuffer.RemainingBytes -= SentCount; @@ -553,9 +515,7 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) u32 ModeReg; u32 InputClk; - /* - * Asserts validate the input arguments - */ + /* Asserts validate the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertNonvoid(BaudRate <= (u32)XUARTPS_MAX_RATE); @@ -568,9 +528,7 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) if ((BaudRate * 2) > InstancePtr->Config.InputClockHz) { return XST_UART_BAUD_ERROR; } - /* - * Check whether the input clock is divided by 8 - */ + /* Check whether the input clock is divided by 8 */ ModeReg = XUartPs_ReadReg( InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); @@ -585,19 +543,13 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) */ for (IterBAUDDIV = 4; IterBAUDDIV < 255; IterBAUDDIV++) { - /* - * Calculate the value for BRGR register - */ + /* Calculate the value for BRGR register */ BRGR_Value = InputClk / (BaudRate * (IterBAUDDIV + 1)); - /* - * Calculate the baud rate from the BRGR value - */ + /* Calculate the baud rate from the BRGR value */ CalcBaudRate = InputClk/ (BRGR_Value * (IterBAUDDIV + 1)); - /* - * Avoid unsigned integer underflow - */ + /* Avoid unsigned integer underflow */ if (BaudRate > CalcBaudRate) { BaudError = BaudRate - CalcBaudRate; } @@ -605,9 +557,7 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) BaudError = CalcBaudRate - BaudRate; } - /* - * Find the calculated baud rate closest to requested baud rate. - */ + /* Find the calculated baud rate closest to requested baud rate. */ if (Best_Error > BaudError) { Best_BRGR = BRGR_Value; @@ -616,17 +566,13 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) } } - /* - * Make sure the best error is not too large. - */ + /* Make sure the best error is not too large. */ PercentError = (Best_Error * 100) / BaudRate; if (XUARTPS_MAX_BAUD_ERROR_RATE < PercentError) { return XST_UART_BAUD_ERROR; } - /* - * Disable TX and RX to avoid glitches when setting the baud rate. - */ + /* Disable TX and RX to avoid glitches when setting the baud rate. */ XUartPs_DisableUart(InstancePtr); XUartPs_WriteReg(InstancePtr->Config.BaseAddress, @@ -634,15 +580,11 @@ s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate) XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_BAUDDIV_OFFSET, Best_BAUDDIV); - /* - * RX and TX SW reset - */ + /* RX and TX SW reset */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET, XUARTPS_CR_TXRST | XUARTPS_CR_RXRST); - /* - * Enable device - */ + /* Enable device */ XUartPs_EnableUart(InstancePtr); InstancePtr->BaudRate = BaudRate; @@ -673,8 +615,6 @@ static void XUartPs_StubHandler(void *CallBackRef, u32 Event, (void *) CallBackRef; (void) Event; (void) ByteCount; - /* - * Assert occurs always since this is a stub and should never be called - */ + /* Assert occurs always since this is a stub and should never be called */ Xil_AssertVoidAlways(); } diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps.h b/XilinxProcessorIPLib/drivers/uartps/src/xuartps.h index 235e46af..3b11e441 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps.h +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps.h @@ -280,9 +280,7 @@ typedef struct { * to MIO or FMIO */ } XUartPs_Config; -/* - * Keep track of state information about a data buffer in the interrupt mode. - */ +/* Keep track of state information about a data buffer in the interrupt mode. */ typedef struct { u8 *NextBytePtr; u32 RequestedBytes; @@ -442,14 +440,10 @@ typedef struct { /************************** Function Prototypes *****************************/ -/* - * Static lookup function implemented in xuartps_sinit.c - */ +/* Static lookup function implemented in xuartps_sinit.c */ XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId); -/* - * Interface functions implemented in xuartps.c - */ +/* Interface functions implemented in xuartps.c */ s32 XUartPs_CfgInitialize(XUartPs *InstancePtr, XUartPs_Config * Config, u32 EffectiveAddr); @@ -461,9 +455,7 @@ u32 XUartPs_Recv(XUartPs *InstancePtr,u8 *BufferPtr, s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate); -/* - * Options functions in xuartps_options.c - */ +/* Options functions in xuartps_options.c */ void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options); u16 XUartPs_GetOptions(XUartPs *InstancePtr); @@ -492,9 +484,7 @@ s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr); void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr); -/* - * interrupt functions in xuartps_intr.c - */ +/* interrupt functions in xuartps_intr.c */ u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr); void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask); @@ -504,9 +494,7 @@ void XUartPs_InterruptHandler(XUartPs *InstancePtr); void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr, void *CallBackRef); -/* - * self-test functions in xuartps_selftest.c - */ +/* self-test functions in xuartps_selftest.c */ s32 XUartPs_SelfTest(XUartPs *InstancePtr); #ifdef __cplusplus diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_hw.c b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_hw.c index aff5ef92..d09ba1a4 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_hw.c +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_hw.c @@ -77,16 +77,12 @@ *****************************************************************************/ void XUartPs_SendByte(u32 BaseAddress, u8 Data) { - /* - * Wait until there is space in TX FIFO - */ + /* Wait until there is space in TX FIFO */ while (XUartPs_IsTransmitFull(BaseAddress)) { ; } - /* - * Write the byte into the TX FIFO - */ + /* Write the byte into the TX FIFO */ XUartPs_WriteReg(BaseAddress, XUARTPS_FIFO_OFFSET, (u32)Data); } @@ -106,16 +102,12 @@ void XUartPs_SendByte(u32 BaseAddress, u8 Data) u8 XUartPs_RecvByte(u32 BaseAddress) { u32 RecievedByte; - /* - * Wait until there is data - */ + /* Wait until there is data */ while (!XUartPs_IsReceiveData(BaseAddress)) { ; } RecievedByte = XUartPs_ReadReg(BaseAddress, XUARTPS_FIFO_OFFSET); - /* - * Return the byte received - */ + /* Return the byte received */ return (u8)RecievedByte; } @@ -134,14 +126,10 @@ u8 XUartPs_RecvByte(u32 BaseAddress) void XUartPs_ResetHw(u32 BaseAddress) { - /* - * Disable interrupts - */ + /* Disable interrupts */ XUartPs_WriteReg(BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK); - /* - * Disable receive and transmit - */ + /* Disable receive and transmit */ XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET, ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS)); @@ -152,9 +140,7 @@ void XUartPs_ResetHw(u32 BaseAddress) XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET, ((u32)XUARTPS_CR_TXRST | (u32)XUARTPS_CR_RXRST)); - /* - * Clear status flags - SW reset wont clear sticky flags. - */ + /* Clear status flags - SW reset wont clear sticky flags. */ XUartPs_WriteReg(BaseAddress, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK); /* @@ -164,23 +150,17 @@ void XUartPs_ResetHw(u32 BaseAddress) XUartPs_WriteReg(BaseAddress, XUARTPS_MR_OFFSET, XUARTPS_MR_CHMODE_NORM); - /* - * Rx and TX trigger register reset values - */ + /* Rx and TX trigger register reset values */ XUartPs_WriteReg(BaseAddress, XUARTPS_RXWM_OFFSET, XUARTPS_RXWM_RESET_VAL); XUartPs_WriteReg(BaseAddress, XUARTPS_TXWM_OFFSET, XUARTPS_TXWM_RESET_VAL); - /* - * Rx timeout disabled by default - */ + /* Rx timeout disabled by default */ XUartPs_WriteReg(BaseAddress, XUARTPS_RXTOUT_OFFSET, XUARTPS_RXTOUT_DISABLE); - /* - * Baud rate generator and dividor reset values - */ + /* Baud rate generator and dividor reset values */ XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDGEN_OFFSET, XUARTPS_BAUDGEN_RESET_VAL); XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDDIV_OFFSET, diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_intr.c b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_intr.c index 6268433d..104962e7 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_intr.c +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_intr.c @@ -91,14 +91,10 @@ typedef void (*Handler)(XUartPs *InstancePtr); *****************************************************************************/ u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr) { - /* - * Assert validates the input argument - */ + /* Assert validates the input argument */ Xil_AssertNonvoid(InstancePtr != NULL); - /* - * Read the Interrupt Mask register - */ + /* Read the Interrupt Mask register */ return (XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_IMR_OFFSET)); } @@ -120,22 +116,16 @@ u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr) void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask) { u32 TempMask = Mask; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); TempMask &= (u32)XUARTPS_IXR_MASK; - /* - * Write the mask to the IER Register - */ + /* Write the mask to the IER Register */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET, TempMask); - /* - * Write the inverse of the Mask to the IDR register - */ + /* Write the inverse of the Mask to the IDR register */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET, (~TempMask)); @@ -206,9 +196,7 @@ void XUartPs_InterruptHandler(XUartPs *InstancePtr) IsrStatus &= XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_ISR_OFFSET); - /* - * Dispatch an appropriate handler. - */ + /* Dispatch an appropriate handler. */ if((IsrStatus & ((u32)XUARTPS_IXR_RXOVR | (u32)XUARTPS_IXR_RXEMPTY | (u32)XUARTPS_IXR_RXFULL)) != (u32)0) { /* Received data interrupt */ @@ -238,9 +226,7 @@ void XUartPs_InterruptHandler(XUartPs *InstancePtr) ModemHandler(InstancePtr); } - /* - * Clear the interrupt status. - */ + /* Clear the interrupt status. */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_ISR_OFFSET, IsrStatus); @@ -428,9 +414,7 @@ static void SendDataHandler(XUartPs *InstancePtr, u32 IsrStatus) InstancePtr->SendBuffer.RemainingBytes); } - /* - * If TX FIFO is empty, send more. - */ + /* If TX FIFO is empty, send more. */ else if((IsrStatus & ((u32)XUARTPS_IXR_TXEMPTY)) != (u32)0) { (void)XUartPs_SendBuffer(InstancePtr); } diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_options.c b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_options.c index 88e06d7e..41ea78f2 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_options.c +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_options.c @@ -119,9 +119,7 @@ u16 XUartPs_GetOptions(XUartPs *InstancePtr) u32 Register; u32 Index; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -174,9 +172,7 @@ void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options) u32 Index; u32 Register; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -234,9 +230,7 @@ u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr) { u8 RtrigRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -272,9 +266,7 @@ void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel) { u32 RtrigRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(TriggerLevel <= (u8)XUARTPS_RXWM_MASK); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -316,9 +308,7 @@ u16 XUartPs_GetModemStatus(XUartPs *InstancePtr) { u32 ModemStatusRegister; u16 TmpRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -351,9 +341,7 @@ u32 XUartPs_IsSending(XUartPs *InstancePtr) u32 ActiveResult; u32 EmptyResult; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -398,23 +386,17 @@ u8 XUartPs_GetOperMode(XUartPs *InstancePtr) u32 ModeRegister; u8 OperMode; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Read the Mode register. - */ + /* Read the Mode register. */ ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); ModeRegister &= (u32)XUARTPS_MR_CHMODE_MASK; - /* - * Return the constant - */ + /* Return the constant */ switch (ModeRegister) { case XUARTPS_MR_CHMODE_NORM: OperMode = XUARTPS_OPER_MODE_NORMAL; @@ -456,23 +438,17 @@ void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode) { u32 ModeRegister; - /* - * Assert validates the input arguments. - */ + /* Assert validates the input arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertVoid(OperationMode <= XUARTPS_OPER_MODE_REMOTE_LOOP); - /* - * Read the Mode register. - */ + /* Read the Mode register. */ ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); - /* - * Set the correct value by masking the bits, then ORing the const. - */ + /* Set the correct value by masking the bits, then ORing the const. */ ModeRegister &= (u32)(~XUARTPS_MR_CHMODE_MASK); switch (OperationMode) { @@ -520,21 +496,15 @@ u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr) { u32 FdelTmpRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Read the Mode register. - */ + /* Read the Mode register. */ FdelTmpRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_FLOWDEL_OFFSET); - /* - * Return the contents of the flow delay register - */ + /* Return the contents of the flow delay register */ FdelTmpRegister = (u8)(FdelTmpRegister & (u32)XUARTPS_FLOWDEL_MASK); return FdelTmpRegister; } @@ -559,9 +529,7 @@ void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue) { u32 FdelRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(FlowDelayValue > (u8)XUARTPS_FLOWDEL_MASK); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -594,21 +562,15 @@ u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr) u32 RtoRegister; u8 RtoRTmpRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Read the Receive Timeout register. - */ + /* Read the Receive Timeout register. */ RtoRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_RXTOUT_OFFSET); - /* - * Return the contents of the mode register shifted appropriately - */ + /* Return the contents of the mode register shifted appropriately */ RtoRTmpRegister = (u8)(RtoRegister & (u32)XUARTPS_RXTOUT_MASK); return RtoRTmpRegister; } @@ -633,23 +595,17 @@ void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout) { u32 RtoRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Set the correct value by masking the bits - */ + /* Set the correct value by masking the bits */ RtoRegister = ((u32)RecvTimeout & (u32)XUARTPS_RXTOUT_MASK); XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_RXTOUT_OFFSET, RtoRegister); - /* - * Configure CR to restart the receiver timeout counter - */ + /* Configure CR to restart the receiver timeout counter */ RtoRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET); @@ -695,9 +651,7 @@ s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, Xil_AssertNonvoid(FormatPtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Verify the inputs specified are valid - */ + /* Verify the inputs specified are valid */ if ((FormatPtr->DataBits > ((u32)XUARTPS_FORMAT_6_BITS)) || (FormatPtr->StopBits > ((u8)XUARTPS_FORMAT_2_STOP_BIT)) || (FormatPtr->Parity > ((u32)XUARTPS_FORMAT_NO_PARITY))) { @@ -741,9 +695,7 @@ s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, ModeRegister &= (u32)(~XUARTPS_MR_PARITY_MASK); ModeRegister |= (FormatPtr->Parity << XUARTPS_MR_PARITY_SHIFT); - /* - * Update the mode register - */ + /* Update the mode register */ XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET, ModeRegister); @@ -774,9 +726,7 @@ void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr) u32 ModeRegister; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(FormatPtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); @@ -791,23 +741,17 @@ void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr) ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); - /* - * Get the length of data (8,7,6,5) - */ + /* Get the length of data (8,7,6,5) */ FormatPtr->DataBits = ((ModeRegister & (u32)XUARTPS_MR_CHARLEN_MASK) >> XUARTPS_MR_CHARLEN_SHIFT); - /* - * Get the number of stop bits - */ + /* Get the number of stop bits */ FormatPtr->StopBits = (u8)((ModeRegister & (u32)XUARTPS_MR_STOPMODE_MASK) >> XUARTPS_MR_STOPMODE_SHIFT); - /* - * Determine what parity is - */ + /* Determine what parity is */ FormatPtr->Parity = (u32)((ModeRegister & (u32)XUARTPS_MR_PARITY_MASK) >> XUARTPS_MR_PARITY_SHIFT); diff --git a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_selftest.c b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_selftest.c index 8ef921c4..bf517592 100644 --- a/XilinxProcessorIPLib/drivers/uartps/src/xuartps_selftest.c +++ b/XilinxProcessorIPLib/drivers/uartps/src/xuartps_selftest.c @@ -100,32 +100,24 @@ s32 XUartPs_SelfTest(XUartPs *InstancePtr) u8 Index; u32 ReceiveDataResult; - /* - * Assert validates the input arguments - */ + /* Assert validates the input arguments */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - /* - * Disable all interrupts in the interrupt disable register - */ + /* Disable all interrupts in the interrupt disable register */ IntrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_IMR_OFFSET); XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK); - /* - * Setup for local loopback - */ + /* Setup for local loopback */ ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET); XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET, ((ModeRegister & (u32)(~XUARTPS_MR_CHMODE_MASK)) | (u32)XUARTPS_MR_CHMODE_L_LOOP)); - /* - * Send a number of bytes and receive them, one at a time. - */ + /* Send a number of bytes and receive them, one at a time. */ for (Index = 0U; Index < XUARTPS_TOTAL_BYTES; Index++) { /* * Send out the byte and if it was not sent then the failure @@ -144,9 +136,7 @@ s32 XUartPs_SelfTest(XUartPs *InstancePtr) XUARTPS_SR_RXEMPTY; } - /* - * Receive the byte - */ + /* Receive the byte */ (void)XUartPs_Recv(InstancePtr, &ReturnString[Index], 1U); }