diff --git a/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.mdd b/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.mdd
new file mode 100755
index 00000000..37955ea5
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.mdd
@@ -0,0 +1,52 @@
+###############################################################################
+#
+# Copyright (C) 2014-2015 Xilinx, Inc. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+#
+###############################################################################
+
+BEGIN driver coresightps_dcc
+
+OPTION copyfiles = all;
+OPTION driver_state = ACTIVE;
+OPTION supported_peripherals = (ps7_coresight_comp);
+OPTION VERSION = 1.1;
+OPTION NAME = coresightps_dcc;
+
+
+ BEGIN INTERFACE stdin
+ PROPERTY header = xcoresightpsdcc.h;
+ FUNCTION name = inbyte, value = XCoresightPs_DccRecvByte;
+ END INTERFACE
+
+ BEGIN INTERFACE stdout
+ PROPERTY header = xcoresightpsdcc.h;
+ FUNCTION name = outbyte, value = XCoresightPs_DccSendByte;
+ END INTERFACE
+
+END driver
diff --git a/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.tcl b/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.tcl
new file mode 100755
index 00000000..54c0bc38
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/coresightps_dcc/data/coresightps_dcc.tcl
@@ -0,0 +1,47 @@
+###############################################################################
+#
+# Copyright (C) 2014-2015 Xilinx, Inc. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+#
+###############################################################################
+#
+# Modification History
+#
+# Ver Who Date Changes
+# ----- ---- -------- -----------------------------------------------
+# 1.00a sdm 11/27/14 Initial version
+#
+##############################################################################
+
+
+############################################################
+# "generate" procedure
+############################################################
+proc generate {drv_handle} {
+
+}
diff --git a/XilinxProcessorIPLib/drivers/coresightps_dcc/src/Makefile b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/Makefile
new file mode 100644
index 00000000..007162d8
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner coresightps_dcc_comp_libs clean
+
+%.o: %.c
+ ${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+ echo "Compiling coresightps_dcc"
+
+coresightps_dcc_comp_libs: ${OBJECTS}
+ $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: coresightps_dcc_includes
+
+coresightps_dcc_includes:
+ ${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+ rm -rf ${OBJECTS}
diff --git a/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.c b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.c
new file mode 100644
index 00000000..687a9f63
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.c
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcoresightpsdcc.c
+* @addtogroup coresightps_dcc_v1_0
+* @{
+* @details
+*
+* Functions in this file are the minimum required functions for the
+* XCoreSightPs driver.
+*
+* @note None.
+*
+*
+*
+* MODIFICATION HISTORY:
+*
+* Ver Who Date Changes
+* ----- ----- -------- -----------------------------------------------
+* 1.00 kvn 02/14/15 First release
+*
+*
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include
+#include
+
+#define INLINE __inline
+
+/* DCC Status Bits */
+#define XCORESIGHTPS_DCC_STATUS_RX (1 << 30)
+#define XCORESIGHTPS_DCC_STATUS_TX (1 << 29)
+
+static INLINE u32 XCoresightPs_DccGetStatus(void);
+
+/****************************************************************************/
+/**
+*
+* This functions sends a single byte using the DCC. It is blocking in that it
+* waits for the transmitter to become non-full before it writes the byte to
+* the transmit register.
+*
+* @param BaseAddress is a dummy parameter to match the function proto
+* of functions for other stdio devices.
+* @param Data is the byte of data to send
+*
+* @return None.
+*
+* @note None.
+*
+******************************************************************************/
+void XCoresightPs_DccSendByte(u32 BaseAddress, u8 Data)
+{
+ (void) BaseAddress;
+ while (XCoresightPs_DccGetStatus() & XCORESIGHTPS_DCC_STATUS_TX)
+ dsb();
+#if defined (__GNUC__) || defined (__ICCARM__)
+ asm volatile("mcr p14, 0, %0, c0, c5, 0"
+ : : "r" (Data));
+#else
+ {
+ volatile register u32 Reg __asm("cp14:0:c0:c5:0");
+ Reg = Data;
+ }
+#endif
+ isb();
+
+}
+
+/****************************************************************************/
+/**
+*
+* This functions receives a single byte using the DCC. It is blocking in that
+* it waits for the receiver to become non-empty before it reads from the
+* receive register.
+*
+* @param BaseAddress is a dummy parameter to match the function proto
+* of functions for other stdio devices.
+*
+* @return The byte of data received.
+*
+* @note None.
+*
+******************************************************************************/
+u8 XCoresightPs_DccRecvByte(u32 BaseAddress)
+{
+ u8 Data;
+ (void) BaseAddress;
+
+ while (!(XCoresightPs_DccGetStatus() & XCORESIGHTPS_DCC_STATUS_RX))
+ dsb();
+
+#if defined (__GNUC__) || defined (__ICCARM__)
+ asm volatile("mrc p14, 0, %0, c0, c5, 0"
+ : "=r" (Data));
+#else
+ {
+ volatile register u32 Reg __asm("cp14:0:c0:c5:0");
+ Data = Reg;
+ }
+#endif
+ isb();
+
+ return Data;
+}
+
+
+/****************************************************************************/
+/**INLINE
+*
+* This functions read the status register of the DCC.
+*
+* @param BaseAddress is the base address of the device
+*
+* @return The contents of the Status Register.
+*
+* @note None.
+*
+******************************************************************************/
+static INLINE u32 XCoresightPs_DccGetStatus(void)
+{
+ u32 Status;
+#if defined (__GNUC__) || defined (__ICCARM__)
+ asm volatile("mrc p14, 0, %0, c0, c1, 0"
+ : "=r" (Status) : : "cc");
+#else
+ {
+ volatile register u32 Reg __asm("cp14:0:c0:c1:0");
+ Status = Reg;
+ }
+#endif
+ return Status;
+}
+/** @} */
diff --git a/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.h b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.h
new file mode 100644
index 00000000..bfd78c32
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/coresightps_dcc/src/xcoresightpsdcc.h
@@ -0,0 +1,68 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcoresightpsdcc.h
+* @addtogroup coresightps_dcc_v1_0
+* @{
+* @details
+*
+* CoreSight driver component.
+*
+* The coresight is a part of debug communication channel (DCC) group. Jtag UART
+* for ARM uses DCC. Each ARM core has its own DCC, so one need to select an
+* ARM target in XSDB console before running the jtag terminal command. Using the
+* coresight driver component, the output stream can be directed to a log file.
+*
+* @note None.
+*
+*
+*
+* MODIFICATION HISTORY:
+*
+* Ver Who Date Changes
+* ----- ----- -------- -----------------------------------------------
+* 1.00 kvn 02/14/15 First release
+*
+*
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include
+
+void XCoresightPs_DccSendByte(u32 BaseAddress, u8 Data);
+
+u8 XCoresightPs_DccRecvByte(u32 BaseAddress);
+/** @} */