From 38d86a8508da561064e1bbf8fa46f745c590b09b Mon Sep 17 00:00:00 2001 From: P L Sai Krishna Date: Mon, 3 Nov 2014 20:41:05 +0530 Subject: [PATCH] iicps: TimeOut Register value is modified. This Patch modifies the TimeOut Register value,although timeout interrupt is not used, this register is changed to set to the maximum allowed HW timeout value. Signed-off-by: P L Sai Krishna --- XilinxProcessorIPLib/drivers/iicps/src/xiicps.c | 2 ++ XilinxProcessorIPLib/drivers/iicps/src/xiicps.h | 2 ++ XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.c | 3 ++- XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.h | 3 ++- XilinxProcessorIPLib/drivers/iicps/src/xiicps_selftest.c | 4 +--- 5 files changed, 9 insertions(+), 5 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps.c b/XilinxProcessorIPLib/drivers/iicps/src/xiicps.c index 47d09316..baf78716 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps.c +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps.c @@ -48,6 +48,8 @@ * and state the same in the comments. CR# 784254. * Fix for CR# 761060 - provision for repeated start. * 2.3 sk 10/07/14 Repeated start feature removed. +* 2.4 sk 11/03/14 Modified TimeOut Register value to 0xFF +* in XIicPs_Reset. * * * diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps.h b/XilinxProcessorIPLib/drivers/iicps/src/xiicps.h index 18ad244f..943f5806 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps.h +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps.h @@ -168,6 +168,8 @@ * read mode and clear transfer size register. * Disable NACK to avoid interrupts on each retry. * 2.3 sk 10/07/14 Repeated start feature deleted. +* 2.4 sk 11/03/14 Modified TimeOut Register value to 0xFF +* in XIicPs_Reset. * * * diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.c b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.c index 10c27122..088485d1 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.c +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.c @@ -42,6 +42,7 @@ * Ver Who Date Changes * ----- ------ -------- -------------------------------------------- * 1.04a kpc 11/07/13 First release +* 2.4 sk 11/03/14 Modified TimeOut Register value to 0xFF * * * @@ -95,7 +96,7 @@ void XIicPs_ResetHw(u32 BaseAddress) RegVal |= XIICPS_CR_CLR_FIFO_MASK; XIicPs_WriteReg(BaseAddress, XIICPS_CR_OFFSET, RegVal); /* Clear the timeout register */ - XIicPs_WriteReg(BaseAddress, XIICPS_TIME_OUT_OFFSET, 0x0); + XIicPs_WriteReg(BaseAddress, XIICPS_TIME_OUT_OFFSET, XIICPS_TO_RESET_VALUE); /* Clear the transfer size register */ XIicPs_WriteReg(BaseAddress, XIICPS_TRANS_SIZE_OFFSET, 0x0); /* Clear the status register */ diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.h b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.h index 1121b937..65d95a5c 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.h +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_hw.h @@ -45,6 +45,7 @@ * ----- ------ -------- ----------------------------------------------- * 1.00a drg/jz 01/30/10 First release * 1.04a kpc 11/07/13 Added function prototype. +* 2.4 sk 11/03/14 Modified the TimeOut Register value to 0xFF * * ******************************************************************************/ @@ -253,7 +254,7 @@ extern "C" { * @{ */ #define XIICPS_TIME_OUT_MASK 0x000000FF /**< IIC Time Out mask */ -#define XIICPS_TO_RESET_VALUE 0x0000001F /**< IIC Time Out reset value */ +#define XIICPS_TO_RESET_VALUE 0x000000FF /**< IIC Time Out reset value */ /* @} */ /**************************** Type Definitions *******************************/ diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_selftest.c b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_selftest.c index 1d09780f..35876050 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_selftest.c +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_selftest.c @@ -44,6 +44,7 @@ * ----- ------ -------- --------------------------------------------- * 1.00a drg/jz 01/30/10 First release * 1.00a sdm 09/22/11 Removed unused code +* 2.4 sk 11/03/14 Removed TimeOut Register value check * * ******************************************************************************/ @@ -99,9 +100,6 @@ int XIicPs_SelfTest(XIicPs *InstancePtr) if ((XIICPS_CR_RESET_VALUE != XIicPs_ReadReg(InstancePtr->Config.BaseAddress, XIICPS_CR_OFFSET)) || - (XIICPS_TO_RESET_VALUE != - XIicPs_ReadReg(InstancePtr->Config.BaseAddress, - XIICPS_TIME_OUT_OFFSET)) || (XIICPS_IXR_ALL_INTR_MASK != XIicPs_ReadReg(InstancePtr->Config.BaseAddress, XIICPS_IMR_OFFSET))) {