From 39f94f21354d27dd842c4a1aa2d79ef0a55d734e Mon Sep 17 00:00:00 2001 From: Kinjal Pravinbhai Patel Date: Mon, 27 Jul 2015 18:56:15 +0530 Subject: [PATCH] bsp: a53: change in boot.s to include more memory attributes This patch inclues memory attributes like device memory and write through cacheable memory attributes to memory attribute index register in boot.S Signed-off-by: Kinjal Pravinbhai Patel Acked-by: Anirudha Sarangi --- lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S b/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S index c7b966c3..837613c7 100644 --- a/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S +++ b/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S @@ -184,8 +184,10 @@ OKToRun: * 0 = b01000100 = Normal, Inner/Outer Non-Cacheable * 1 = b11111111 = Normal, Inner/Outer WB/WA/RA * 2 = b00000000 = Device-nGnRnE + * 3 = b00000100 = Device-nGnRE + * 4 = b10111011 = Normal, Inner/Outer WT/WA/RA **********************************************/ - ldr x1, =0x000000000000FF44 + ldr x1, =0x000000BB0400FF44 msr MAIR_EL3, x1 /**********************************************